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LSN-3.3/10-D12J-C

DC-DC Regulated Power Supply Module, 1 Output, 36.3W, Hybrid, ROHS COMPLIANT, SIP-10

器件类别:电源/电源管理    电源电路   

厂商名称:Murata(村田)

厂商官网:https://www.murata.com

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Murata(村田)
零件包装代码
SFM
包装说明
,
针数
10
Reach Compliance Code
compliant
ECCN代码
EAR99
模拟集成电路 - 其他类型
DC-DC REGULATED POWER SUPPLY MODULE
最大输入电压
13.2 V
最小输入电压
10.8 V
标称输入电压
12 V
JESD-30 代码
R-XSMA-P10
JESD-609代码
e3
长度
50.8 mm
最大负载调整率
0.25%
功能数量
1
输出次数
1
端子数量
10
最高工作温度
64 °C
最低工作温度
-40 °C
最大输出电压
3.63 V
最小输出电压
2.97 V
标称输出电压
3.3 V
封装主体材料
UNSPECIFIED
封装形状
RECTANGULAR
封装形式
MICROELECTRONIC ASSEMBLY
峰值回流温度(摄氏度)
NOT SPECIFIED
认证状态
Not Qualified
表面贴装
NO
技术
HYBRID
温度等级
OTHER
端子面层
TIN OVER NICKEL
端子形式
PIN/PEG
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
最大总功率输出
36.3 W
微调/可调输出
YES
宽度
9.14 mm
文档预览
LAST TIME BUY: AUGUST 31, 2014. CLICK HERE FOR OBSOLESCENCE NOTICE OF FEBRUARY 2014.
www.murata-ps.com
LSN-10A D12 Models
Single Output, Non-Isolated, 12V
IN
, 1-5V
OUT,
10A, DC/DC's in SIP Packages
NOT RECOMMENDED
FOR NEW DESIGNS
Features
Step-down buck regulators for new
distributed 12V power architectures
12V input (10.8-13.2V range)
1 to 5V
OUT
@10A
Non-isolated, fixed-frequency,
synchronous-rectifier topology
Outstanding performance:
±1.25% setpoint accuracy
Efficiencies to 96% @ 10 Amps
Noise as low as 30mVp-p
Stable no-load operation
Trimmable output voltage
Remote on/off control
Sense pin on standard models
Thermal shutdown
No derating to +68°C with 100 lfm
UL/IEC/EN60950 certified
EMC compliant
+INPUT
(7,8)
LSN
Series
D
12
SIP's
(s
ingle-in-line
packag
es)
are
ide
al
bu
N
D12
(single-in-line packages)
s
g
ideal building
e
u
on-board power-distribution
blocks
for
emerging,
on-boa
rd
power-
distribution
schemes
in
w
a
-
n
s
which
isolated
buses
power any
non-isolated,
isolate
d
12V
buse
s
deliver
p
ower
to
a
ny
number
of
non-iso
lated
step-
e
e
o
d
regulators.
DC/DC's accept
input (10.8V
down
buck
regula
tors.
LSN
D12
DC/D
C's
accep
t
a
12V
inp
ut
(1
b
a
D
p
p
13.2V
range)
convert with
highest
ciency
to
13.2
input
ran
ge)
and
convert
it,
w
ith
the
hig
hest
efficie
ncy
in the
2
2V
n
g
e
smallest
1.5,
Volt
smalle
st
space,
to
a
1,
1.1,
1.2,
1.3,
1
.5,
1.8,
2,
2.5,
3.3
or
5
Vo
output
es
o
fully rated
Amps.
fully rat
fu
lly
ra
ted
at
10
A
mps.
a
t
LSN D12's are ideal point-of-use/load power processors. They typi-
cally require no external components. Their vertical-mount packages
occupy a mere 0.7 square inches (4.5 sq. cm), and reversed pin vertical
mount allows mounting to meet competitor's keep out area. Horizontal-
mount packages ("H" suffix) are only 0.34 inches (8.6mm) high.
The LSN's best-in-class power density is achieved with a fully
synchronous, fixed-frequency, buck topology that also delivers: high
efficiency (96% for 5V
OUT
models), low noise (30 to 50mVp-p typ.),
tight line/load regulation (±0.1%/±0.25% max.), quick step response
(100µsec), stable no-load operation, and no output reverse conduction.
The fully functional LSN’s feature output overcurrent detection,
continuous short-circuit protection, an output-voltage trim function, a
remote on/off control pin (pull high to disable), thermal shutdown and a
sense pin. High efficiency enables the LSN D12's to deliver rated output
currents of 10 Amps at ambient temperatures to +68°C with 100 lfm air
flow.
If your new system boards call for three or more supply voltages,
check out the economics of on-board 12V distributed power. If you don't
need to pay for multiple isolation barriers, DATEL's non-isolated LSN
D12 SIP's will save you money.
+OUTPUT
(1,2,4)
10.5Ω
+SENSE
(3)
COMMON
(5)
CURRENT
SENSE
66µF
100µF
330µF
COMMON
(6)
V
CC
ON/OFF
CONTROL
(11)
 
PWM
CONTROLLER
REFERENCE &
ERROR AMP
For devices with the sense-pin removed ("B" suffix),
the feedback path is through the +Output pin and not
the +Sense pin.
V
OUT
TRIM
(10)
Typical topology is shown
For full details go to
www.murata-ps.com/rohs
Figure 1. Simplified Schematic
www.murata-ps.com/support
MDC_LSN10A-D12.E01
Page 1 of 12
LSN-10A D12 Models
Single Output, Non-Isolated, 12V
IN
, 1-5V
OUT,
10A, DC/DC's in SIP Packages
Performance Specifications and Ordering Guide
Root Model
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
Regulation (Max.)
V
IN
Nom.
(Volts)
Line
Load
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.1%
±0.2%
±0.2%
±0.1%
±0.15%
±0.25%
±0.25%
±0.275%
±0.25%
±0.3%
±0.4%
±0.25%
±0.45%
±0.45%
±0.45%
±0.25%
±0.25%
12
12
12
12
12
12
12
12
12
12
12
12
V
OUT
(Volts)
1
1.1
1.2
1.3
1.5
1.8
2
2.5
3.3
3.3
3.8
5
I
OUT
(Amps)
10
10
10
10
10
10
10
10
10
10
10
10
Output
R/N (mVp-p)
Typ.
Max.
45
45
45
45
50
30
30
35
45
45
40
65
65
60
60
60
70
45
45
50
75
75
55
100
Input
Range
(Volts)
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
10.8-13.2
I
IN
(mA/A)
39/1.02
45/1.1
45/1.19
45/1.3
54/1.47
53/1.75
59/1.9
60/2.3
69/3
69/3
69/3.33
80/4.35
Efficiency
Full Load
½ Load
Min.
Typ.
Typ.
83%
85%
85%
85%
86%
87%
88.5%
90.5%
92.5%
92.5%
93%
94%
86%
88%
88%
88%
89%
90.5%
91%
92.5%
94%
94%
95%
96%
86%
87.5%
87.5%
87.5%
88%
89.5%
90%
92%
93.5%
93.5%
N/A
95.5%
Package
(Case,
Pinout)
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B5/B5x, P59
B 5/B5x, P59
*
*
*
*
*
*
*
OBSOLETE
OBSOLETE
*
of September 2014, ONLY the following part numbers will be available: LSN-2.5/10-D12J-C; LSN-2.5/10-D12J-C-CIS;
As
LSN-3.3/10-D12J-C; LSN-3.3/10-D12J-C-CIS
Typical at T
A
= +25°C under nominal line voltage and full-load conditions, unless noted. All models
are tested and specified with external 22µF tantalum input and output capacitors. The capacitors are
necessary to accommodate our test equipment and may not be required to achieve specified perfor-
mance in your applications. See I/O Filtering and Noise Reduction.
Ripple/Noise (R/N) is tested/specified over a 20MHz bandwidth and may be reduced with external
filtering. See I/O Filtering and Noise Reduction for details.
P A R T
N U M B E R
S T R U C T U R E
These devices have no minimum-load requirements and will regulate under no-load conditions.
Regulation specifications describe the output-voltage deviation as the line voltage or load is varied
from its nominal/midpoint value to either extreme.
Nominal line voltage, no-load/full-load conditions.
These are not complete model numbers. Please refer to the Part Number Structure when ordering.
M E C H A N I C A L
S P E C I F I C A T I O N S
0.34
(8.64)
0.20
(5.08)
0.55
(13.97)
*
*
LAST TIME BUY: AUGUST 31, 2014. CLICK HERE FOR OBSOLESCENCE NOTICE OF FEBRUARY 2014.
LSN-1/10-D12-C
LSN-1.1/10-D12-C
LSN-1.2/10-D12-C
LSN-1.3/10-D12-C
LSN-1.5/10-D12-C
LSN-1.8/10-D12-C
LSN-2/10-D12-C
LSN-2.5/10-D12-C
LSN-3.3/10-D12-C
LSN-3.3/10-D12J-C-CIS
LSN-3.8/10-D12-C
LSN-5/10-D12-C
L SN
-
1.8
/
10
-
D12 B H J
-
C
Output
Configuration:
L
= Unipolar
Low Voltage
Non-Isolated SIP
Nominal Output Voltage:
1, 1.1, 1.2, 1.3, 1.5, 1.8, 2, 2.5, 3.3
or 5 Volts
Maximum Rated Output
Current in Amps
Note:
Not all model number
combinations are available.
Contact Murata Power Solutions.
RoHS-6
compliant*
J Suffix:
Reversed Pin
Vertical Mount
H Suffix:
Horizontal Mount
B Suffix:
No Remote Sense (Pin 3 removed)
Input Voltage Range:
D12
= 10.8 to 13.2 Volts (12V nominal)
* Contact Murata Power Solutions availability.
0.25
(6.35)
0.35
(8.89)
2.00
(50.80)
0.05
(1.27)
1 2 3 4 5
6 7 8 9 10 11
0.21
(5.33)
0.55
(13.97)
ISOLATING
PAD
0.17
(4.32)
1 2 3 4 5
0.16
(4.06
0.360
(9.14)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
0.17
(4.32)
2.00
(50.80)
1 2 3 4 5
6 7 8 9 10 11
0.030 ±0.001 DIA.
(0.762 ±0.025)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.05
(1.27)
0.110
(2.79)
0.046
(1.17)
LAYOUT PATTERN
TOP VIEW
0.34
(8.64)
Case B5
Vertical Mounting
(Standard)
0.36
(9.14)
0.20
(5.08)
2.00
(50.80)
0.55
(13.97)
6 7 8 9 10 11
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
0.56
(14.22)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.05
(1.27)
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.05
(1.27)
0.046
(1.17)
0.106
(2.69)
0.53
(13.46)
Case B5A
Horizontal Mounting
0.55
(13.97)
0.306
(7.8)
LAYOUT PATTERN
TOP VIEW
0.36
(9.14)
0.50
(12.7)
LAYOUT PATTERN
TOP VIEW
Case B5B
Reverse Pin
Vertical Mounting
(Tyco-compatible)
RECOMMENDED
COPPER PAD
ON PCB (0.55 SQ. IN.)
DIMENSIONS IN INCHES (mm
)
Pin
1
2
3
4
Function P59*
+Output
+Output
+Sense *
+Output
I/O Connections
Pin
Function P59*
5
Common
6
Common
7
+Input
8
+Input
Pin
9
10
11
Function P59*
No Pin
V
OUT
Trim
On/Off Control
* Pin 3 (+Sense) removed
for "B" suffix models.
www.murata-ps.com/support
MDC_LSN10A-D12.E01
Page 2 of 12
LSN-10A D12 Models
Performance/Functional Specifications
Input
Input Voltage Range
Input Current:
Normal Operating Conditions
Inrush Transient
Standby/Off Mode
Output Short-Circuit Condition
Input Reflected Ripple Current
Input Filter Type
Overvoltage Protection
Reverse-Polarity Protection
Undervoltage Shutdown
On/Off Control
➁ ➂
10.8-13.2 Volts (12V nominal)
See Ordering Guide
0.08A
2
sec
8mA
40mA average
100mAp-p
Capacitive (66µF)
None
None
None
On = open (internal pull-down)
Off = +2.8V to +V
IN
(<3mA)
Storage Temperature
Lead Temperature
(soldering, 10 sec.)
Single Output, Non-Isolated, 12V
IN
, 1-5V
OUT,
10A, DC/DC's in SIP Packages
Absolute Maximum Ratings
Input Voltage:
Continuous or transient
On/Off Control
(Pin 11)
Input Reverse-Polarity Protection
Output Overvoltage Protection
Output Current
Typical @ T
A
= +25°C under nominal line voltage and full-load conditions unless noted.
15 Volts
+V
IN
None
None
Current limited. Devices can
withstand sustained output short
circuits without damage.
–40 to +125°C
+300°C
These are stress ratings. Exposure of devices to any of these conditions may adversely
affect long-term reliability. Proper operation under conditions other than those listed in the
Performance/Functional Specifications Table is not implied.
T E C H N I C A L
N O T E S
Output
V
OUT
Accuracy
(50% load)
Minimum Loading
Maximum Capacitive Load
V
OUT
Trim Range
Ripple/Noise
(20MHz BW)
➀ ➁ ➃
Total Accuracy
Efficiency
±1.25% maximum
No load
2000µF (low ESR, OSCON)
±10%
See Ordering Guide
3% over line/load/temperature
See Ordering Guide
Return Current Paths
The LSN D12 SIP’s are non-isolated DC/DC converters. Their two Common
pins (pins 5 and 6) are connected to each other internally (see Figure 1). To
the extent possible (with the intent of minimizing ground loops), input return
current should be directed through pin 6 (also referred to as –Input or Input
Return), and output return current should be directed through pin 5 (also
referred to as –Output or Output Return). Any on/off control signals applied to
pin 11 (On/Off Control) should be referenced to Common
(specifically pin 6).
I/O Filtering and Noise Reduction
All models in the LSN D12 Series are tested and specified with external
22µF tantalum input and output capacitors. These capacitors are necessary
to accommodate our test equipment and may not be required to achieve?
desired performance in your application. The LSN D12's are designed with
high-quality, high-performance
internal
I/O caps, and will operate within spec
in most applications with
no additional external components.
In particular, the LSN D12's input capacitors are specified for low ESR
and are fully rated to handle the units' input ripple currents. Similarly, the
internal output capacitors are specified for low ESR and full-range frequency
response. As shown in the Performance Curves, removal of the external
22µF tantalum output caps has minimal effect on output noise.
In critical applications, input/output ripple/noise may be further reduced using
filtering techniques, the simplest being the installation of external I/O caps.
External input capacitors serve primarily as energy-storage devices. They
minimize high-frequency variations in input voltage (usually caused by IR
drops in conductors leading to the DC/DC) as the switching converter draws
pulses of current. Input capacitors should be selected for bulk capacitance
(at appropriate frequencies), low ESR, and high rms-ripple-current ratings.
The switching nature of modern DC/DC's requires that the dc input voltage
source have low ac impedance at the frequencies of interest. Highly inductive
source impedances can greatly affect system stability. Your specific system
configuration may necessitate additional considerations.
Output ripple/noise (also referred to as periodic and random deviations or
PARD) may be reduced below specified limits with the installation of addi-
tional external output capacitors. Output capacitors function as true filter
Overcurrent Detection and Short-Circuit Protection:
Current-Limiting Detection Point
17 (13-25) Amps
Short-Circuit Detection Point
98% of V
OUT
set
SC Protection Technique
Hiccup with auto recovery
Short-Circuit Current
400mA average
Dynamic Characteristics
Transient Response
(50% load step)
Start-Up Time:
V
IN
to V
OUT
and On/Off to V
OUT
Switching Frequency:
1V/1.1V, 1.2V, 1.3 Models
1.5V/1.8V, 2V Models
2.5V, 3.3V, 5V Models
Calculated MTBF
Operating Temperature:
(Ambient)
Without Derating (Natural convection)
With Derating
Thermal Shutdown
Dimensions
Pin Dimensions/Material
Weight
Flamability Rating
Safety
100µsec to ±2% of final value
125µsec for LSN-1.2/10-D12 model
70msec for V
OUT
= 1V
16msec for V
OUT
= 1.1V to 5V
105/125kHz ±10%
160/177kHz ±10%
200kHz ±7.5%
Environmental
2.3-1.8 million hours (1V
OUT
to 5V
OUT
)
–40 to +48/64°C (model dependent)
See Derating Curves
+115°C
Physical
See Mechanical Specifications
0.03" (0.76mm) round copper alloy with
tin plate over nickel underplate
0.3 ounces (8.5g)
UL94V-0
UL/cUL/IEC/EN 60950, CSA-C22.2 No. 234
All models are tested/specified with external 22µF input/output capacitors.These caps
accommodate our test equipment and may not be required to achieve specified performance
in your applications. All models are stable and regulate within spec under no-load conditions.
See Technical Notes and Performance Curves for details.
The On/Off Control (pin 11) is designed to be driven with open-collector logic or the appli-
cation of appropriate voltages (referenced to Common, pins 5 and 6).
Output noise may be further reduced with the installation of additional external output
filtering. See I/O Filtering and Noise Reduction.
MTBF’s are calculated using Telcordia SR-332(Bellcore), ground fixed, T
A
= +25°C, full
power, natural convection, +67°C pcb temperature.
www.murata-ps.com/support
MDC_LSN10A-D12.E01
Page 3 of 12
LSN-10A D12 Models
Single Output, Non-Isolated, 12V
IN
, 1-5V
OUT,
10A, DC/DC's in SIP Packages
elements and should be selected for bulk capacitance, low ESR, and appro-
priate frequency response. Any scope measurements of PARD should be
made directly at the DC/DC output pins with scope probe ground less than
0.5" in length.
All external capacitors should have appropriate voltage ratings and be located
as close to the converters as possible. Temperature variations for all relevant
parameters should be taken into consideration.
The most effective combination of external I/O capacitors will be a function
of your line voltage and source impedance, as well as your particular load and
layout conditions. Our Applications Engineers can recommend potential solu-
tions and discuss the possibility of our modifying a given device’s internal filter-
ing to meet your specific requirements. Contact our Applications Engineering
Group for additional details.
Input Fusing
Most applications and or safety agencies require the installation of fuses
at the inputs of power conversion components. LSN D12 Series DC/DC
converters are not internally fused. Therefore, if input fusing is mandatory,
either a normal-blow or a slow-blow fuse with a value no greater than 9 Amps
should be installed within the ungrounded input path to the converter.
As a rule of thumb however, we recommend to use a normal-blow or slow-
blow fuse with a typical value of about twice the maximum input current,
calculated at low line with the converters minimum efficiency.
Safety Considerations
LSN D12 SIP's are non-isolated DC/DC converters. In general, all DC/DC's
must be installed, including considerations for I/O voltages and spacing/
separation requirements, in compliance with relevant safety-agency speci-
fications (usually UL/IEC/EN60950).
In particular, for a non-isolated converter's output voltage to meet SELV
(safety extra low voltage) requirements, its input must be SELV compliant.
If the output needs to be ELV (extra low voltage), the input must be ELV.
Input Overvoltage and Reverse-Polarity Protection
LSN D12 SIP Series DC/DC's do not incorporate either input overvoltage
or input reverse-polarity protection. Input voltages in excess of the specified
absolute maximum ratings and input polarity reversals of longer than "instan-
taneous" duration can cause permanent damage to these devices.
Start-Up Time
The V
IN
to V
OUT
Start-Up Time is the interval between the time at which a
ramping input voltage crosses the lower limit of the specified input voltage
range (10.8 Volts) and the fully loaded output voltage enters and remains
within its specified accuracy band. Actual measured times will vary with input
source impedance, external input capacitance, and the slew rate and final
value of the input voltage as it appears to the converter.
The On/Off to V
OUT
Start-Up Time assumes the converter is turned off via the
On/Off Control with the nominal input voltage already applied to the converter.
The specification defines the interval between the time at which the converter
is turned on and the fully loaded output voltage enters and remains within its
specified accuracy band. See Typical Performance Curves.
Remote Sense
LSN D12 SIP Series DC/DC converters offer an output sense function on
pin 3. The sense function enables point-of-use regulation for overcoming
moderate IR drops in conductors and/or cabling. Since these are non-isolated
devices whose inputs and outputs usually share the same ground plane,
sense is provided only for the +Output.
The remote sense line is part of the feedback control loop regulating the
DC/DC converter’s output. The sense line carries very little current and
consequently requires a minimal cross-sectional-area conductor. As such, it
is not a low-impedance point and must be treated with care in layout and
cabling. Sense lines should be run adjacent to signals (preferably ground),
and in cable and/or discrete-wiring applications, twisted-pair or similar tech-
niques should be used. To prevent high frequency voltage differences between
V
OUT
and Sense, we recommend installation of a 1000pF capacitor close to
the converter.
The sense function is capable of compensating for voltage drops between the
+Output and +Sense pins that do not exceed 10% of V
OUT
.
[V
OUT
(+) – Common] – [Sense(+) – Common]
10%V
OUT
Power derating (output current limiting) is based upon maximum output cur-
rent and voltage at the converter's output pins. Use of trim and sense func-
tions can cause the output voltage to increase, thereby increasing output
power beyond the LSN's specified rating. Therefore:
(V
OUT
at pins) x (I
OUT
)
rated output power
The internal 10.5Ω resistor between +Sense and +Output (see Figure 1)
serves to protect the sense function by limiting the output current flowing
through the sense line if the main output is disconnected. It also prevents
output voltage runaway if the sense connection is disconnected.
Note: Connect the +Sense pin (pin 3) to +Output (pin 4) at the DC/DC
converter pins, if the sense function is not used for remote regulation.
On/Off Control and Power-up Sequencing
The On/Off Control pin may be used for remote on/off operation. LSN D12 SIP
Series DC/DC's are designed so they are enabled when the control pin is
left open (internal pull-down to Common) and disabled when the control pin is
pulled high (+2.8V to +V
IN
), as shown in Figure 2 and 2a.
Dynamic control of the on/off function is best accomplished with a mechanical
relay or open-collector/open-drain drive circuit. The drive circuit should be
able to sink appropriate current when activated and withstand appropriate
voltage when deactivated.
+INPUT
10kΩ
4.12kΩ
ON/OFF
CONTROL
1.62kΩ
COMMON
Figure 2. Driving the On/Off Control Pin with an Open-Collector Drive Circuit
www.murata-ps.com/support
MDC_LSN10A-D12.E01
Page 4 of 12
LSN-10A D12 Models
Single Output, Non-Isolated, 12V
IN
, 1-5V
OUT,
10A, DC/DC's in SIP Packages
The on/off control function, however, can be externally inverted so that the
converter will be disabled while the input voltage is ramping up and then
"released" once the input has stabilized.
For a controlled start-up of one or more LSN-D12's, or if several output
voltages need to be powered-up in a given sequence, the On/Off Control pin
can be pulled high (external pull-up resistor, converter disabled) and then
driven low with an external open collector device to enable the converter.
+INPUT
The equations below can be used as starting points for selecting specific trim-
resistor values. Recall, untrimmed devices are guaranteed to be
±1%
accurate.
Adjustment beyond the specified ±10% adjustment range is not recommended.
5.6kΩ
4.12kΩ
ON/OFF
CONTROL
1.62kΩ
10kΩ
Figure 3. Trim Connections Using a Trimpot
COMMON
Figure 2a. Inverting On/Off Control Pin Signal and Power-Up Sequencing
Output Overvoltage Protection
LSN D12 SIP Series DC/DC converters do not incorporate output overvolt-
age protection. In the extremely rare situation in which the device’s feedback
loop is broken, the output voltage may run to excessively high levels (V
OUT
=
V
IN
). If it is absolutely imperative that you protect your load against any and
all possible overvoltage situations, voltage limiting circuitry must be provided
external to the power converter.
Output Overcurrent Detection
Overloading the output of a power converter for an extended period of
time will invariably cause internal component temperatures to exceed their
maximum ratings and eventually lead to component failure. High-current-
carrying components such as inductors, FET's and diodes are at the highest
risk. LSN D12 SIP Series DC/DC converters incorporate an output overcur-
rent detection and shutdown function that serves to protect both the power
converter and its load.
If the output current exceeds it maximum rating by typically 70% (17 Amps) or
if the output voltage drops to less than 98% of it original value, the LSN D12's
internal overcurrent-detection circuitry immediately turns off the converter,
which then goes into a "hiccup" mode. While hiccupping, the converter will
continuously attempt to restart itself, go into overcurrent, and then shut down.
Under these conditions, the average output current will be approximately
400mA, and the average input current will be approximately 40mA. Once the
output short is removed, the converter will automatically restart itself.
Output Voltage Trimming
Allowable trim ranges for each model in the LSN D12 SIP Series are ±10%.
Trimming is accomplished with either a trimpot or a single fixed resistor. The
trimpot should be connected between +Output and Common with its wiper
connected to the Trim pin as shown in Figure 3 below.
A trimpot can be used to determine the value of a single fixed resistor
which can then be connected, as shown in Figure 4, between the Trim pin
and +Output to trim down the output voltage, or between the Trim pin and
Common to trim up the output voltage. Fixed resistors should have absolute
TCR’s less than 100ppm/°C to ensure stability.
Note:
Install either a fixed
trim-up resistor
or a fixed trim-down
resistor depending upon
desired output voltage.
Figure 4. Trim Connections Using Fixed Resistors
Trim Equations
R
T
DOWN
(kΩ) =
R
T
UP
(kΩ) =
1.82(V
O
0.8)
V
O NOM
V
O
1.46
V
O
V
O NOM
X = 0.909
X = 2.49
X = 3.09
X = 4.12
X
X
LSN-1/10-D12:
LSN-1.1/10-D12:
LSN-1.2/10-D12:
LSN-1.3/10-D12:
R
T
DOWN
(kΩ) =
R
T
UP
(kΩ) =
4.64(V
O
0.8)
V
O NOM
V
O
3.72
V
O
V
O NOM
X
X
LSN-1.5/10-D12:
X = 13.3
LSN-1.8/10-D12:
X = 16.9
LSN-2/10-D12:
X = 15.4
R
T
DOWN
(kΩ) =
R
T
UP
(kΩ) =
7.5(V
O
0.8)
V
O NOM
V
O
6
V
O
V
O NOM
X
X
LSN-2.5/10-D12:
X = 20
LSN-3.3/10-D12:
X = 15
LSN-5/10-D12:
X = 10
Note: Resistor values are in kΩ. Accuracy of adjustment is subject to
tolerances of resistors and factory-adjusted, initial output accuracy.
V
O
= desired output voltage. V
ONOM
= nominal output voltage.
www.murata-ps.com/support
MDC_LSN10A-D12.E01
Page 5 of 12
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参数对比
与LSN-3.3/10-D12J-C相近的元器件有:LSN-2.5/10-D12J-C-CIS、LSN-1.5/10-D12-C。描述及对比如下:
型号 LSN-3.3/10-D12J-C LSN-2.5/10-D12J-C-CIS LSN-1.5/10-D12-C
描述 DC-DC Regulated Power Supply Module, 1 Output, 36.3W, Hybrid, ROHS COMPLIANT, SIP-10 DC-DC Regulated Power Supply Module, 1 Output, 25W, Hybrid, SIP-11/10 DC-DC Regulated Power Supply Module, 1 Output, 15W, Hybrid, ROHS COMPLIANT, SIP-10/11
厂商名称 Murata(村田) Murata(村田) Murata(村田)
Reach Compliance Code compliant compliant compliant
ECCN代码 EAR99 EAR99 EAR99
模拟集成电路 - 其他类型 DC-DC REGULATED POWER SUPPLY MODULE DC-DC REGULATED POWER SUPPLY MODULE DC-DC REGULATED POWER SUPPLY MODULE
最大输入电压 13.2 V 13.2 V 13.2 V
最小输入电压 10.8 V 10.8 V 10.8 V
标称输入电压 12 V 12 V 12 V
JESD-30 代码 R-XSMA-P10 R-XSMA-P10 R-XSMA-P10
长度 50.8 mm 50.8 mm 50.8 mm
最大负载调整率 0.25% 0.45% 0.25%
功能数量 1 1 1
输出次数 1 1 1
端子数量 10 10 10
最高工作温度 64 °C 55 °C 68 °C
最低工作温度 -40 °C -40 °C -40 °C
最大输出电压 3.63 V 2.75 V 1.65 V
最小输出电压 2.97 V 2.25 V 1.35 V
标称输出电压 3.3 V 2.5 V 1.5 V
封装主体材料 UNSPECIFIED UNSPECIFIED UNSPECIFIED
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
表面贴装 NO NO NO
技术 HYBRID HYBRID HYBRID
温度等级 OTHER OTHER OTHER
端子形式 PIN/PEG PIN/PEG PIN/PEG
端子节距 2.54 mm 2.54 mm 2.54 mm
端子位置 DUAL SINGLE SINGLE
最大总功率输出 36.3 W 25 W 15 W
微调/可调输出 YES YES YES
宽度 9.14 mm 9.14 mm 13.97 mm
是否无铅 不含铅 - 不含铅
是否Rohs认证 符合 - 符合
零件包装代码 SFM - SFM
针数 10 - 10/11
JESD-609代码 e3 - e3
峰值回流温度(摄氏度) NOT SPECIFIED - NOT SPECIFIED
认证状态 Not Qualified - Not Qualified
端子面层 TIN OVER NICKEL - TIN OVER NICKEL
处于峰值回流温度下的最长时间 NOT SPECIFIED - NOT SPECIFIED
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