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LT1713CMS8

Comparator Single R-R I/O ±6V/12V 8-Pin MSOP

器件类别:比较器   

厂商名称:ADI(亚德诺半导体)

厂商官网:https://www.analog.com

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器件参数
参数名称
属性值
欧盟限制某些有害物质的使用
Not Compliant
ECCN (US)
EAR99
Part Status
Unconfirmed
HTS
8542.39.00.01
SVHC
Yes
SVHC Exceeds Threshold
Yes
Manufacturer Type
Ultra Fast Comparator
Number of Channels per Chip
1
Rail to Rail
Rail to Rail Input/Output
Typical CMRR (dB)
70
Typical PSRR (dB)
80
Maximum Propagation Delay Time (ns)
11
输出类型
Output Type
CMOS/TTL
Maximum Operating Supply Voltage (V)
±6|12
Maximum Input Offset Voltage (mV)
4@5V
Minimum Single Supply Voltage (V)
2.4
Typical Single Supply Voltage (V)
3|5
Maximum Single Supply Voltage (V)
12
Minimum Dual Supply Voltage (V)
±2.4
Typical Dual Supply Voltage (V)
±5
Maximum Dual Supply Voltage (V)
±6
Typical Voltage Gain (dB)
69.54
Typical Voltage Gain Range (dB)
40 to 70
Maximum Input Bias Current (uA)
2@5V
Maximum Supply Current (mA)
6.5@5V
Typical Output Current (mA)
20(Max)
Maximum Test Temperature (°C)
85
Minimum Test Temperature (°C)
-40
Power Supply Type
Single|Dual
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
85
Standard Package Name
MSOP
Pin Count
8
Supplier Package
MSOP
Mounting
Surface Mount
Package Height
0.86
Package Length
3
Package Width
3
PCB changed
8
Lead Shape
Gull-wing
参考设计
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FEATURES
s
s
s
LT1713/LT1714
Single/Dual, 7ns, Low Power,
3V/5V/±5V Rail-to-Rail Comparators
DESCRIPTIO
The LT
®
1713/LT1714 are UltraFast
TM
7ns, single/dual
comparators featuring rail-to-rail inputs, rail-to-rail
complementary outputs and an output latch. Optimized
for 3V and 5V power supplies, they operate over a single
supply voltage range from 2.4V to 12V or from
±2.4V
to
±6V
dual supplies.
The LT1713/LT1714 are designed for ease of use in a
variety of systems. In addition to wide supply voltage
flexibility, rail-to-rail input common mode range extends
100mV beyond both supply rails and the outputs are
protected against phase reversal for inputs extending
further beyond the rails. Also, the rail-to-rail inputs may be
taken to opposite rails with no significant increase in input
current. The rail-to-rail matched complementary outputs
interface directly to TTL or CMOS logic and can sink 10mA
to within 0.5V of GND or source 10mA to within 0.7V of V
+
.
The LT1713/LT1714 have internal TTL/CMOS compatible
latches for retaining data at the outputs. Each latch holds
data as long as its latch pin is held high. Latch pin
hysteresis provides protection against slow moving or
noisy latch signals. The LT1713 is available in the 8-lead
MSOP package. The LT1714 is available in the 16-lead
narrow SSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
UltraFast is a trademark of Linear Technology Corporation.
s
s
s
s
s
s
Ultrafast: 7ns at 20mV Overdrive
8.5ns at 5mV Overdrive
Rail-to-Rail Inputs
Rail-to-Rail Complementary Outputs
(TTL/CMOS Compatible)
Specified at 2.7V, 5V and
±5V
Supplies
Low Power (Per Comparator): 5mA
Output Latch
Inputs Can Exceed Supplies Without Phase Reversal
LT1713: 8-Lead MSOP Package
LT1714: 16-Lead Narrow SSOP Package
APPLICATIO S
s
s
s
s
s
s
s
s
s
s
s
High Speed Automatic Test Equipment
Current Sense for Switching Regulators
Crystal Oscillator Circuits
High Speed Sampling Circuits
High Speed A/D Converters
Pulse Width Modulators
Window Comparators
Extended Range V/F Converters
Fast Pulse Height/Width Discriminators
Line Receivers
High Speed Triggers
TYPICAL APPLICATIO
A 4× NTSC Subcarrier Voltage-Tunable Crystal Oscillator
5V
1N4148
1M
5V
1M
2k
100pF
MV-209
VARACTOR
DIODE
1M*
47k* LT1004-2.5
3.9k*
1k*
PROPAGATION DELAY (ns)
V
IN
0V TO 5V
1M
0.047µF
C SELECT
(CHOOSE FOR CORRECT
PLL LOOP RESPONSE)
390Ω
+
LT1713
Y1** 15pF 100pF
2k
200pF
FREQUENCY
OUTPUT
171314 TA01
* 1% FILM RESISTOR
** NORTHERN ENGINEERING LABS C-2350N-14.31818MHz
U
U
U
LT1713/LT1714 Propagation Delay
vs Input Overdrive
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
0
10
20
40
50
30
INPUT OVERDRIVE (mV)
60
t
PD–
t
PD+
T
A
= 25°C
V
+
= 5V
V
= 0V
V
STEP
= 100mV
171314 TA02
1
LT1713/LT1714
ABSOLUTE
AXI U
RATI GS
Supply Voltage
V
+
to V
............................................................ 12.6V
V
+
to GND ........................................................ 12.6V
V
to GND .............................................– 10V to 0.3V
Differential Input Voltage ...................................
±12.6V
Latch Pin Voltage ...................................................... 7V
Input and Latch Current .....................................
±10mA
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
V
+
1
+IN 2
–IN 3
V
4
8
7
6
5
Q OUT
Q OUT
GND
LATCH
ENABLE
LT1713CMS8
LT1713IMS8
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART MARKING
LTRD
LTUK
T
JMAX
= 150°C,
θ
JA
= 250°C/ W
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 2.7V or V
+
= 5V, V
= 0V, V
CM
= V
+
/2, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
V
+
V
OS
Positive Supply Voltage Range
Input Offset Voltage (Note 4)
R
S
= 50Ω, V
CM
= V
+
/2
R
S
= 50Ω, V
CM
= V
+
/2 (Note 11)
R
S
= 50Ω, V
CM
= 0V
R
S
= 50Ω, V
CM
= V
+
CONDITIONS
q
q
∆V
OS
/∆T
I
OS
I
B
V
CM
CMRR
Input Offset Voltage Drift
Input Offset Current
Input Bias Current (Note 5)
q
Input Voltage Range (Note 9)
Common Mode Rejection Ratio
V
+
= 5V, 0V
V
CM
5V
V
+
= 5V, 0V
V
CM
5V
V
+
= 2.7V, 0V
V
CM
2.7V
V
+
= 2.7V, 0V
V
CM
2.7V
2
U
U
W
W W
U
W
(Note 1)
Output Current (Continuous) ..............................
±20mA
Operating Temperature Range ................ – 40°C to 85°C
Specified Temperature Range (Note 2) ... – 40°C to 85°C
Junction Temperature .......................................... 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
–IN A
+IN A
V
V
+
V
+
V
1
2
3
4
5
6
7
8
LATCH
ENABLE A
15 GND
16
14 Q A
13 Q A
12 Q B
11 Q B
10 GND
LATCH
9
ENABLE B
ORDER PART
NUMBER
LT1714CGN
LT1714IGN
+IN B
–IN B
GN PART MARKING
1714
1714I
GN PACKAGE
16-LEAD PLASTIC SSOP
T
JMAX
= 150°C,
θ
JA
= 120°C/ W
MIN
2.4
TYP
0.5
0.7
1
MAX
7
4
5
UNITS
V
mV
mV
mV
mV
µV/°C
µA
µA
µA
µA
V
dB
dB
dB
dB
q
q
5
0.1
–7
– 15
– 0.1
60
58
57
55
70
70
– 1.5
1
2
2
5
V
+
+ 0.1
q
q
q
LT1713/LT1714
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 2.7V or V
+
= 5V, V
= 0V, V
CM
= V
+
/2, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
PSRR
+
PSRR
A
V
V
OH
V
OL
I
+
I
V
IH
V
IL
I
IL
t
PD
Positive Power Supply Rejection Ratio
Negative Power Supply Rejection Ratio
Small-Signal Voltage Gain (Note 10)
Output Voltage Swing HIGH
Output Voltage Swing LOW
Positive Supply Current (Per Comparator)
Negative Supply Current (Per Comparator)
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
Propagation Delay (Note 6)
V
LATCH
= V
+
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 5mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
10% to 90%
90% to 10%
I
OUT
= 1mA, V
+
= 5V, V
OVERDRIVE
= 50mV
I
OUT
= 10mA, V
+
= 5V, V
OVERDRIVE
= 50mV
I
OUT
= – 1mA, V
OVERDRIVE
= 50mV
I
OUT
= – 10mA, V
OVERDRIVE
= 50mV
V
+
= 5V, V
OVERDRIVE
= 1V
q
CONDITIONS
2.4V
V
+
7V, V
CM
= 0V
q
MIN
65
60
65
60
1.5
q
V
+
– 0.5
q
V
+
– 0.7
q
q
TYP
80
80
3
V
+
– 0.2
V
+
– 0.4
0.20
0.35
5
3
MAX
UNITS
dB
dB
dB
dB
V/mV
V
V
– 7V
V
0V, V
+
= 5V, V
CM
= 5V
q
0.4
0.5
6.5
8.0
4.0
4.5
0.8
10
V
V
mA
mA
mA
mA
V
V
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ps
RMS
V
+
= 5V, V
OVERDRIVE
= 1V
q
q
q
q
2.4
8.0
q
11.0
12.5
3
9.0
0.5
4
4
8
1.5
0
8
∆t
PD
t
r
t
f
t
LPD
t
SU
t
H
t
DPW
f
MAX
t
JITTER
Differential Propagation Delay (Note 6)
Output Rise Time
Output Fall Time
Latch Propagation Delay (Note 7)
Latch Setup Time (Note 7)
Latch Hold Time (Note 7)
Minimum Latch Disable Pulse Width (Note 7)
Maximum Toggle Frequency
Output Timing Jitter
V
IN
= 100mV
P-P
Sine Wave
V
IN
= 630mV
P-P
(0dBm) Sine Wave, f = 30MHz
65
15
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 5V, V
= – 5V, V
CM
= 0V, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
V
+
V
V
OS
Positive Supply Voltage Range
Negative Supply Voltage Range (Note 3)
Input Offset Voltage (Note 4)
R
S
= 50Ω, V
CM
= 0V
R
S
= 50Ω, V
CM
= 0V
R
S
= 50Ω, V
CM
= – 5V
R
S
= 50Ω, V
CM
= 5V
CONDITIONS
q
q
q
MIN
2.4
–7
TYP
MAX
7
0
UNITS
V
V
mV
mV
mV
mV
µV/°C
µA
µA
µA
µA
0.5
0.7
1
q
q
3
4
∆V
OS
/∆T
I
OS
I
B
Input Offset Voltage Drift
Input Offset Current
Input Bias Current (Note 5)
5
0.1
–7
– 15
– 1.5
1
2
2
5
q
3
LT1713/LT1714
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 5V, V
= – 5V, V
CM
= 0V, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
V
CM
CMRR
PSRR
+
PSRR
A
V
V
OH
V
OL
I
+
I
V
IH
V
IL
I
IL
t
PD
Input Voltage Range
Common Mode Rejection Ratio
Positive Power Supply Rejection Ratio
Negative Power Supply Rejection Ratio
Small-Signal Voltage Gain (Note 10)
Output Voltage Swing HIGH (Note 8)
Output Voltage Swing LOW (Note 8)
Positive Supply Current (Per Comparator)
Negative Supply Current (Per Comparator)
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
Propagation Delay (Note 6)
V
LATCH
= V
+
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 5mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
10% to 90%
90% to 10%
– 5V
V
CM
5V
q
CONDITIONS
q
MIN
– 5.1
62
60
68
65
65
60
1.5
q
q
q
q
q
TYP
70
80
80
3
4.8
4.6
0.20
0.35
5.5
3.5
MAX
5.1
UNITS
V
dB
dB
dB
dB
dB
dB
V/mV
V
V
2.4V
V
+
7V, V
CM
= – 5V
q
– 7V
V
0V, V
CM
= 5V
q
1V
V
OUT
4V, R
L
=
I
OUT
= 1mA, V
OVERDRIVE
= 50mV
I
OUT
= 10mA, V
OVERDRIVE
= 50mV
I
OUT
= – 1mA, V
OVERDRIVE
= 50mV
I
OUT
= – 10mA, V
OVERDRIVE
= 50mV
V
OVERDRIVE
= 1V
V
OVERDRIVE
= 1V
q
q
q
q
4.5
4.3
0.4
0.5
7.5
9.0
4.5
5.0
0.8
10
V
V
mA
mA
mA
mA
V
V
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ps
RMS
2.4
7
q
10
12
3
8.5
0.5
4
4
8
1.5
0
8
∆t
PD
t
r
t
f
t
LPD
t
SU
t
H
t
DPW
f
MAX
t
JITTER
Differential Propagation Delay (Note 6)
Output Rise Time
Output Fall Time
Latch Propagation Delay (Note 7)
Latch Setup Time (Note 7)
Latch Hold Time (Note 7)
Minimum Latch Disable Pulse Width (Note 7)
Maximum Toggle Frequency
Output Timing Jitter
V
IN
= 100mV
P-P
Sine Wave
V
IN
= 630mV
P-P
(0dBm) Sine Wave, f = 30MHz
65
15
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LT1713C/LT1714C are guaranteed to meet specified
performance from 0°C to 70°C. They are designed, characterized and
expected to meet specified performance from – 40°C to 85°C but are not
tested or QA sampled at these temperatures. The LT1713I/LT1714I are
guaranteed to meet specified performance from – 40°C to 85°C.
Note 3:
The negative supply should not be greater than the ground pin
voltages and the maximum voltage across the positive and negative
supplies should not be greater than 12V.
Note 4:
Input offset voltage (V
OS
) is defined as the average of the two
voltages measured by forcing first one output, then the other to V
+
/2.
Note 5:
Input bias current (I
B
) is defined as the average of the two input
currents.
Note 6:
Propagation delay (t
PD
) is measured with the overdrive added to
the actual V
OS
. Differential propagation delay is defined as:
∆t
PD
= t
PD+
– t
PD–
. Load capacitance is 10pF. Due to test system
requirements, the LT1713/LT1714 propagation delay is specified with a
1kΩ load to ground for
±5V
supplies, or to mid-supply for 2.7V or 5V
single supplies.
Note 7:
Latch propagation delay (t
LPD
) is the delay time for the output to
respond when the latch pin is deasserted. Latch setup time (t
SU
) is the
interval in which the input signal must remain stable prior to asserting the
latch signal. Latch hold time (t
H
) is the interval after the latch is asserted in
which the input signal must remain stable. Latch disable pulse width
(t
DPW
) is the width of the negative pulse on the latch enable pin that
latches in new data on the data inputs.
4
LT1713/LT1714
ELECTRICAL CHARACTERISTICS
Note 8:
Output voltage swings are characterized and tested at V
+
= 5V and
V
= 0V. They are designed and expected to meet these same
specifications at V
= – 5V.
Note 9:
The input voltage range is tested under the more demanding
conditions of V
+
= 5V and V
= –5V. The LT1713/LT1714 are designed
and expected to meet these specifications at V
= 0V.
Note 10:
The LT1713/LT1714 voltage gain is tested at V
+
= 5V and
V
= – 5V only. Voltage gain at single supply V
+
= 5V and V
+
= 2.7V is
guaranteed by design and correlation.
Note 11:
Input offset voltage over temperature at V
+
= 2.7V is guaranteed
by design and characterization.
TYPICAL PERFOR A CE CHARACTERISTICS
Input Offset Voltage
vs Temperature
2.5
2.0
V
+
= 5V
V
= 0V
V
CM
= 2.5V
PROPAGATION DELAY (ns)
INPUT OFFSET VOLTAGE (mV)
PROPAGATION DELAY (ns)
1.5
1.0
0.5
0
– 0.5
– 1.0
– 1.5
– 2.0
– 2.5
–50
–25
50
0
75
25
TEMPERATURE (°C)
POSITIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
Propagation Delay
vs Input Common Mode Voltage
10.0
9.5
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
9.0
8.5
t
PD
8.0
7.5
7.0
6.5
6.0
– 0.5
0.5
1.5
t
PD–
T
A
= 25°C
V
+
= 5V
V
= 0V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
3.5
4.5
2.5
INPUT COMMON MODE (V)
5.5
+
U W
100
171314 G01
Propagation Delay
vs Load Capacitance
14
12
10
8
6
4
2
0
0
T
A
= 25°C
V
+
= 5V
V
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
20
80
60
100
40
LOAD CAPACITANCE (pF)
120
t
PD–
t
PD+
16
14
12
10
8
6
4
2
Propagation Delay
vs Temperature
V
+
= 5V
V
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
t
PD+
t
PD
125
0
–50 –25
0
25
50
75
100
125
TEMPERATURE (°C)
171314 G03
171314 G02
Propagation Delay
vs Positive Supply Voltage
10.0
9.5
9.0
8.5
8.0
7.5
7.0
6.5
6.0
0
2
10
12
8
6
POSITIVE SUPPLY VOLTAGE (V)
4
14
T
A
= 25°C
V
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
Positive Supply Current
vs Positive Supply Voltage
7.0
T
A
= 25°C
∆V
IN
= 100mV
6.5 I
OUT
= 0
V
= –5V
6.0
V
= 0V
5.5
5.0
4.5
4.0
t
PD+
t
PD–
2
6
8
10
4
POSITIVE SUPPLY VOLTAGE (V)
12
171314 G06
171314 G04
171314 G05
5
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