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LTC2251CUH

10-Bit, 125/105Msps Low Noise 3V ADCs

器件类别:模拟混合信号IC    转换器   

厂商名称:Linear ( ADI )

厂商官网:http://www.analog.com/cn/index.html

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器件参数
参数名称
属性值
Brand Name
Linear Technology
是否Rohs认证
不符合
厂商名称
Linear ( ADI )
零件包装代码
QFN
包装说明
HVQCCN, LCC32,.2SQ,20
针数
32
制造商包装代码
UH
Reach Compliance Code
not_compliant
ECCN代码
3A991.C.1
最大模拟输入电压
1 V
最小模拟输入电压
-1 V
转换器类型
ADC, PROPRIETARY METHOD
JESD-30 代码
S-PQCC-N32
JESD-609代码
e0
长度
5 mm
最大线性误差 (EL)
0.0586%
湿度敏感等级
1
模拟输入通道数量
1
位数
10
功能数量
1
端子数量
32
最高工作温度
70 °C
最低工作温度
输出位码
OFFSET BINARY, 2\'S COMPLEMENT BINARY
输出格式
PARALLEL, WORD
封装主体材料
PLASTIC/EPOXY
封装代码
HVQCCN
封装等效代码
LCC32,.2SQ,20
封装形状
SQUARE
封装形式
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度)
235
电源
3 V
认证状态
Not Qualified
采样速率
125 MHz
采样并保持/跟踪并保持
SAMPLE
座面最大高度
0.8 mm
标称供电电压
3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
NO LEAD
端子节距
0.5 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
20
宽度
5 mm
文档预览
LTC2251/LTC2250
10-Bit, 125/105Msps
Low Noise 3V ADCs
FEATURES
DESCRIPTIO
Sample Rate: 125Msps/105Msps
Single 3V Supply (2.85V to 3.4V)
Low Power: 395mW/320mW
61.6dB SNR
85dB SFDR
No Missing Codes
Flexible Input: 1V
P-P
to 2V
P-P
Range
640MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family:
125Msps: LTC2251 (10-Bit), LTC2253 (12-Bit)
105Msps: LTC2250 (10-Bit), LTC2252 (12-Bit)
80Msps: LTC2239 (10-Bit), LTC2229 (12-Bit)
65Msps: LTC2238 (10-Bit), LTC2228 (12-Bit)
40Msps: LTC2237 (10-Bit), LTC2227 (12-Bit)
25Msps: LTC2236 (10-Bit), LTC2226 (12-Bit)
32-Pin (5mm
×
5mm) QFN Package
The LTC
®
2251/LTC2250 are 10-bit 125Msps/105Msps,
low noise 3V A/D converters designed for digitizing high
frequency, wide dynamic range signals. The LTC2251/
LTC2250 are perfect for demanding imaging and commu-
nications applications with AC performance that includes
61.6dB SNR and 85dB SFDR for signals at the Nyquist
frequency.
DC specs include
±0.1LSB
INL (typ),
±0.05LSB
DNL (typ)
and
±0.6LSB
INL,
±0.6LSB
DNL over temperature. The
transition noise is a low 0.08LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.3V
logic.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
Wireless and Wired Broadband Communication
Imaging Systems
Ultrasound
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
REFH
REFL
FLEXIBLE
REFERENCE
OV
DD
+
ANALOG
INPUT
INPUT
S/H
SNR (dBFS)
10-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
D9
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
22510 TA01
CLK
22510fa
U
LTC2251: SNR vs Input Frequency,
–1dB, 2V Range, 125Msps
65
64
63
62
61
60
59
58
57
56
55
0
50
100 150 200 250 300 350
22510 G09
INPUT FREQUENCY (MHz)
U
U
1
LTC2251/LTC2250
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2251C, LTC2250C ............................. 0°C to 70°C
LTC2251I, LTC2250I ...........................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
SENSE
MODE
V
CM
V
DD
D9
D8
D7
ORDER PART
NUMBER
24 D6
23 D5
22 D4
OF
32 31 30 29 28 27 26 25
AIN
+
1
2
AIN
REFH 3
REFH 4
REFL 5
REFL 6
V
DD
7
GND 8
9 10 11 12 13 14 15 16
33
21 OV
DD
20 OGND
19 D3
18 D2
17 D1
LTC2251CUH
LTC2251IUH
LTC2250CUH
LTC2250IUH
QFN PART*
MARKING
2251
2250
SHDN
OE
NC
NC
NC
UH PACKAGE
32-LEAD (5mm
×
5mm) PLASTIC QFN
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Transition Noise
Internal Reference
External Reference
SENSE = 1V
CONDITIONS
The
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
LTC2251
MIN
TYP
MAX
CLK
T
JMAX
= 125°C,
θ
JA
= 34°C/W
EXPOSED PAD (PIN 33) IS GND
MUST BE SOLDERED TO PCB
NC
D0
LTC2250
MIN
TYP
MAX
10
–0.6
–0.6
–12
–2.5
±0.1
±0.05
±2
±0.5
±10
±30
±5
0.08
0.6
0.6
12
2.5
UNITS
Bits
LSB
LSB
mV
%FS
µV/°C
ppm/°C
ppm/°C
LSB
RMS
10
–0.6
–0.6
–12
–2.5
±0.1
±0.05
±2
±0.5
±10
±30
±5
0.08
0.6
0.6
12
2.5
Differential Analog Input
(Note 5)
Differential Analog Input
(Note 6)
External Reference
22510fa
2
U
W
U
U
W W
W
U
LTC2251/LTC2250
A ALOG I PUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.85V < V
DD
< 3.4V (Note 7)
Differential Input (Note 7)
0V < A
IN+
, A
IN–
< V
DD
0V < SENSE < 1V
Analog Input Range (A
IN+
–A
IN–
)
Analog Input Common Mode
Analog Input Leakage Current
SENSE Input Leakage
MODE Pin Leakage
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free
Dynamic Range
2nd or 3rd
Harmonic
Spurious Free
Dynamic Range
4th Harmonic
or Higher
Signal-to-Noise
Plus Distortion
Ratio
5MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
5MHz Input
30MHz Input
70MHz Input
140MHz Input
S/(N+D)
5MHz Input
30MHz Input
70MHz Input
140MHz Input
IMD
Intermodulation
Distortion
f
IN1
= 28.2MHz,
f
IN2
= 26.8MHz
U
W U
U
MIN
1
–1
–3
–3
TYP
1.5
MAX
1.9
1
3
3
UNITS
V
V
µA
µA
µA
ns
ps
RMS
dB
MHz
±0.5V
to
±1V
0
0.2
80
Figure 8 Test Circuit
640
MIN
LTC2251
TYP
MAX
61.6
61.6
LTC2250
MIN
TYP
MAX
61.6
61.6
60
61.5
61.4
85
85
69
83
77
85
85
75
85
85
61.6
61.6
60
61.5
61.3
80
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
60
61.5
61.4
85
85
69
82
77
85
85
75
85
85
61.5
61.5
60
61.4
61.2
80
22510fa
3
LTC2251/LTC2250
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
LOGIC INPUTS (CLK, OE, SHDN)
The
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
4
U
U
U
U
U
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
2.85V < V
DD
< 3.4V
–1mA < I
OUT
< 1mA
TYP
MAX
UNITS
V
2
0.8
–10
3
10
V
µA
pF
V
IN
= 0V to V
DD
(Note 7)
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
3
50
50
2.7
2.995
2.99
0.005
0.09
2.49
0.09
1.79
0.09
0.4
pF
mA
mA
V
V
V
V
V
V
V
V
22510fa
LTC2251/LTC2250
POWER REQUIRE E TS
SYMBOL
V
DD
OV
DD
I
VDD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply
Voltage
Output Supply
Voltage
Supply Current
Power Dissipation
Shutdown Power
Nap Mode Power
The
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
CONDITIONS
(Note 9)
(Note 9)
The
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
s
t
L
PARAMETER
Sampling Frequency
CLK Low Time
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
TI I G CHARACTERISTICS
t
H
CLK High Time
t
AP
t
D
Sample-and-Hold
Aperture Delay
CLK to DATA Delay
Data Access Time
After OE↓
BUS Relinquish Time
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
(Note 7)
Pipeline
Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 125MHz (LTC2251) or 105MHz (LTC2250),
input range = 2V
P-P
with differential drive, clock duty cycle stabilizer on,
unless otherwise noted.
U W
LTC2251
MIN
TYP
MAX
2.85
0.5
3
3
132
395
2
15
3.4
3.6
156
468
LTC2250
MIN
TYP
MAX
2.85
0.5
3
3
107
320
2
15
3.4
3.6
126
378
UNITS
V
V
mA
mW
mW
mW
SHDN = H,
OE = H, No CLK
SHDN = H,
OE = L, No CLK
UW
LTC2251
MIN
TYP
MAX
1
3.8
3
3.8
3
4
4
4
4
0
1.4
2.7
4.3
3.3
5
5.4
10
8.5
125
500
500
500
500
LTC2250
MIN
TYP
MAX
1
4.5
3
4.5
3
4.76
4.76
4.76
4.76
0
1.4
2.7
4.3
3.3
5
5.4
10
8.5
105
500
500
500
500
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 and 11 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 125MHz (LTC2251) or 105MHz (LTC2250),
input range = 1V
P-P
with differential drive.
Note 9:
Recommended operating conditions.
22510fa
5
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参数对比
与LTC2251CUH相近的元器件有:LTC2250。描述及对比如下:
型号 LTC2251CUH LTC2250
描述 10-Bit, 125/105Msps Low Noise 3V ADCs 10-Bit, 125/105Msps Low Noise 3V ADCs
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