LTC2607/LTC2617/LTC2627
16-/14-/12-Bit Dual Rail-to-Rail
DACs with I
2
C Interface
DESCRIPTIO
The LTC
®
2607/LTC2617/LTC2627 are dual 16-, 14- and
12-bit, 2.7V to 5.5V rail-to-rail voltage output DACs in a
12-lead DFN package. They have built-in high perfor-
mance output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply,
voltage-output DACs.
The parts use a 2-wire, I
2
C compatible serial interface. The
LTC2607/LTC2617/LTC2627 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock rate
of 400kHz). An asynchronous DAC update pin (LDAC) is
also included.
The LTC2607/LTC2617/LTC2627 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero scale; and after power-up, they stay
at zero scale until a valid write and update take place. The
power-on reset circuit resets the LTC2607-1/LTC2617-1/
LTC2627-1 to midscale. The voltage outputs stay at
midscale until a valid write and update takes place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents
including 5396245 and 6891433. Patent Pending
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
■
■
Smallest Pin-Compatible Dual DACs:
LTC2607: 16 Bits
LTC2617: 14 Bits
LTC2627: 12 Bits
Guaranteed Monotonic Over Temperature
27 Selectable Addresses
400kHz I
2
C
TM
Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 260µA per DAC at 3V
Power Down to 1µA, Max
High Rail-to-Rail Output Drive (±15mA, Min)
Ultralow Crosstalk (30µV)
Double-Buffered Data Latches
Asynchronous DAC Update Pin
LTC2607/LTC2617/LTC2627: Power-On Reset to
Zero Scale
LTC2607-1/LTC2617-1/LTC2627-1: Power-On Reset
to Midscale
Tiny (3mm
×
4mm) 12-Lead DFN Package
APPLICATIO S
■
■
■
■
Mobile Communications
Process Control and Industrial Automation
Instrumentation
Automatic Test Equipment
BLOCK DIAGRA
REFLO
GND
REF
V
CC
11
10
9
8
V
OUTA
12
12-/14-/16-BIT DAC
12-/14-/16-BIT DAC
7
V
OUTB
DAC REGISTER
DAC REGISTER
DNL (LSB)
INPUT REGISTER
INPUT REGISTER
32-BIT SHIFT REGISTER
2-WIRE INTERFACE
1
CA0
2
CA1
3
LDAC
4
SCL
5
SDA
6
CA2
2607 BD
U
W
U
Differential Nonlinearity
(LTC2607)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2607 G02
V
CC
= 5V
V
REF
= 4.096V
26071727f
1
LTC2607/LTC2617/LTC2627
ABSOLUTE
AXI U
RATI GS
(Note 1)
Operating Temperature Range:
LTC2607C/LTC2617C/LTC2627C
LTC2607C-1/LTC2617C-1/LTC2627C-1 ... 0°C to 70°C
LTC2607I/LTC2617I/LTC2627I
LTC2607I-1/LTC2617I-1/LTC2627I-1 .. – 40°C to 85°C
Any Pin to GND ........................................... – 0.3V to 6V
Any Pin to V
CC ........................................................
– 6V to 0.3V
Maximum Junction Temperature ......................... 125°C
Storage Temperature Range ................ – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)................ 300°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
CA0
CA1
LDAC
SCL
SDA
CA2
1
2
3
4
5
6
13
12 V
OUTA
11 REFLO
10 GND
9 REF
8 V
CC
7 V
OUTB
DE12 PACKAGE
12-LEAD (4mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 13) IS GND
MUST BE SOLDERED TO PCB
ORDER PART
NUMBER
LTC2607CDE
LTC2607IDE
LTC2607CDE-1
LTC2607IDE-1
DE12 PART MARKING*
2607
26071
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF, Lead Free Tape and Reel: Add #TRPBF, Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V,
V
OUT
unloaded, unless otherwise noted.
SYMBOL PARAMETER
DC Performance
Resolution
Monotonicity
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
Load Regulation
CONDITIONS
●
ELECTRICAL CHARACTERISTICS
ZSE
V
OS
GE
Zero-Scale Error
Offset Error
V
OS
Temperature
Coefficient
Gain Error
Gain Temperature
Coefficient
(Note 2)
(Note 2)
(Note 2)
V
REF
= V
CC
= 5V, Midscale
I
OUT
= 0mA to 15mA Sourcing
I
OUT
= 0mA to 15mA Sinking
V
REF
= V
CC
= 2.7V, Midscale
I
OUT
= 0mA to 7.5mA Sourcing
I
OUT
= 0mA to 7.5mA Sinking
Code = 0
(Note 6)
2
U
U
W
W W
U
W
ORDER PART
NUMBER
LTC2617CDE
LTC2617IDE
LTC2617CDE-1
LTC2617IDE-1
DE12 PART MARKING*
2617
26171
ORDER PART
NUMBER
LTC2627CDE
LTC2627IDE
LTC2627CDE-1
LTC2627IDE-1
DE12 PART MARKING*
2626
26271
LTC2627/LTC2627-1 LTC2617/LTC2617-1 LTC2607/LTC2607-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
12
12
±0.5
±1.5 ±4
0.02 0.125
0.03 0.125
0.04
0.05
1
±1
±7
0.25
0.25
9
±9
14
14
±5
0.1
0.1
0.2
0.2
1
±1
±7
±1
±16
0.5
0.5
1
1
9
±9
16
16
±19
0.35
0.42
0.7
0.8
1
±1
±7
±1
±64
2
2
4
4
9
±9
UNITS
Bits
Bits
LSB
LSB
LSB/mA
LSB/mA
LSB/mA
LSB/mA
mV
mV
µV/°C
%FSR
ppm/°C
●
●
●
●
●
●
●
●
●
●
±0.15 ±0.7
±4
±0.15 ±0.7
±4
±0.15 ±0.7
±4
26071727f
LTC2607/LTC2617/LTC2627
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V,
V
OUT
unloaded, unless otherwise noted.
SYMBOL
PSR
R
OUT
PARAMETER
Power Supply Rejection
DC Output Impedance
CONDITIONS
V
CC
±10%
V
REF
= V
CC
= 5V, Midscale;
–15mA
≤
I
OUT
≤
15mA
V
REF
= V
CC
= 2.7V, Midscale;
–7.5mA
≤
I
OUT
≤
7.5mA
Due to Full Scale Output Change (Note 5)
Due to Load Current Change
Due to Powering Down (per channel)
V
CC
= 5.5V, V
REF
= 5.5V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
V
CC
= 2.7V, V
REF
= 2.7V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
MIN
TYP
–80
0.032
0.035
±4
±3
±30
15
15
7.5
7.5
0
44
36
37
22
30
MAX
UNITS
dB
Ω
Ω
µV
µV/mA
µV
mA
mA
mA
mA
V
kΩ
pF
µA
V
mA
mA
µA
µA
V
V
V
V
V
V
V
V
kΩ
kΩ
MΩ
0.4
250
50
1
10
400
10
V
ns
ns
µA
pF
pF
pF
26071727f
ELECTRICAL CHARACTERISTICS
●
●
0.15
0.15
DC Crosstalk (Note 4)
I
SC
Short-Circuit Output Current
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
60
60
50
50
V
CC
80
1
5.5
1.3
1
1
1
0.3V
CC
Reference Input
Input Voltage Range
Resistance
Capacitance
I
REF
Reference Current, Power Down Mode
Power Supply
V
CC
Positive Supply Voltage
I
CC
Supply Current
Normal Mode
DAC Powered Down
For Specified Performance
V
CC
= 5V (Note 3)
V
CC
= 3V (Note 3)
DAC Powered Down (Note 3) V
CC
= 5V
DAC Powered Down (Note 3) V
CC
= 3V
64
30
0.001
2.7
0.66
0.52
0.4
0.10
Digital I/O (Note 11)
V
IL
Low Level Input Voltage (SDA and SCL)
V
IH
High Level Input Voltage (SDA and SCL)
V
IL(LDAC)
Low Level Input Voltage (LDAC)
V
IH(LDAC)
V
IL(CAn)
V
IH(CAn)
R
INH
R
INL
R
INF
V
OL
t
OF
t
SP
I
IN
C
IN
C
B
C
CAX
High Level Input Voltage (LDAC)
Low Level Input Voltage on CAn
(n = 0, 1, 2)
High Level Input Voltage on CAn (n = 0, 1, 2)
Resistance from CAn (n = 0, 1, 2)
to V
CC
to Set CAn = V
CC
Resistance from CAn (n = 0, 1, 2)
to GND to Set CAn = GND
Resistance from CAn (n = 0, 1, 2)
to V
CC
or GND to Set CAn = Float
Low Level Output Voltage
Output Fall Time
Pulse Width of Spikes Suppressed by Input Filter
Input Leakage
I/O Pin Capacitance
Capacitive Load for Each Bus Line
External Capacitive Load on Address
Pins CAn (n = 0, 1, 2)
0.7V
CC
0.8
0.6
2.4
2.0
0.15V
CC
0.85V
CC
10
10
2
V
CC
= 4.5V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 3.6V
See Test Circuit 1
See Test Circuit 1
See Test Circuit 2
See Test Circuit 2
See Test Circuit 2
Sink Current = 3mA
V
O
= V
IH(MIN)
to V
O
= V
IL(MAX)
,
C
B
= 10pF to 400pF (Note 9)
0.1V
CC
≤
V
IN
≤
0.9V
CC
Note 12
●
0
●
20 + 0.1C
B
●
●
●
●
●
0
3
LTC2607/LTC2617/LTC2627
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V,
V
OUT
unloaded, unless otherwise noted.
SYMBOL PARAMETER
AC Performance
t
S
Settling Time (Note 7)
±0.024%
(±1LSB at 12 Bits)
±0.006%
(±1LSB at 14 Bits)
±0.0015%
(±1LSB at 16 Bits)
±0.024%
(±1LSB at 12 Bits)
±0.006%
(±1LSB at 14 Bits)
±0.0015%
(±1LSB at 16 Bits)
7
7
9
2.7
4.8
0.8
1000
12
180
120
100
15
7
9
10
2.7
4.8
5.2
0.8
1000
12
180
120
100
15
µs
µs
µs
µs
µs
µs
V/µs
pF
nV • s
kHz
nV/√Hz
nV/√Hz
µV
P-P
CONDITIONS
LTC2627/LTC2627-1 LTC2617/LTC2617-1 LTC2607/LTC2607-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
ELECTRICAL CHARACTERISTICS
Settling Time for 1LSB Step
(Note 8)
Voltage Output Slew Rate
Capacitive Load Driving
Glitch Impulse
Multiplying Bandwidth
e
n
Output Voltage Noise Density
Output Voltage Noise
2.7
0.8
1000
At Midscale Transition
At f = 1kHz
At f = 10kHz
0.1Hz to 10Hz
12
180
120
100
15
The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (See Figure 1) (Notes 10, 11)
SYMBOL PARAMETER
V
CC
= 2.7V to 5.5V
f
SCL
SCL Clock Frequency
t
HD(STA)
Hold Time (Repeated) Start Condition
t
LOW
Low Period of the SCL Clock Pin
t
HIGH
High Period of the SCL Clock Pin
t
SU(STA)
Set-Up Time for a Repeated Start Condition
t
HD(DAT)
Data Hold Time
t
SU(DAT)
Data Set-Up Time
t
r
Rise Time of Both SDA and SCL Signals
t
f
Fall Time of Both SDA and SCL Signals
t
SU(STO)
Set-Up Time for Stop Condition
t
BUF
Bus Free Time Between a Stop and Start Condition
t
1
Falling Edge of 9th Clock of the 3rd Input Byte
to LDAC High or Low Transition
t
2
LDAC Low Pulse Width
CONDITIONS
●
●
●
●
●
●
●
TI I G CHARACTERISTICS
Note 1:
Absolute maximum ratings are those values beyond which the life of
a device may be impaired.
Note 2:
Linearity and monotonicity are defined from code k
L
to code
2
N
– 1, where N is the resolution and k
L
is given by k
L
= 0.016(2
N
/V
REF
),
rounded to the nearest whole code. For V
REF
= 4.096V and N = 16, k
L
= 256
and linearity is defined from code 256 to code 65,535.
Note 3:
SDA, SCL and LDAC at 0V or V
CC
, CA0, CA1 and CA2 Floating.
Note 4:
DC crosstalk is measured with V
CC
= 5V and V
REF
= 4.096V, with the
measured DAC at midscale, unless otherwise noted.
Note 5:
R
L
= 2kΩ to GND or V
CC
.
4
UW
MIN
0
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
1.3
400
20
TYP
MAX
400
UNITS
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
ns
ns
0.9
300
300
(Note 9)
(Note 9)
●
●
●
●
●
●
Note 6:
Inferred from measurement at code k
L
(Note 2) and at full scale.
Note 7:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped 1/4 scale to 3/4 scale and
3/4 scale to 1/4 scale. Load is 2k in parallel with 200pF to GND.
Note 8:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped
±1LSB
between half scale
and half scale – 1. Load is 2k in parallel with 200pF to GND.
Note 9:
C
B
= capacitance of one bus line in pF.
Note 10:
All values refer to V
IH(MIN)
and V
IL(MAX)
levels.
Note 11:
These specifications apply to LTC2607/LTC2607-1,
LTC2617/LTC2617-1, LTC2627/LTC2627-1.
Note 12:
Guaranteed by design and not production tested.
26071727f
LTC2607/LTC2617/LTC2627
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2607
Integral Nonlinearity (INL)
32
24
16
DNL (LSB)
INL (LSB)
V
CC
= 5V
V
REF
= 4.096V
0
–8
–16
–24
–32
0
16384
32768
CODE
49152
65535
2607 G01
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2607 G02
INL (LSB)
8
DNL vs Temperature
1.0
0.8
0.6
16
0.4
DNL (POS)
8
0
–8
–16
–0.6
–0.8
–1.0
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
–24
–32
V
CC
= 5V
V
REF
= 4.096V
32
24
DNL (LSB)
0
–0.2
–0.4
DNL (NEG)
DNL (LSB)
INL (LSB)
0.2
Settling to
±1LSB
V
OUT
100µV/DIV
9TH CLOCK
OF 3RD DATA
BYTE
9.7µs
SCL
2V/DIV
V
CC
= 5V, V
REF
= 4.096V
1/4-SCALE TO 3/4-SCALE STEP
R
L
= 2k, C
L
= 200pF
AVERAGE OF 2048 EVENTS
U W
2607 G04
Differential Nonlinearity (DNL)
1.0
0.8
0.6
0.4
0.2
16
8
0
–8
–16
–24
V
CC
= 5V
V
REF
= 4.096V
32
24
INL vs Temperature
V
CC
= 5V
V
REF
= 4.096V
INL (POS)
INL (NEG)
–32
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
2607 G03
INL vs V
REF
V
CC
= 5.5V
1.5
1.0
INL (POS)
0.5
DNL vs V
REF
V
CC
= 5.5V
DNL (POS)
0
DNL (NEG)
–0.5
–1.0
–1.5
INL (NEG)
0
1
2
3
V
REF
(V)
4
5
2607 G05
0
1
2
3
V
REF
(V)
4
5
2607 G06
Settling of Full-Scale Step
V
OUT
100µV/DIV
SCL
2V/DIV
12.3µs
9TH CLOCK OF
3RD DATA BYTE
2µs/DIV
2607 G07
5µs/DIV
2607 G08
SETTLING TO
±1LSB
V
CC
= 5V, V
REF
= 4.096V
CODE 512 TO 65535 STEP
AVERAGE OF 2048 EVENTS
26071727f
5
