analog voltage-controlled pulse width modulation (PWM)
capability. The LTC6992 is part of the TimerBlox™ family
of versatile silicon timing devices.
A single resistor, R
SET
, programs the LTC6992’s inter-
nal master oscillator frequency. The output frequency
is determined by this master oscillator and an internal
frequency divider, N
DIV
, programmable to eight settings
from 1 to 16384.
f
OUT
=
1MHz 50kΩ
•
, N = 1,4,16 …16384
N
DIV
R
SET DIV
n
n
n
n
n
n
n
n
n
n
Pulse Width Modulation (PWM) Controlled by
Simple 0V to 1V Analog Input
Four Available Options Define Duty Cycle Limits
–
Minimum Duty Cycle at 0% or 5%
–
Maximum Duty Cycle at 95% or 100%
Frequency Range: 3.81Hz to 1MHz
Single Resistor Programs Frequency with < 2.4%
Maximum Error
PWM Duty Cycle Error < 4.5% Maximum
Frequency Modulation (VCO) Capability
2.25V to 5.5V Single Supply Operation
115μA Supply Current at 100kHz
500μs Start-Up Time
CMOS Output Driver Sources/Sinks 20mA
–40°C to 125°C Operating Temperature Range
Available in Low Profile (1mm) SOT-23 (ThinSOT™)
and 2mm
×
3mm DFN
Applying a voltage between 0V and 1V on the MOD pin sets
the duty cycle, according to the following formula:
Duty Cycle
=
−
100mV
V
MOD
1 V
− ≅
MOD
0.8 • V
SET
8
800mV
APPLICATIONS
n
n
n
n
LED Dimming Control
PWM Servo Loops
High Vibration, High Acceleration Environments
Portable and Battery-Powered Equipment
The four versions differ in their minimum/maximum duty
cycle. Note that a minimum duty cycle limit of 0% or
maximum duty cycle limit of 100% allows oscillations to
stop at the extreme duty cycle settings.
DEVICE NAME
LTC6992-1
LTC6992-2
LTC6992-3
LTC6992-4
PWM DUTY
CYCLE RANGE
0% to 100%
5% to 95%
0% to 95%
5% to 100%
OUTPUT DUTY CYCLE LIMITS
MIN
MAX
GND
V
+
GND
V
+
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
TimerBlox and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
TYPICAL APPLICATION
1MHz Pulse Width Modulator
ANALOG PWM
DUTY CYCLE
CONTROL
(0V TO 1V)
MOD
OUT
V
+
V
+
C1
0.1μF
SET
R
SET
50k
DIV
6992 TA01a
LTC6992
GND
MOD
0.5V/DIV
OUT
1V/DIV
2μs/DIV
6992 TA01b
69921234p
1
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage (V
+
) to GND .........…………………….6V
Maximum Voltage On Any Pin
.............................(GND – 0.3V) ≤ V
PIN
≤ (V
+
+ 0.3V)
Operating Temperature Range (Note 2)
LTC6992C ................................................ 0°C to 70°C
LTC6992I .............................................–40°C to 85°C
LTC6992H .......................................... –40°C to 125°C
Specified Temperature Range (Note 3)
LTC6992C ................................................ 0°C to 70°C
LTC6992I .............................................–40°C to 85°C
LTC6992H .......................................... –40°C to 125°C
Junction Temperature .......................................... 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
V+ 1
DIV 2
SET 3
7
GND
6 OUT
5 GND
4 MOD
MOD 1
GND 2
SET 3
6 OUT
5 V
+
4 DIV
DCB PACKAGE
6-LEAD (2mm 3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JA
= 64°C/W,
θ
JC
= 10.6°C/W
EXPOSED PAD (PIN 7) IS GND, PCB CONNECTION IS OPTIONAL
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
T
JMAX
= 150°C,
θ
JA
= 230°C/W,
θ
JC
= 51°C/W
ORDER INFORMATION
LEAD FREE FINISH
LTC6992CDCB6-1#PBF
LTC6992IDCB6-1#PBF
LTC6992HDCB6-1#PBF
LTC6992CS6-1#PBF
LTC6992IS6-1#PBF
LTC6992HS6-1#PBF
LTC6992CDCB6-2#PBF
LTC6992IDCB6-2#PBF
LTC6992HDCB6-2#PBF
LTC6992CS6-2#PBF
LTC6992IS6-2#PBF
LTC6992HS6-2#PBF
LTC6992CDCB6-3#PBF
LTC6992IDCB6-3#PBF
LTC6992HDCB6-3#PBF
LTC6992CS6-3#PBF
LTC6992IS6-3#PBF
TAPE AND REEL
LTC6992CDCB6-1#TRPBF
LTC6992IDCB6-1#TRPBF
LTC6992HDCB6-1#TRPBF
LTC6992CS6-1#TRPBF
LTC6992IS6-1#TRPBF
LTC6992HS6-1#TRPBF
LTC6992CDCB6-2#TRPBF
LTC6992IDCB6-2#TRPBF
LTC6992HDCB6-2#TRPBF
LTC6992CS6-2#TRPBF
LTC6992IS6-2#TRPBF
LTC6992HS6-2#TRPBF
LTC6992CDCB6-3#TRPBF
LTC6992IDCB6-3#TRPBF
LTC6992HDCB6-3#TRPBF
LTC6992CS6-3#TRPBF
LTC6992IS6-3#TRPBF
PART MARKING*
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
PACKAGE DESCRIPTION
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
69921234p
2
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
ORDER INFORMATION
LEAD FREE FINISH
LTC6992HS6-3#PBF
LTC6992CDCB6-4#PBF
LTC6992IDCB6-4#PBF
LTC6992HDCB6-4#PBF
LTC6992CS6-4#PBF
LTC6992IS6-4#PBF
LTC6992HS6-4#PBF
TAPE AND REEL
LTC6992HS6-3#TRPBF
LTC6992CDCB6-4#TRPBF
LTC6992IDCB6-4#TRPBF
LTC6992HDCB6-4#TRPBF
LTC6992CS6-4#TRPBF
LTC6992IS6-4#TRPBF
LTC6992HS6-4#TRPBF
PART MARKING*
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
PACKAGE DESCRIPTION
6-Lead Plastic TSOT-23
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
SPECIFIED TEMPERATURE RANGE
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, V
MOD
= 0V to V
SET
,
DIVCODE = 0 to 15 (N
DIV
= 1 to 16,384), R
SET
= 50k to 800k, R
LOAD
= 5k, C
LOAD
= 5pF unless otherwise noted.
SYMBOL
f
OUT
Δf
OUT
Δf
OUT
/ΔT
Δf
OUT
/ΔV
+
PARAMETER
Output Frequency
Frequency Accuracy (Note 4)
Frequency Drift Over Temperature
Frequency Drift Over Supply
Period Jitter (Note 11)
V
+
= 4.5V to 5.5V
V
+
= 2.25V to 4.5V
N
DIV
= 1
N
DIV
= 4
N
DIV
= 16
Long-Term Stability of Output
Frequency (Note 9)
BW
FM
t
S,FM
Frequency Modulation Bandwidth
Frequency Change Settling Time
(Note 10)
PWM Duty Cycle Accuracy
Maximum Duty Cycle Limit
Minimum Duty Cycle Limit
PWM Duty Cycle Bandwidth
Duty Cycle Setting Time (Note 6)
t
MASTER
= t
OUT
/N
DIV
t
MASTER
= t
OUT
/N
DIV
3.81Hz ≤ f
OUT
≤ 1MHz
l
l
l
l
ELECTRICAL CHARACTERISTICS
Oscillation Frequency
CONDITIONS
MIN
3.81
TYP
MAX
1000000
UNITS
Hz
%
%
%/°C
%/V
%/V
%
P-P
%
P-P
%
RMS
%
P-P
%
RMS
ppm/√kHz
kHz
μs
±0.8
±0.005
0.25
0.08
1.2
0.4
0.07
0.15
0.022
TBD
TBD
TBD
±1.7
±2.4
0.65
0.18
Pulse Width Modulation
ΔD
D
MAX
D
MIN
BW
PWM
t
S,PWM
V
MOD
= 0.2 • V
SET
to 0.8 • V
SET
V
MOD
< 0.2 • V
SET
or V
MOD
> 0.8 • V
SET
l
l
±1.5
±2.0
100
90.5
1
95
5
TBD
TBD
±4.5
±4.9
99
0
9.5
%
%
%
%
%
%
kHz
μs
LTC6992-1/LTC6992-3, POL = 0, V
MOD
= 1V
l
LTC6992-2/LTC6992-4, POL = 0, V
MOD
= 1V
l
LTC6992-1/LTC6992-4, POL = 0, V
MOD
= 0V
l
LTC6992-2/LTC6992-3, POL = 0, V
MOD
= 0V
l
69921234p
3
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, V
MOD
= 0V to V
SET
,
DIVCODE = 0 to 15 (N
DIV
= 1 to 16,384), R
SET
= 50k to 800k, R
LOAD
= 5k, C
LOAD
= 5pF unless otherwise noted.
SYMBOL
V
+
I
S
PARAMETER
Operating Supply Voltage Range
Power-On Reset Voltage
Supply Current
R
L
= ∞, R
SET
= 50k,
N
DIV
= 1
R
L
= ∞, R
SET
= 50k,
N
DIV
= 4
R
L
= ∞, R
SET
= 50k,
N
DIV
≥ 16
R
L
= ∞, R
SET
= 800k,
N
DIV
= 1 to 16, 384
Analog Inputs
V
SET
ΔV
SET
/ΔT
R
SET
Voltage at SET Pin
V
SET
Drift Over Temperature
Frequency-Setting Resistor
MOD Pin Input Capacitance
MOD Pin Input Current
V
MOD,HI
V
MOD,LO
V
DIV
ΔV
DIV
/ΔV
+
V
MOD
Voltage for Maximum Duty
Cycle
V
MOD
Voltage for Minimum Duty
Cycle
DIV Pin Voltage
DIV Pin Valid Code Range (Note 5)
DIV Pin Input Current
Digital Output
I
OUT(MAX)
V
OH
Output Output Current
High Level Output Voltage
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
V
OL
Low Level Output Voltage
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
I
OUT
= –1mA
I
OUT
= –16mA
I
OUT
= –1mA
I
OUT
= –10mA
I
OUT
= –1mA
I
OUT
= -8mA
I
OUT
= 1mA
I
OUT
= 16mA
I
OUT
= 1mA
I
OUT
= 10mA
I
OUT
= 1mA
I
OUT
= 8mA
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
ELECTRICAL CHARACTERISTICS
Power Supply
CONDITIONS
l
l
MIN
2.25
TYP
MAX
5.5
1.95
UNITS
V
V
μA
μA
μA
μA
μA
μA
μA
μA
V
μV/°C
kΩ
pF
nA
V
V
V
V
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
l
l
l
l
l
l
l
l
365
225
350
225
325
215
120
105
0.97
50
2.5
1.00
±75
450
285
420
280
390
265
170
150
1.03
800
±10
LTC6992-1/LTC6992-4, POL = 0, D = 100%
LTC6992-2/LTC6992-3, POL = 0, D = 95%
LTC6992-1/LTC6992-3, POL = 0, D = 0%
LTC6992-2/LTC6992-4, POL = 0, D = 5%
Deviation from Ideal
V
DIV
/V
+
= (DIVCODE + 0.5)/16
l
l
0.064 • V
SET
l
l
l
0.90 • V
SET
0.86 • V
SET
0.10 • V
SET
0.14 • V
SET
0.936•V
SET
0
V
+
±1.5
±10nA
±20
V
%
mA
V
V
V
V
V
V
0.04
0.54
0.05
0.46
0.07
0.54
V
V
V
V
V
V
5.45
4.84
3.24
2.75
2.17
1.58
5.48
5.15
3.27
2.99
2.21
1.88
0.02
0.26
0.03
0.22
0.03
0.26
69921234p
4
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
ELECTRICAL CHARACTERISTICS
SYMBOL
t
r
PARAMETER
Output Rise Time (Note 8)
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, V
MOD
= 0V to V
SET
,
DIVCODE = 0 to 15 (N
DIV
= 1 to 16,384), R
SET
= 50k to 800k, R
LOAD
= 5k, C
LOAD
= 5pF unless otherwise noted.
CONDITIONS
MIN
TYP
1.1
1.7
2.7
1.0
1.6
2.4
MAX
UNITS
ns
ns
ns
ns
ns
ns
t
f
Output Fall Time (Note 8)
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC6992C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 3:
The LTC6992C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6992C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but it is not tested or
QA sampled at these temperatures. The LTC6992I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6992H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 4:
Frequency accuracy is defined as the deviation from the f
OUT
equation, assuming R
SET
is used to program the frequency.
Note 5:
See Operation section, Table 1 and Figure 2 for a full explanation
of how the DIV pin voltage selects the value of DIVCODE.
Note 6:
Duty cycle setting time is the is the amount of time required for
the output to settle within ±1% of the final duty cycle after a ±10% change
in the setting (±80mV step in V
MOD
).
Note 7:
To conform to the Logic IC Standard, current out of a pin is
arbitrarily given a negative value.
Note 8:
Output rise and fall times are measured between the 10% and the
90% power supply levels with 5pF output load. These specifications are
based on characterization.
Note 9:
Long term drift on silicon oscillators is primarily due to the
movement of ions and impurities within the silicon and is tested at 30°C
under otherwise nominal operating conditions. Long term drift is specified
as ppm/√kHr due to the typically non-linear nature of the drift. To calculate
drift for a set time period, translate that time into thousands of hours, take
the square root and multiply by the typical drift number. For instance, a
year is 8.77kHr and would yield a drift of 888ppm at 300ppm/√kHr. Drift
without power applied to the device may be approximated as 1/10th of the
drift with power, or 30ppm/√kHr for a 300ppm/√kHr device.
Note 10:
Frequency change settling time is the amount of time required
for the output to settle within ±1% of the final frequency after a 0.5x or 2x
change in I
SET
.
Note 11:
Jitter is the ratio of the peak-to-peak deviation of the period to
the mean of the period. This specification is based on characterization and
DSP 与 ARM 处理器
