Ordering number : ENA0716C
CMOS IC
LV51134T
Overview
2-Cell Lithium-Ion Secondary Battery
Protection IC
The LV51134T is a protection IC for 2-cell lithium-ion secondary batteries.
Features
•
Monitoring function for each cell:
•
High detection voltage accuracy:
•
Hysteresis cancel function:
•
Discharge current monitoring function:
•
Low current consumption:
•
0V cell charging function:
Detects overcharge and over-discharge conditions and controls the
charging and discharging operation of each cell.
Over-charge detection accuracy
±25mV
Over-discharge detection accuracy ±100mV
The hysteresis of over-discharge detection voltage is cancelled by
connection of a load after overcharging has been detected.
Detects over-currents, load shorting, and excessively high voltage of a
charger.
Normal operation mode typ. 6.0μA
Stand by mode
max. 0.2μA
Charging is enabled even when the cell voltage is 0V by giving a
voltage between the VDD pin and V- pin.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer
'
s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
'
s products or
equipment.
81011HKPC/N2107MS 20071031-S00002/52307MSIM/32207MSIM 20070208-S00009 No.A0716-1/8
LV51134T
Specifications
Absolute Maximum Ratings
at Ta = 25°C
Parameter
Power supply voltage
Input voltage
Charger minus voltage
Output voltage
Cout pin voltage
Dout pin voltage
Allowable power dissipation
Operating ambient temperature
Storage temperature
Vcout
Vdout
Pd max
Topr
Tstg
Independent IC
VDD-28 to VDD+0.3
VSS-0.3 to VDD+0.3
170
-30 to +80
-40 to +125
V
V
mW
°C
°C
Symbol
VDD
V-
Conditions
Ratings
-0.3 to +12
VDD-28 to VDD+0.3
Unit
V
V
Electrical Characteristics
at Ta = 25°C, unless especially specified.
Parameter
Operation input voltage
0V cell charging minimum operation
voltage
Over-charge detection voltage
Vd1
Ta=0 to 45°C *1
Over-charge release voltage
Vr1
V-
≤
Vd3
V- > Vd3
Over-charge detection delay time
Over-charge release delay time
Over-discharge detection voltage
Over-discharge release hysteresis
voltage
Over-discharge detection delay time
Over-discharge release delay time
Over-current detection voltage
Over-current release hysteresis voltage
Over-current detection delay time
Over-current release delay time
Short circuit detection voltage
Short circuit detection delay time
Excessive charger detection voltage
Excessive charge detection release
hysteresis voltage
Stand-by release voltage
Excessive charger detection delay time
Excessive charger release delay time
Internal resistance (VM-VDD)
Internal resistance (VM-VSS)
Cout Nch ON voltage
Cout Pch ON voltage
Dout Nch ON voltage
Dout Pch ON voltage
Vc input current
Current consumption
Stand-by current
T-terminal input ON voltage
Vstb
td5
tr5
RDD
RSS
VOL1
VOH1
VOL2
VOH2
Ivc
IDD
Istb
Vtest
Between VDD-Vc=2.0V, Vc-VSS=2.0V
Voltage between V- and VSS
VDD-Vc=3.5V, Vc-VSS=3.5V *2
VDD-Vc=3.5V, Vc-VSS=3.5V
After over-discharge is detected.
After over-current or short-circuit is detected.
IOL=50μA, VDD-Vc=4.4V, Vc-VSS=4.4V
IOL=50μA, VDD-Vc=3.9V, Vc-VSS=3.9V
IOL=50μA, VDD-Vc=2.2V, Vc-VSS=2.2V
IOL=50μA, VDD-Vc=3.9V, Vc-VSS=3.9V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD-Vc=2.2V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD
×0.4
VDD
×0.5
VDD-0.5
0.0
6.0
1.0
13.0
0.2
VDD
×0.6
VDD-0.5
0.5
VDD
×0.4
0.5
0.5
100
15
VDD
×0.5
1.5
1.5
200
30
VDD
×0.6
3.0
3.0
400
60
0.5
V
ms
ms
kΩ
kΩ
V
V
V
V
μA
μA
μA
V
td2
tr2
Vd3
Vh3
td3
tr3
Vd4
td4
Vd5
Vh5
VDD-Vc=3.5V→2.2V, Vc-VSS=3.5V
VDD-Vc=2.2V→3.5V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
VDD-Vc=3.5V, Vc-VSS=3.5V
Between VDD-Vc=3.5V, Vc-VSS=3.5V
Voltage between V- and VSS
VDD-Vc=3.5V, Vc-VSS=3.5V
50
0.5
0.28
5.0
10.0
0.5
1.0
0.125
-0.60
25.0
100
1.0
0.30
10.0
20.0
1.0
1.3
0.250
-0.45
50.0
150
1.5
0.32
20.0
30.0
1.5
1.6
0.500
-0.30
100.0
ms
ms
V
mV
ms
ms
V
ms
V
mV
td1
tr1
Vd2
Vh2
VDD-Vc=3.5V→4.5V, Vc-VSS=3.5V
VDD-Vc=4.5V→3.5V, Vc-VSS=3.5V
4.225
4.215
4.000
4.150
0.5
20.0
2.40
10.0
1.0
40.0
2.50
20.0
4.250
4.250
4.050
4.275
4.285
4.100
4.260
1.5
60.0
2.60
44.0
V
V
V
V
s
ms
V
mV
Symbol
Vcell
Vmin
Conditions
Voltage between VDD and VSS
Voltage between VDD-V- under VDD-VSS =0
Ratings
min
1.5
typ
max
10
1.5
Unit
V
V
*1 The Ratings of the table above is a design targets and are not measured.
*2 Under over-discharge state, delay operation starts after release of over-discharge.
No.A0716-2/8
LV51134T
Package Dimensions
unit : mm (typ)
3245B
200
Pd max -- Ta
Independent IC
3.0
8
Allowable power dissipation, Pd max -- mW
170
150
3.0
4.9
100
0.5
1
(0.53)
2
0.65
0.25
(0.85)
1.1MAX
68
50
0.125
0
-30 -20
0
20
40
60
80
100
Ambient temperature, Ta --
°C
0.08
SANYO : MSOP8(150mil)
Pin Assignment
Dout
8
T
7
Vc Sense
6
5
2
VDD Cout
1
3
V-
4
VSS
Top view
Pin Functions
Pin No.
1
2
3
4
5
6
7
8
VDD
Cout
V-
VSS
Sense
Vc
T
Dout
Symbol
VDD pin
Overcharge detection output pin
Charger minus voltage input pin
VSS pin
Sense pin
Intermediate between both cell voltage input pin
Pin to shorten detection time (“H”:Shortening mode, “L” or “Open”:Normal mode)
Overdischarge detection output pin
Description
No.A0716-3/8
LV51134T
Block Diagram
Sence
5
VDD
1
Level shift
+
-
+
-
+
-
td5,tr5
td1,tr1
Delay
control
logic
td2,tr2
2 Cout
Vc 6
+
-
+
-
+
-
8 Dout
td3,tr3
+
-
td4
4
VSS
3
V-
7
T
No.A0716-4/8
LV51134T
Functional Description
Over-charge detection
If either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by
turning “L” the Cout pin and turning off external Nch MOS FET after the over-charge detection delay time.
This delay time is set by the internal counter.
The over-charge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by
connecting the load after detection of over-charge detection. and it becomes small hysteresis comparator has its own.
Once over-charge detection is made, over-current detection is not made to prevent incorrect operations. Note that
short-circuit can be detected.
Over-charge release
If both cell voltages become equal to or less than the over-charge release voltage when VM voltage is equal to or less
than Vd3, or when VM voltage is more than Vd3 with load connected, the Cout pin returns to “H” after the over-
charge release delay time set by the internal counter.
When VM voltage is more than Vd3 with load connected and either cell or both cell voltages are equal to or more
than the over-charge release voltage, the Cout pin does not return to “H”. But the load current flows through the
parasitic diode of external Nch MOS FET on Cout, consequently each cell voltage becomes equal to or less than
over-charge release voltage, the Cout pin returns to “H.” after the over-charge release delay time.
However, excessive voltage charger is connected as mentioned below, Cout pin does not return to “H” because
excessive charger detection starts after over-charge release operation.
Over-discharge detection
When either cell voltage is equal to or less than over-discharge voltage, the IC stops further discharging by turning
the Dout pin “L” and turning off external Nch MOS FET after the over-charge detection delay time.
The IC goes into stand-by mode after detecting over-discharge and its consumption current is kept at about 0A. After
over-discharge detection, the V- pin will be connected to VDD pin via internal resistor (typ 200kΩ).
Over-discharge release
Release from over-discharge is made by only connecting charger. If the V- pin voltage becomes equal to or lower
than the stand-by release voltage by connecting charger after detecting over-discharge, The IC is released from the
stand-by state to start cell voltage monitoring. While both cell voltages are equal to or less than over-discharge
voltages, charging will be made through the parasitic diode of external Nch FET on Dout pin. If both cell voltages
become equal to or more than the over-discharge detection voltage by charging, the Dout pin returns to “H” after the
over-discharge release delay time set by the internal counter.
Over-current detection
When excessive current flows through the battery, the V- pin voltage rises by the ON resister of external MOS FET
and becomes equal to or more than the over-current detection voltage, the Dout pin turns to “L” after the over-current
detection delay time and the external Nch MOS FET is turned off to prevent excessive current in the circuit. The
detection delay time is set by the internal counter. After detection, the V- pin will be connected to VSS via internal
resistor (typ. 30kΩ). It will not go into stand-by mode after detecting over-current.
Short circuit detection
If greater discharging current flows through the battery and the V- pin voltage becomes equal to or more than the
short-circuit detection voltage, it will go into short-circuit detection state after the short circuit delay time shorter than
the over-current detection delay time. When short-circuit is detected, just like the time of over-current detection, the
Dout pin turns to “L” and external Nch MOS FET is turned off to prevent high current in the circuit. The V- pin will
be connected to VSS after detection via internal resistor (typ. 30kΩ). It will not go into stand-by mode after detecting
short circuit.
Over-current/short-detection release
After detecting over-current or short circuit, the internal resistor (typ. 30kΩ) between V- pin and VSS pin becomes
effective. If the load resistor is removed, the V- pin voltage will be pulled down to the VSS level. Thereafter, the IC
will be released from the over-current/short-circuit detection state when the V- pin voltage becomes equal to or less
than the over-current detection voltage, and the Dout pin returns to “H” after over-current release delay time set by
the internal counter.
No.A0716-5/8
模拟电子
