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LV7620DEV-FREQ-T500

LVDS Output Clock Oscillator, 80MHz Min, 250MHz Max, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC, J LEADED, LCC-6

器件类别:无源元件    振荡器   

厂商名称:Pletronics

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器件参数
参数名称
属性值
厂商名称
Pletronics
Reach Compliance Code
unknown
其他特性
ENABLE/DISABLE FUNCTION; TAPE AND REEL
最长下降时间
0.7 ns
频率调整-机械
NO
频率稳定性
20%
JESD-609代码
e4
制造商序列号
LV76D
安装特点
SURFACE MOUNT
最大工作频率
250 MHz
最小工作频率
80 MHz
最高工作温度
85 °C
最低工作温度
-40 °C
振荡器类型
LVDS
输出负载
50 OHM
物理尺寸
8.91mm x 9.04mm x 2.62mm
最长上升时间
0.7 ns
最大供电电压
3.63 V
最小供电电压
2.97 V
标称供电电压
3.3 V
表面贴装
YES
最大对称度
55/45 %
端子面层
GOLD
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LV76D Series 3.3 V
LVDS Clock Oscillators
January 2008
This device is obsolete, January 2008
This is replaced by the LV96xxDV device
For new designs use the LV99xxDV device
• Pletronics’ LV76D Series is a quartz crystal
controlled precision square wave generator with
an LVDS output.
• FR4 base with a mechanical metal cover.
• Solder pad compatible with many 9x14mm plastic
J lead packages.
• Has internal bypass capacitor on the Vcc lead
• Tape and Reel or cut tape packaging is available.
• 80 to 250 MHz
• 9.04mm x 8.91mm (S package)
• Enable/Disable Function on pad 1
(see LV78D for E/D on pad 2)
• Disable function includes low standby power
mode
• 3
rd
Overtone Crystals used
• Low Jitter
• 5x7 mm LCC ceramic oscillator inside
Pletronics Inc. certifies this device is in accordance with the
RoHS 5/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.4 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
V
CC
Supply Voltage
Vi
Vo
Input Voltage
Output Voltage
Unit
-0.5V to +5.0V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
Thermal Characteristics
The maximum die or junction temperature is 155
o
C
The thermal resistance junction to board is 60 to 100
o
C/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product information is current as of publication date. The product conforms
Copyright © 2006, 2007, 2008 Pletronics
Inc.
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necessarily include testing of all parameters.
LV76D Series 3.3 V
LVDS Clock Oscillators
January 2008
Part Number:
LV76
45
D
E
V
-125.0M
-XX
Packaging code or blank
T250 = 250 per Tape and Reel
T500 = 500 per Tape and Reel
T1K = 1000 per Tape and Reel
Frequency in MHz
Supply Voltage V
CC
V
= 3.3V _ 10%
+
Optional Enhanced OTR
Blank
= Temp. range -10 to +70
o
C
E
= Temp. range -40 to +85
o
C
Series Model
Frequency Stability
45
= + 50 ppm
_
44
= + 25 ppm
_
20
= + 20 ppm
_
Series Model
Marking Legend:
PLE = Pletronics
FF.FFF
M = Frequency in MHz
YYWW or YWW or
YMD
= Date of Manufacture (year and week, or year-month-day)
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc. are
not identified from the marking. External packaging labels and packing list will correctly identify the
ordered Pletronics part number.
Codes for Date Code YMD
Code
Year
Code
Month
Code
Day
Code
Day
Code
Day
1
1
D
13
T
25
6
2006
A
JAN
2
2
E
14
U
26
7
2007
B
FEB
3
3
F
15
V
27
8
2008
C
MAR
4
4
G
16
W
28
9
2009
D
APR
E
MAY
5
5
H
17
X
29
0
2010
F
JUN
6
6
J
18
Y
30
1
2011
G
JUL
7
7
K
19
Z
31
H
AUG
8
8
L
20
2
2012
J
SEP
9
9
M
21
K
OCT
A
10
N
22
L
NOV
B
11
P
23
M
DEC
C
12
R
24
Part Marking:
PLE
LV76D
FF.FFF
M
C
YMDXX
or
LV76DX
FF.FFF
M
PLE XX
C
YYWWXX
www.pletronics.com
425-776-1880
2
LV76D Series 3.3 V
LVDS Clock Oscillators
January 2008
Electrical Specification for 3.30V _10% over the specified temperature range
+
Item
Frequency Range
Frequency Accuracy “45"
“44"
“20"
Output Waveform
Output High Level
Output Low Level
Differential Output (V
OD
)
Output Offset Voltage (V
OS
)
Differential Output Error (dV
OS
)
Output Symmetry
Output T
RISE
and T
FALL
Jitter
--
0.90
247
1.125
--
45
300
-
-
Vcc Supply Current
Enable/Disable Internal Pull-up
V disable
V enable
Output leakage
V
OUT
= V
CC
V
OUT
= 0V
Enable
Disable time
Start up time
Operating Temperature Range
-
50
-
2.0
-10
-10
-
-
-
-10
-40
Storage Temperature Range
Standby Current I
CC
-55
-
Min
80
-50
-25
-20
Max
250
+50
+25
+20
LVDS
1.60
--
454
1.375
50
55
700
0.15
2.8
66
-
0.8
-
+10
+10
10
10
5
+70
+85
+125
3
mA
Kohm
Volts
Volts
uA
uA
nS
nS
mS
o
Unit
MHz
ppm
Condition
For all supply voltages, load changes, aging for
1 year, shock, vibration and temperatures
Volts
Volts
mVolts
Volts
mVolts
%
pS
pS RMS
See load circuit
See load circuit
See load circuit
See load circuit
See load circuit
R1 = 50 ohms
R1 = 50 ohms
R1 = 50 ohms
R1 = 50 ohms
R1 = 50 ohms
Referenced to 50% of amplitude or crossing
point
Vth is 20% and 80% of waveform
Measured from 12KHz to 20MHz from Fnominal
Measured from 10Hz to 1MHz from Fnominal
Includes current of properly terminated device
To Vcc (equivalent resistance)
Referenced to Ground
Referenced to Ground
Pad 1 low, device disabled
Time for output to reach a logic state
Time for output to reach a high Z state
Measured from the time Vcc = 3.0V
Standard Temperature Range
Extended Temperature Range
“E” Option
C
C
C
o
o
uA
Pad 1 low, device disabled
Specifications with Pad 1 E/D open circuit
Typical Phase-Noise Response
www.pletronics.com
425-776-1880
3
LV76D Series 3.3 V
LVDS Clock Oscillators
January 2008
0
-20
-40
dBc/Hz
-60
-80
-100
-120
-140
-160
10
1,000
100,000
10,000,000
Frequency (Hz)
Load Circuit
Test Waveform
Symmetry
Vhigh
80%
50%
20%
Vlow
Trise
Tfall
Out
Out*
Showing Out Measurement only
www.pletronics.com
425-776-1880
4
LV76D Series 3.3 V
LVDS Clock Oscillators
January 2008
Reliability
: Environmental Compliance
Parameter
Mechanical Shock
Vibration
Solderability
Thermal Shock
Condition
MIL-STD-883 Method 2002, Condition B
MIL-STD-883 Method 2007, Condition A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Human Body Model
Charged Device Model
Minimum Voltage
1500
1000
Conditions
MIL-STD-883 Method 3115
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
Layout and application information
Recommend connecting Pad 1 and Pad 2 together to permit the design to accept Enable/Disable on both
input pads (see LV78D for E/D on pad 2)
For Optimum Jitter Performance, Pletronics recommends:
a ground plane under the device
no large transient signals (both current and voltage) should be routed under the device
do not layout near a large magnetic field such as a high frequency switching power supply
do not place near piezoelectric buzzers or mechanical fans.
www.pletronics.com
425-776-1880
5
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