M27C4002
4 Mbit (256Kb x16) UV EPROM and OTP EPROM
s
5V
±
10% SUPPLY VOLTAGE in READ
OPERATION
ACCESS TIME: 45ns
LOW POWER CONSUMPTION:
– Active Current 70mA at 10MHz
– Standby Current 100µA
1
1
40
40
s
s
s
s
s
PROGRAMMING VOLTAGE: 12.75V
±
0.25V
PROGRAMMING TIME: 100µs/word
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 44h
FDIP40W (F)
PDIP40 (B)
JLCC44W (J)
DESCRIPTION
The M27C4002 is a 4 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large programs and
is organised as 262,144 words of 16 bits.
The FDIP40W (window ceramic frit-seal package)
and the JLCC44W (J-lead chip carrier packages)
have transparent lids which allow the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C4002 is offered in PDIP40, PLCC44 and
TSOP40 (10 x 20 mm) packages.
PLCC44 (C)
TSOP40 (N)
10 x 20 mm
Figure 1. Logic Diagram
VCC
VPP
18
A0-A17
16
Q0-Q15
E
G
M27C4002
VSS
AI00727B
September 2000
1/17
M27C4002
Figure 2A. DIP Connections
VPP
E
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
VSS
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
G
40
1
39
2
38
3
37
4
36
5
35
6
34
7
33
8
32
9
31
10
M27C4002
30
11
29
12
28
13
27
14
26
15
25
16
17
24
18
23
19
22
20
21
AI00728
Figure 2B. LCC Connections
VCC
A17
A16
A15
A14
A13
A12
A11
A10
A9
VSS
A8
A7
A6
A5
A4
A3
A2
A1
A0
Q12
Q11
Q10
Q9
Q8
VSS
NC
Q7
Q6
Q5
Q4
Q13
Q14
Q15
E
VPP
NC
VCC
A17
A16
A15
A14
1 44
A13
A12
A11
A10
A9
VSS
NC
A8
A7
A6
A5
12
M27C4002
34
23
Q3
Q2
Q1
Q0
G
NC
A0
A1
A2
A3
A4
AI00729
Figure 2C. TSOP Connections
A9
A10
A11
A12
A13
A14
A15
A16
A17
VCC
VPP
E
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
1
40
VSS
A8
A7
A6
A5
A4
A3
A2
A1
A0
G
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS
Table 1. Signal Names
A0-A17
Q0-Q15
E
G
V
PP
V
CC
V
SS
NC
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program Supply
Supply Voltage
Ground
Not Connected Internally
10
11
M27C4002
(Normal)
31
30
20
21
AI01831
2/17
M27C4002
Table 2. Absolute Maximum Ratings
(1)
Symbol
T
A
T
BIAS
T
STG
V
IO (2)
V
CC
V
A9 (2)
V
PP
Parameter
Ambient Operating Temperature
(3)
Temperature Under Bias
Storage Temperature
Input or Output Voltage (except A9)
Supply Voltage
A9 Voltage
Program Supply Voltage
Value
–40 to 125
–50 to 125
–65 to 150
–2 to 7
–2 to 7
–2 to 13.5
–2 to 14
Unit
°C
°C
°C
V
V
V
V
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
CC
+0.5V with possible overshoot to V
CC
+2V for a period less than 20ns.
3. Depends on range.
Table 3. Operating Modes
Mode
Read
Output Disable
Program
Verify
Program Inhibit
Standby
Electronic Signature
Note: X = V
IH
or V
IL
, V
ID
= 12V
±
0.5V.
E
V
IL
V
IL
V
IL
Pulse
V
IH
V
IH
V
IH
V
IL
G
V
IL
V
IH
V
IH
V
IL
V
IH
X
V
IL
A9
X
X
X
X
X
X
V
ID
V
PP
V
CC
or V
SS
V
CC
or V
SS
V
PP
V
PP
V
PP
V
CC
or V
SS
V
CC
Q15-Q0
Data Out
Hi-Z
Data In
Data Out
Hi-Z
Hi-Z
Codes
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
V
IL
V
IH
Q7
0
0
Q6
0
1
Q5
1
0
Q4
0
0
Q3
0
0
Q2
0
1
Q1
0
0
Q0
0
0
Hex Data
20h
44h
Note: Outputs Q15-Q8 are set to ’0’.
DEVICE OPERATION
The operating modes of the M27C4002 are listed
in the Operating Modes table. A single power sup-
ply is required in the read mode. All inputs are TTL
levels except for V
PP
and 12V on A9 for Electronic
Signature.
Read Mode
The M27C4002 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(t
AVQV
) is equal to the delay from E to output
(t
ELQV
). Data is available at the output after a delay
of t
GLQV
from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least t
AVQV
-t
GLQV
.
3/17
M27C4002
Table 5. AC Measurement Conditions
High Speed
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
≤
10ns
0 to 3V
1.5V
Standard
≤
20ns
0.4V to 2.4V
0.8V and 2V
Figure 3A. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
3V
1.5V
0V
DEVICE
UNDER
TEST
2.0V
0.8V
AI01822
1N914
3.3kΩ
Standard
2.4V
OUT
CL
0.4V
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
AI01823B
Table 6. Capacitance
(1)
(T
A
= 25
°C,
f = 1 MHz)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Test Condit ion
V
IN
= 0V
V
OUT
= 0V
Min
Max
6
12
Unit
pF
pF
Note: 1. Sampled only, not 100% tested.
Standby Mode
The M27C4002 has a standby mode which reduc-
es the supply current from 50mA to 100µA. The
M27C4002 is placed in the standby mode by ap-
plying a CMOS high signal to the E input. When in
the standby mode, the outputs are in a high imped-
ance state, independent of the G input.
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
4/17
M27C4002
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 5V
±
5% or 5V
±
10%; V
PP
= V
CC
)
Symbol
I
LI
I
LO
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 10MHz
Supply Current
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 5MHz
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
V
OH
Output High Voltage CMOS
I
OL
= 2.1mA
I
OH
= –400µA
I
OH
= –100µA
2.4
V
CC
– 0.7V
E = V
IH
E > V
CC
– 0.2V
V
PP
= V
CC
–0.3
2
50
1
100
10
0.8
V
CC
+ 1
0.4
mA
mA
µA
µA
V
V
V
V
V
Min
Max
±10
±10
70
Unit
µA
µA
mA
I
CC
I
CC1
I
CC2
I
PP
V
IL
V
IH (2)
V
OL
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Table 8A. Read Mode AC Characteristics
(1)
(T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 5V
±
5% or 5V
±
10%; V
PP
= V
CC
)
M27C4002
Symbol
Alt
Parameter
Test Condition
- 45
(3)
Min
t
AVQV
t
ELQV
t
GLQV
t
EHQZ (2)
t
GHQZ (2)
t
AXQX
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
Address Valid to
Output Valid
Chip Enable Low to
Output Valid
Output Enable Low
to Output Valid
Chip Enable High to
Output Hi-Z
Output Enable High
to Output Hi-Z
Address Transition
to Output Transition
E = V
IL
, G = V
IL
G = V
IL
E = V
IL
G = V
IL
E = V
IL
E = V
IL
, G = V
IL
0
0
0
Max
45
45
25
30
30
0
0
0
-60
(3)
Min
Max
60
60
30
30
30
0
0
0
-80
Min
Max
80
80
40
30
30
0
0
0
-90
Min
Max
90
90
40
30
30
ns
ns
ns
ns
ns
ns
Unit
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
5/17
