High Performance
Serial MRAM Memory
Description
Mxxxx204 is a magneto-resistive random-access memory
(MRAM). It is offered in density ranging from 4Mbit to 16Mbit.
MRAM technology is analogous to Flash technology with SRAM
compatible read/write timings (Persistent SRAM, P-SRAM). Data is
always non-volatile.
MRAM is a true random-access memory; allowing both reads and
writes to occur randomly in memory. MRAM is ideal for applications
that must store and retrieve data without incurring large latency
penalties. It offers low latency, low power, virtually infinite
endurance and retention, and scalable non-volatile memory
technology.
Mxxxx204 is available in small footprint 8-pad DFN (WSON) and 8-
pin SOIC packages. These packages are compatible with similar
low-power volatile and non-volatile products.
Mxxxx204 is offered with industrial (-40°C to 85°C) and industrial
plus (-40°C to 105°C) operating temperature ranges.
M1004204/M1008204/M1016204
M3004204/M3008204/M3016204
Features
Interface
Typical Applications
•
•
•
•
•
•
Ideal for applications that must store and retrieve data
without incurring large latency penalties.
Factory Automation
Multifunction Printers
Industrial Control And Monitoring
Medical Diagnostics
Data Switches And Routers
Serial Peripheral Interface QSPI (4-4-4)
•
Single Data Rate Mode: 108MHz
•
Double Data Rate Mode: 54MHz
Technology
•
40nm pMTJ STT-MRAM
Virtually unlimited Endurance and Data Retention (see
Endurance and Data Retention specification on page 38)
Density
•
4Mb, 8Mb, 16Mb
Operating Voltage Range
•
VCC: 1.71V – 2.00V
•
VCC: 2.70V – 3.60V
Operating Temperature Range
•
Industrial: -40°C to 85°C
•
Industrial Plus: -40°C to 105°C
Packages
•
8-pad DFN (WSON) (5.0mm x 6.0mm)
•
8-pin SOIC (5.2mm x 5.2mm)
Data Protection
•
Hardware Based: Write Protect Pin (WP#)
Software Based: Address Range Selectable through
Configuration bits (Top/Bottom, Block Protect[2:0])
Identification
•
64-bit Unique ID
•
64-bit User Programmable Serial Number
Augmented Storage Array
•
256-byte User Programmable with Write Protection
Supports JEDEC Reset
RoHS Compliant
•
Block Diagram
CS#
Serial
I/Os
SO / IO[1]
Address Register
Status Register
Command Register
Column
Decoder
IO[3]
V
CC
Row Decoder
WP# / IO[2]
Command
&
Control
High Voltage
Generator
MRAM
MRAM
MRAM
Array
Array
Array
CLK
V
SS
Regulator
Data Buffer
SI / IO[0]
Feb.25.21
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M1004204/M1008204/M1016204 M3004204/M3008204/M3016204
Contents
1.
2.
3.
4.
5.
Performance
............................................................................................................................................................................................3
General Description
...............................................................................................................................................................................3
Ordering Options
....................................................................................................................................................................................4
3.1 Valid Combinations — Standard .........................................................................................................................................................4
Signal Description and Assignment
..................................................................................................................................................7
Package Options
....................................................................................................................................................................................9
5.1 8-Pad DFN (WSON) (Top View)..........................................................................................................................................................9
5.2 8-Pin SOIC (Top View) ........................................................................................................................................................................9
6.
Package Drawings
...............................................................................................................................................................................10
6.1 8-Pad DFN (WSON) ..........................................................................................................................................................................10
6.2 8-Pin SOIC ........................................................................................................................................................................................11
7.
8.
9.
Architecture
............................................................................................................................................................................................12
Device Initialization
..............................................................................................................................................................................14
Memory Map
..........................................................................................................................................................................................16
10. Augmented Storage Array Map
.......................................................................................................................................................16
11. Register Addresses
.............................................................................................................................................................................16
12. Register Map..........................................................................................................................................................................................17
12.1 Status Register / Device Protection Register (Read/Write) ...............................................................................................................17
12.2 Augmented Storage Array Protection Register (Read/Write) ............................................................................................................18
12.3 Device Identification Register (Read Only) ........................................................................................................................................19
12.4 Serial Number Register (Read/Write) ................................................................................................................................................19
12.5 Unique Identification Register (Read Only) .......................................................................................................................................19
12.6 Configuration Register 1 (Read/Write)...............................................................................................................................................20
12.7 Configuration Register 2 (Read/Write)...............................................................................................................................................21
12.8 Configuration Register 3 (Read/Write)...............................................................................................................................................23
12.9 Configuration Register 4 (Read/Write)...............................................................................................................................................23
13. Instruction Set
........................................................................................................................................................................................24
14. Instruction Description and Structures
...........................................................................................................................................27
15. Electrical Specifications
......................................................................................................................................................................38
15.1 CS# Operation & Timing....................................................................................................................................................................42
15.2 Data Output Operation & Timing .......................................................................................................................................................44
15.3 WP# Operation & Timing ...................................................................................................................................................................45
Enter Deep Power Down Command (EDP – B9h) ............................................................................................................................46
Exit Deep Power Down Command (EXDPD - ABh) ..........................................................................................................................47
Enter Hibernate Command (EHBN – BAh) ........................................................................................................................................48
16. Thermal Resistance
.............................................................................................................................................................................49
17. Revision History
....................................................................................................................................................................................50
Feb.25.21
Page 2
M1004204/M1008204/M1016204 M3004204/M3008204/M3016204
1.
Performance
Device Operation
Frequency of Operation
Standby Current
Deep Power Down Current
Hibernate Current
Active Read Current – (4-4-4) SDR @ 108MHz
Active Write Current – (4-4-4) SDR @ 108MHz
Typical Values
108 (maximum)
160 (typical)
5 (typical)
0.1 (typical)
19 (typical)
38 (typical)
Units
MHz
µA
µA
µA
mA
mA
2.
General Description
Mxxxx204 is a magneto-resistive random-access memory (MRAM). It is offered in density ranging from 4Mbit to 16Mbit.
MRAM technology is analogous to Flash technology with SRAM compatible read/write timings (Persistent SRAM, P-SRAM).
Data is always non-volatile.
Figure 1: Technology Comparison
Non-Volatility
Write Performance
Read Performance
Endurance
Power
SRAM
−
√
√
√
−
Flash
√
−
−
−
−
EEPROM
√
−
−
−
−
MRAM
√
√
√
√
√
MRAM is a true random-access memory; allowing both reads and writes to occur randomly in memory. MRAM is ideal for
applications that must store and retrieve data without incurring large latency penalties. It offers low latency, low power,
virtually infinite endurance and retention, and scalable non-volatile memory technology.
Mxxxx204 has a Serial Peripheral Interface (SPI). SPI is a synchronous interface which uses separate lines for data and
clock to help keep the host and slave in perfect synchronization.
The clock tells the receiver exactly when to sample the bits
on the data line. This can be either the rising (low to high) or falling (high to low) or both edges of the clock signal; please
consult the instruction sequences in this datasheet for more details. When the receiver detects that correct edge, it can latch
in the data.
Mxxxx204 is available in small footprint 8-pad DFN (WSON) and 8-pin SOIC packages. These packages are compatible
with similar low-power volatile and non-volatile products.
Mxxxx204 is offered with industrial (-40°C to 85°C) and industrial plus (-40°C to 105°C) operating temperature ranges.
Feb.25.21
Page 3
M1004204/M1008204/M1016204 M3004204/M3008204/M3016204
3.
Ordering Options
The ordering part numbers are formed by a valid combination of the following options:
M 1 004 2 04 0108 X 0I
WA
R
Packing Type
R: Tape & Reel
Y: Tray
Package Type
WA: 8-pad DFN (WSON)
SA: 8-pin SOIC
Temperature Range
0I: Industrial (-40°C to +85°C)
0P: Industrial Plus (-40°C to +105°C)
Reserved
Performance
0108: 108MHz
0054: 54MHz
Sub-Interface Type
04: x4
Interface Type
2: Serial Peripheral Interface (DDR)
Density
004: 4 Megabit
008: 8 Megabit
016: 16 Megabit
Operational Voltage
1: 1.8V (1.71V to 2.0V)
3: 3.0V (2.70V to 3.60V)
Brand – Product Family
M: Renesas - Persistant SRAM
3.1
Valid Combinations — Standard
Valid Combinations list includes device configurations currently available. Contact your local sales office to confirm
availability of specific valid combinations and to check on newly released combinations.
Feb.25.21
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M1004204/M1008204/M1016204 M3004204/M3008204/M3016204
Table 1: Valid Combinations List
Valid Combinations – 108MHz
Base
Part Number
M10042040108X
Temperature
Range
0I, 0P
Package
Type
WA, SA
Packing
Type
R, Y
Part
Number
M10042040108X0IWAR
M10042040108X0IWAY
M10042040108X0ISAR
M10042040108X0ISAY
M10042040108X0PWAR
M10042040108X0PWAY
M10042040108X0PSAR
M10042040108X0PSAY
M30042040108X
0I, 0P
WA, SA
R, Y
M30042040108X0IWAR
M30042040108X0IWAY
M30042040108X0ISAR
M30042040108X0ISAY
M30042040108X0PWAR
M30042040108X0PWAY
M30042040108X0PSAR
M30042040108X0PSAY
M10082040108X
0I, 0P
WA, SA
R, Y
M10082040108X0IWAR
M10082040108X0IWAY
M10082040108X0ISAR
M10082040108X0ISAY
M10082040108X0PWAR
M10082040108X0PWAY
M10082040108X0PSAR
M10082040108X0PSAY
M30082040108X
0I, 0P
WA, SA
R, Y
M30082040108X0IWAR
M30082040108X0IWAY
M30082040108X0ISAR
M30082040108X0ISAY
M30082040108X0PWAR
M30082040108X0PWAY
M30082040108X0PSAR
M30082040108X0PSAY
M10162040108X
0I, 0P
WA, SA
R, Y
M10162040108X0IWAR
M10162040108X0IWAY
M10162040108X0ISAR
M10162040108X0ISAY
M10162040108X0PWAR
M10162040108X0PWAY
M10162040108X0PSAR
M10162040108X0PSAY
M30162040108X
0I, 0P
WA, SA
R, Y
M30162040108X0IWAR
M30162040108X0IWAY
M30162040108X0ISAR
M30162040108X0ISAY
M30162040108X0PWAR
M30162040108X0PWAY
M30162040108X0PSAR
M30162040108X0PSAY
Valid Combinations – 54MHz
Base
Part Number
M10042040054X
Temperature
Range
0I, 0P
Package
Type
WA, SA
Packing
Type
R, Y
Part
Number
M10042040054X0IWAR
M10042040054X0IWAY
M10042040054X0ISAR
M10042040054X0ISAY
M10042040054X0PWAR
M10042040054X0PWAY
M10042040054X0PSAR
M10042040054X0PSAY
M30042040054X
0I, 0P
WA, SA
R, Y
M30042040054X0IWAR
M30042040054X0IWAY
Feb.25.21
Page 5
测试/测量
