ADVANCED AND EVER ADVANCING
Preliminary
MSD
-M32170-U-0003
Mitsubishi 32-bit RISC Single-chip Microcomputers
M32R Family M32R/E Series
32170
Group
M32170F6VFP/WG
M32170F4VFP/WG
M32170F3VFP/WG
User’s Manual
2000-03-17
Ver0.10
NOTE
Information in this manual may be changed without prior notice.
Mitsubishi Electric Corporation
Mitsubishi Electric Semiconductor Systems Corporation
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Notes regarding these materials
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PREFACE
This manual describes the hardware specifica-
tions of Mitsubishi’s 32170 group of 32-bit
CMOS microcomputers.
This manual was created to help you under-
stand the hardware specifications of the
32170-group microcomputers so you can take
full advantage of the versatile performance ca-
pabilities of these microcomputers. The CPU
features and the functionality of each internal
peripheral circuit are described in detail, which
we hope will prove useful for your circuit de-
sign.
For details about the M32R-family software
products and development support tools,
please refer to the user’s manuals and related
other documentation included with your prod-
ucts and tools.
How to read internal I/O register tables
Bit Numbers: Each register is connected with an internal bus of 16-bit
wide, so the bit numbers of the registers located at even
addresses are D0-D7, and those at odd addresses are
D8-D15.
State of Register at Reset: Represents the initial state of each register
immediately after reset with hexadecimal numbers
(undefined bits after reset are indicated each in column
.)
At read:
... read enabled
? ... read disabled (read value invalid)
0 ... Read always as 0
1 ... Read always as 1
: Write enabled
: Write enable conditionally
(include some conditions at write)
: Write disabled (Written value invalid)
{
At write:
-
<Example of representation>
Not implemented
in the shaded portion.
1
D0
1
Abit
2
Bbit
3
Cbit
Registers represented with thick rectangles
are accessible only with halfwords or words
(not accessible with bytes).
4
2
D
0
1
Bit name
Not assigned.
Abit
(...................)
2
Bbit
(...................)
3
Cbit
(...................)
0: -----
1: -----
0: -----
1: -----
0: -----
1: -----
Function
<at reset: H'04>
R
0
W
3
4
Contents
CHAPTER 1 OVERVIEW
1.1 Outline of the 32170 .......................................................................................... 1-2
1.1.1 M32R Family CPU Core ............................................................................. 1-2
1.1.2 Built-in Multiply-Accumulate Operation Function ........................................ 1-3
1.1.3 Built-in Flash Memory and RAM ................................................................. 1-3
1.1.4 Built-in Clock Frequency Multiplier ............................................................. 1-4
1.1.5 Built-in Powerful Peripheral Functions ........................................................ 1-4
1.1.6 Built-in Full-CAN Function .......................................................................... 1-6
1.1.7 Built-in Debug Function .............................................................................. 1-6
1.2 Block Diagram ................................................................................................... 1-7
1.3 Pin Function .................................................................................................... 1-10
1.4 Pin Layout ........................................................................................................ 1-18
CHAPTER 2 CPU
2.1 CPU Registers ................................................................................................... 2-2
2.2 General-purpose Registers .............................................................................. 2-2
2.3 Control Registers .............................................................................................. 2-3
2.3.1 Processor Status Word Register: PSW (CR0) ............................................ 2-4
2.3.2 Condition Bit Register: CBR (CR1) ............................................................. 2-5
2.3.3 Interrupt Stack Pointer: SPI (CR2) .............................................................. 2-5
User Stack Pointer: SPU (CR3) .................................................................. 2-5
2.3.4 Backup PC: BPC (CR6) .............................................................................. 2-5
2.4 Accumulator ...................................................................................................... 2-6
2.5 Program Counter .............................................................................................. 2-6
2.6 Data Formats ..................................................................................................... 2-7
2.6.1 Data Types ................................................................................................. 2-7
2.6.2 Data Formats .............................................................................................. 2-8
(1)
