DRAM MODULE
M364C080(8)4BT0-C
Buffered 8Mx64 DIMM
(4Mx16 base)
Revision 0.1
June 1998
DRAM MODULE
Revision History
Version 0.0 (Sept. 1997)
M364C080(8)4BT0-C
• Removed two AC parameters t
CACP
(access time from CAS) and t
AAP
(access time from col. addr.) in
AC CHARACTERISTICS.
• Changed the parameter t
CAC
(access time from CAS) from 18ns to 20ns @ -5 in
AC CHARACTERISTICS.
Version 0.1 (June 1998)
• The 3rd. generation of 64M components are applied for this module.
DRAM MODULE
M364C080(8)4BT0-C Fast Page Mode
8M x 64 DRAM DIMM Using 4Mx16, 4K & 8K Refresh, 5V
GENERAL DESCRIPTION
The Samsung M364C080(8)4BT0-C is a 4Mx64bits Dynamic
RAM high density memory module. The Samsung
M364C080(8)4BT0-C consists of eight CMOS 4Mx16bits
DRAMs in TSOP-II 400mil packages and two 16 bits driver IC
in TSSOP package mounted on a 168-pin glass-epoxy sub-
strate. A 0.1 or 0.22uF decoupling capacitor is mounted on
the printed circuit board for each DRAM. The
M364C080(8)4BT0-C is a Dual In-line Memory Module and is
intended for mounting into 168 pin edge connector sockets.
M364C080(8)4BT0-C
FEATURES
• Part Identification
Part number
M364C0804BT0-C
M364C0884BT0-C
•
•
•
•
•
•
•
•
PKG
TSOPll
TSOPll
Ref.
4K
8K
CBR Ref.
4K/64ms
ROR Ref.
8K/64ms
4K/64ms
PERFORMANCE RANGE
Speed
-C50
-C60
t
RAC
50ns
60ns
t
CAC
18ns
20ns
t
RC
90ns
110ns
t
PC
35ns
40ns
Fast Page Mode Operation
CAS-before-RAS Refresh capability
RAS-only and Hidden refresh capability
TTL compatible inputs and outputs
Single 5V±10% power supply
JEDEC standard pinout & Buffered PDpin
Buffered input except RAS and DQ
PCB : Height(1000mil), double sided component
PIN CONFIGURATIONS
Pin
Front
Pin
Front
CAS2
RAS0
OE0
V
SS
A0
A2
A4
A6
A8
A10
A12
V
CC
RFU
RFU
V
SS
OE2
RAS2
CAS4
CAS6
W2
V
CC
RSVD
RSVD
DQ18
DQ19
V
SS
DQ20
DQ21
Pin Front Pin
Back
Pin
Back
Pin
Back
V
SS
1
29
DQ0 30
2
DQ1 31
3
DQ2 32
4
DQ3 33
5
V
CC
6
34
DQ4 35
7
DQ5 36
8
DQ6 37
9
10 DQ7 38
11 *DQ8 39
V
SS
12
40
13 DQ9 41
14 DQ10 42
15 DQ11 43
16 DQ12 44
17 DQ13 45
V
CC
18
46
19 DQ14 47
20 DQ15 48
21 DQ16 49
22 *DQ17 50
V
SS
23
51
24 RSVD 52
25 RSVD 53
V
CC
26
54
W0
27
55
28 CAS0 56
57 DQ22 85
V
SS
113 CAS3 141 DQ58
58 DQ23 86 DQ36 114 RAS1 142 DQ59
59
87 DQ37 115 RFU 143 V
CC
V
CC
60 DQ24 88 DQ38 116 V
SS
144 DQ60
61 RFU 89 DQ39 117
A1
145 RFU
62 RFU 90
V
CC
118
A3
146 RFU
63 RFU 91 DQ40 119
A5
147 RFU
64 RFU 92 DQ41 120
A7
148 RFU
65 DQ25 93 DQ42 121
A9
149 DQ61
66 *DQ26 94 DQ43 122 A11 150 *DQ62
67 DQ27 95 *DQ44 123 *A13 151 DQ63
68
V
SS
124 V
CC
152 V
SS
96
V
SS
69 DQ28 97 DQ45 125 RFU 153 DQ64
70 DQ29 98 DQ46 126
B0
154 DQ65
71 DQ30 99 DQ47 127 V
SS
155 DQ66
72 DQ31 100 DQ48 128 RFU 156 DQ67
73
V
CC
101 DQ49 129 RAS3 157 V
CC
74 DQ32 102 V
CC
130 CAS5 158 DQ68
75 DQ33 103 DQ50 131 CAS7 159 DQ69
76 DQ34 104 DQ51 132 PDE 160 DQ70
77 *DQ35 105 DQ52 133 V
CC
161 *DQ71
V
SS
106 *DQ53 134 RSVD 162 V
SS
78
79
PD1 107 V
SS
135 RSVD 163 PD2
80
PD3 108 RSVD 136 DQ54 164 PD4
81
PD5 109 RSVD 137 DQ55 165 PD6
82
PD7 110 V
CC
138 V
SS
166 PD8
83
ID0 111 RFU 139 DQ56 167 ID1
84
V
CC
112 CAS1 140 DQ57 168 V
CC
PIN NAMES
Pin Names
A0, B0, A1 - A11
A0, B0, A1 - A12
DQ0 - DQ71
W0, W2
OE0, OE2
RAS0 - RAS3
CAS0 - CAS7
V
CC
V
SS
NC
PDE
PD1 - 8
ID0 - 1
RSVD
RFU
Function
Address Input(4K ref.)
Address Input(8K ref.)
Data In/Out
Read/Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power(+5V)
Ground
No Connection
Presence Detect Enable
Presence Detect
ID bit
Reserved Use
Reserved for Future
Pins marked
′
*
′
are not used in this module.
PD & ID Table
Pin
50NS
60NS
0
PD1
0
0
PD2
0
1
1
PD3
1
PD4
1
0
PD5
0
1
PD6
0
1
PD7
0
1
PD8
1
NOTE : A12 is used for only M364C0884BT0-C (8K Ref.)
ID0
0
0
ID1
0
0
PD Note :PD & ID Terminals must each be pulled up through a resistor to V
CC
at the next higher
level assembly. PDs will be either open (NC) or driven to V
SS
via on-board buffer circuits.
PD : 0 for Vol of Drive IC & 1 for N.C
ID : 0 for Vss & 1 for N.C
ID Note : IDs will be either open (NC) or connected directly to V
SS
without a buffer.
DRAM MODULE
FUNCTIONAL BLOCK DIAGRAM
M364C080(8)4BT0-C
RAS0
RAS1
W0
OE0
A0
A1-A11(A12)
CAS0
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ0-DQ7
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ9-DQ16
UCAS
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ18-DQ25
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ36-DQ43
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ45-DQ52
UCAS
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ54-DQ61
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ63-DQ70
UCAS
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UCAS
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UCAS
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
UCAS
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
RAS2
RAS3
W2
OE2
B0
A1-A11(A12)
CAS4
U0
U4
U6
U2
CAS1
UCAS
CAS5
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CAS2
LCAS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ27-DQ34
CAS6
U1
U5
U7
U3
CAS3
UCAS
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CAS7
Note : A12 is used for only M364C0884BT (8K ref.)
A0
B0
A1-A11(A12)
W0, OE0
W2, OE2
U0-U1,U4-U5
U2-U3,U6-U7
U0-U7
U0-U1,U4-U5
U2-U3,U6-U7
Vcc
0.1 or 0.22uF Capacitor
under each DRAM
Vss
To all DRAMs
DRAM MODULE
ABSOLUTE MAXIMUM RATINGS *
Item
Voltage on any pin relative V
SS
Voltage on V
CC
supply relative to V
SS
Storage Temperature
Power Dissipation
Short Circuit Output Current
Symbol
V
IN
, V
OUT
V
CC
T
stg
P
D
I
OS
M364C080(8)4BT0-C
Rating
-1 to +7.0
-1 to +7.0
-55 to +125
8
50
Unit
V
V
°C
W
mA
* Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for intended
periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(Voltage referenced to V
SS
, T
A
= 0 to 70°C)
Item
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min
4.5
0
2.4
-1.0
*2
Typ
5.0
0
-
-
Max
5.5
0
V
CC*1
0.8
Unit
V
V
V
V
*1 : V
CC
+2.0V at pulse width≤20ns, which is measured at V
CC
.
*2 : -2.0V at pulse width≤20ns, which is measured at V
SS
.
DC AND OPERATING CHARACTERISTICS
(Recommended operating conditions unless otherwise noted)
Symbol
I
CC1
I
CC2
I
CC3
I
CC4
I
CC5
I
CC6
I
I(L)
I
O(L)
V
OH
V
OL
Speed
-50
-60
Don′t care
-50
-60
-50
-60
Don′t care
-50
-60
Don′t care
Don′t care
M364C0804BT0
Min
-
-
M364C0884BT0
Max
580
540
100
580
540
380
340
30
580
540
10
10
-
0.4
Min
-
-
-
-
-
-
-
-
-
-
-10
-10
2.4
-
Max
460
420
100
460
420
340
300
30
460
420
10
10
-
0.4
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
uA
V
V
-
-
-
-
-
-
-
-
-10
-10
2.4
-
I
CC1
* : Operating Current * (RAS, CAS, Address cycling @
t
RC
=min)
I
CC2
: Standby Current (RAS=CAS=W=V
IH
)
I
CC3
* : RAS Only Refresh Current * (CAS=V
IH
, RAS cycling @
t
RC
=min)
I
CC4
* : Fast Page Mode Current * (RAS=V
IL
, CAS cycling :
t
PC
=min)
I
CC5
: Standby Current (RAS=CAS=W=Vcc-0.2V)
I
CC6
* : CAS-Before-RAS Refresh Current * (RAS and CAS cycling @
t
RC
=min)
I(
IL)
: Input Leakage Current (Any input 0≤V
IN
≤Vcc+0.5V,
all other pins not under test=0 V)
I(
OL)
: Output Leakage Current(Data Out is disabled, 0V≤V
OUT
≤Vcc)
V
OH
: Output High Voltage Level (I
OH
= -5mA)
V
OL
: Output Low Voltage Level (I
OL
= 4.2mA)
* NOTE
: I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the output open.
I
CC
is specified as an average current. In I
CC1
and I
CC3
, address can be changed maximum once while RAS=V
IL
. In I
CC4
,
address can be changed maximum once within one Fast page mode cycle time,
t
PC
.
stm32/stm8
