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M36L0T7050T2

M36L0T7050B2

128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory

and 32 Mbit (2 Mb x16) PSRAM, multichip package

Features

■

Multichip package

– 1 die of 128 Mbit (8 Mb x16, Multiple Bank,

Multilevel, Burst) Flash Memory

– 1 die of 32 Mbit (2 Mb x16) Pseudo SRAM

Supply voltage

– V

DDF

= 1.7 to 2.0 V

– V

CCP

= V

DDQ

= 2.7 to 3.5 V

– V

PPF

= 9 V for fast program

Electronic signature

– Manufacturer Code: 20h

– Device Code (Top Flash Configuration)

M36L0T7050T2: 88C4h

– Device Code (Bottom Flash Configuration)

M36L0T7050B2: 88C5h

ECOPACK® packages available

■

FBGA

■

TFBGA88 (ZAQ)

8 x 10 mm

■

Block locking

– All blocks locked at power-up

– Any combination of blocks can be locked

with zero latency

– WP for Block Lock-Down

– Absolute Write Protection with V

= V

Security

– 64 bit unique device number

– 2112 bit user programmable OTP Cells

Common Flash Interface (CFI)

100,000 program/erase cycles per block

Flash memory

■

Synchronous / Asynchronous Read

– Synchronous Burst Read mode: 52 MHz

– Random Access: 85 ns

Synchronous Burst Read Suspend

Programming time

– 2.5 µs typical Word program time using

Buffer Enhanced Factory Program

command

Memory organization

– Multiple Bank memory array: 8 Mbit Banks

– Parameter Blocks (top or bottom location)

Dual operations

– program/erase in one Bank while read in

others

– No delay between read and write

operations

■

PSRAM

■

Access time: 65 ns

8-Word Page Access capability: 18 ns

Low standby current: 100 µA

Deep power down current: 10 µA

Compatible with standard LPSRAM

Power-down modes

– Deep Power-Down

– 4 Mbit Partial Array Refresh

– 8 Mbit Partial Array Refresh

■

April 2007

Rev 1

1/22

www.st.com

Contents

M36L0T7050T2, M36L0T7050B2

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

2.14

2.15

2.16

2.17

2.18

2.19

2.20

2.21

Address inputs (A0-A22) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Data input/output (DQ0-DQ15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Flash Chip Enable (E

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Flash Output Enable (G

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Flash Write Enable (W

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Flash Write Protect (WP

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Flash Reset (RP

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Flash Latch Enable (L

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Flash Clock (K

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Flash Wait (WAIT

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

PSRAM Chip Enable input (E1

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

PSRAM Chip Enable input (E2

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PSRAM Write Enable (W

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PSRAM Output Enable (G

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PSRAM Upper Byte Enable (UB

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PSRAM Lower Byte Enable (LB

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

DDF

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CCP

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

DDQ

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PPF

Program supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2/22

M36L0T7050T2, M36L0T7050B2

Contents

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3/22

List of tables

M36L0T7050T2, M36L0T7050B2

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Device Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch, Package Data . . . . . . 19

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4/22

M36L0T7050T2, M36L0T7050B2

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

TFBGA connections (top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

AC Measurement I/O Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch,

Bottom View Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5/22

参数对比

与M36L0T7050B2ZAQF相近的元器件有：M36L0T7050T2ZAQ、M36L0T7050T2ZAQF、M36L0T7050T2ZAQE、M36L0T7050T2ZAQT、M36L0T7050B2ZAQE、M36L0T7050B2ZAQ、M36L0T7050B2ZAQT。描述及对比如下：

型号	M36L0T7050B2ZAQF	M36L0T7050T2ZAQ	M36L0T7050T2ZAQF	M36L0T7050T2ZAQE	M36L0T7050T2ZAQT	M36L0T7050B2ZAQE	M36L0T7050B2ZAQ	M36L0T7050B2ZAQT
描述	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, TFBGA-88	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, TFBGA-88	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, TFBGA-88	SPECIALTY MEMORY CIRCUIT, PBGA88, 8 X 10 MM, 0.80 MM PITCH, TFBGA-88
是否Rohs认证	符合	不符合	符合	符合	不符合	符合	不符合	不符合
厂商名称	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)
零件包装代码	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA
包装说明	8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	8 X 10 MM, 0.80 MM PITCH, TFBGA-88	8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	8 X 10 MM, 0.80 MM PITCH, TFBGA-88	8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88	8 X 10 MM, 0.80 MM PITCH, TFBGA-88	8 X 10 MM, 0.80 MM PITCH, TFBGA-88
针数	88	88	88	88	88	88	88	88
Reach Compliance Code	compliant	not_compliant	compliant	compliant	not_compliant	compliant	not_compliant	not_compliant
最长访问时间	85 ns	85 ns	85 ns	85 ns	85 ns	85 ns	85 ns	85 ns
其他特性	PSRAM IS ORGANIZED AS 2M X 16	PSRAM IS ORGANIZED AS 2M X 16	PSRAM IS ORGANIZED AS 2M X 16	PSRAM IS ORGANIZED AS 2M X 16	PSRAM IS ORGANIZED AS 2M X 16	PSRAM IS ORGANIZED AS 2M X 16	PSRAM IS ORGANIZED AS 2M X 16	PSRAM IS ORGANIZED AS 2M X 16
JESD-30 代码	R-PBGA-B88	R-PBGA-B88	R-PBGA-B88	R-PBGA-B88	R-PBGA-B88	R-PBGA-B88	R-PBGA-B88	R-PBGA-B88
长度	10 mm	10 mm	10 mm	10 mm	10 mm	10 mm	10 mm	10 mm
内存密度	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit
内存集成电路类型	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT
内存宽度	16	16	16	16	16	16	16	16
混合内存类型	FLASH+PSRAM	FLASH+PSRAM	FLASH+PSRAM	FLASH+PSRAM	FLASH+PSRAM	FLASH+PSRAM	FLASH+PSRAM	FLASH+PSRAM
功能数量	1	1	1	1	1	1	1	1
端子数量	88	88	88	88	88	88	88	88
字数	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words
字数代码	8000000	8000000	8000000	8000000	8000000	8000000	8000000	8000000
工作模式	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
最低工作温度	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C
组织	8MX16	8MX16	8MX16	8MX16	8MX16	8MX16	8MX16	8MX16
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA
封装等效代码	BGA88,8X12,32	BGA88,8X12,32	BGA88,8X12,32	BGA88,8X12,32	BGA88,8X12,32	BGA88,8X12,32	BGA88,8X12,32	BGA88,8X12,32
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
电源	1.8,3 V	1.8,3 V	1.8,3 V	1.8,3 V	1.8,3 V	1.8,3 V	1.8,3 V	1.8,3 V
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
最大供电电压 (Vsup)	2 V	2 V	2 V	2 V	2 V	2 V	2 V	2 V
最小供电电压 (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
表面贴装	YES	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED
端子形式	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
端子节距	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
端子位置	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
宽度	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm