7549 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0202-0201
Rev.2.01
Oct 15, 2007
• Serial interface............................................................ 8-bit × 1
(UART or clock synchronous)
• A/D converter ............................ 10-bit resolution × 8-channel
• Clock generating circuit ..................................... Built-in type
(connect to external ceramic resonator or quartz-crystal oscillator,
32 kHz quartz-crystal oscillation available)
• High-speed on-chip oscillator ............................ Typ. : 4 MHz
• Low-speed on-chip oscillator .......................... Typ. : 250 kHz
• Watchdog timer ...................................................... 16-bit × 1
• Power-on reset circuit.......................................... Built-in type
• Low voltage detection circuit .............................. Built-in type
• Power source voltage
X
IN
oscillation frequency
(at ceramic resonator, in double-speed mode)
At 8 MHz ........................................ 4.5 to 5.5 V
At 2 MHz ........................................ 2.4 to 5.5 V
At 1 MHz ........................................ 2.2 to 5.5 V
X
IN
oscillation frequency
(at ceramic resonator, in high-speed mode)
At 8 MHz ........................................ 4.0 to 5.5 V
At 4 MHz ........................................ 2.4 to 5.5 V
At 1 MHz ........................................ 1.8 to 5.5 V
High-speed on-chip oscillator oscillation frequency
At 4 MHz......................................... 4.0 to 5.5 V
Low-speed on-chip oscillator oscillation frequency
At 250 kHz (typ. value at V
CC
= 5V).... 1.8 to 5.5 V
• Power dissipation ........................................................ 30 mW
• Operating temperature range ............................... -20 to 85°C
APPLICATION
Office automation equipment, factory automation equipment,
home electric appliances, consumer electronics, etc.
DESCRIPTION
The 7549 Group is the 8-bit microcomputer based on the 740
family core technology.
The 7549 Group has an 8-bit timer, 16-bit timer, serial interface,
A/D converter, power-on reset circuit and the low voltage
detection circuit. Also, the Function set ROM is equipped.
FEATURES
• Basic machine-language instructions ..................................71
• The minimum instruction execution time ................... 0.25
µs
(at 8 MHz oscillation frequency, double-speed mode)
• Memory size
ROM ..................................... 2K, 4K, 6K bytes
RAM ........................................... 192/256 bytes
• Programmable I/O ports
I/O port............................................................19
Output port........................................................1
• Key-on wakeup .......................................................................8
• LED direct drive port..............................................................8
• Interrupts ............................................. 12 sources, 12 vectors
• Timers ....................................................................... 8-bit × 2
..................................................................................16-bit × 1
• Output compare ........................................................ 3 channel
• Input capture ............................................................. 1 channel
Rev.2.01 Oct 15, 2007
REJ03B0202-0201
Page 1 of 81
7549 Group
PIN Configuration (top view)
P1
4
/AN
4
/KEY
4
P1
5
/AN
5
/KEY
5
RESET
P1
6
/AN
6
/KEY
6
P1
7
/AN
7
/KEY
7
P2
0
/X
OUT
/X
COUT
V
SS
P2
1
/X
IN
/X
CIN
V
CC
CNV
SS
P0
0
(LED
0
)/INT
0
P0
1
(LED
1
)/INT
1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
P1
3
/AN
3
/KEY
3
/T2
OUT
P1
2
/AN
2
/KEY
2
/CMP
2
P1
1
/AN
1
/KEY
1
/CMP
1
P1
0
/AN
0
/KEY
0
/CMP
0
P3
1
P3
0
P0
7
(LED
7
)/S
RDY
P0
6
(LED
6
)/S
CLK
P0
5
(LED
5
)/TxD
P0
4
(LED
4
)/RxD
P0
3
(LED
3
)/CAP
0
P0
2
(LED
2
)
Package type: PRSP0024GA-A (24P2Q-A)
Fig 1.
Pin configuration (PRSP0024GA-A type)
M37549G3/G2/G1FP
Rev.2.01 Oct 15, 2007
REJ03B0202-0201
Page 2 of 81
7549 Group
PIN Configuration (top view)
NC
NC
NC
P1
4
/AN
4
/KEY
4
P1
5
/AN
5
/KEY
5
RESET
P1
6
/AN
6
/KEY
6
P1
7
/AN
7
/KEY
7
NC
NC
NC
P2
0
/X
OUT
/X
COUT
V
SS
P2
1
/X
IN
/X
CIN
V
CC
CNV
SS
P0
0
(LED
0
)/INT
0
P0
1
(LED
1
)/INT
1
NC
NC
V
SS
1
2
3
4
5
6
7
8
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
NC
NC
P1
3
/AN
3
/KEY
3
/T2
OUT
P1
2
/AN
2
/KEY
2
/CMP
2
P1
1
/AN
1
/KEY
1
/CMP
1
P1
0
/AN
0
/KEY
0
/CMP
0
P3
1
P3
0
NC
NC
NC
NC
P0
7
(LED
7
)/S
RDY
P0
6
(LED
6
)/S
CLK
P0
5
(LED
5
)/TxD
P0
4
(LED
4
)/RxD
P0
3
(LED
3
)/CAP
0
P0
2
(LED
2
)
NC
NC
NC
M37549RLSS
9
10
11
12
13
14
15
16
17
18
19
20
21
Package type: 42S1M
Fig 2.
Pin configuration (42S1M type)
Rev.2.01 Oct 15, 2007
REJ03B0202-0201
Page 3 of 81
7549 Group
PERFORMANCE OVERVIEW
Table 1
Performance overview
Parameter
Number of basic instructions
Instruction execution time
Oscillation frequency
Memory sizes
ROM
M37549G1
M37549G2
M37549G3
RAM
M37549G1
M37549G2
M37549G3
I/O port
P0
0
-P0
7
I/O
P1
0
-P1
7
I/O
P2
0
P2
1
Interrupts
Timer
Output compare
Input capture
Serial interface
A/D converter
Watchdog timer
Power-on reset circuit
Low voltage detection circuit
Clock generating circuit
Function set ROM
area
Function set ROM
Source
Output
I/O
71
0.25
µs
(Minimum instruction, oscillation frequency 8MHz, double-speed mode)
8 MHz (Maximum)
2K bytes
×
8 bits
4K bytes
×
8 bits
6K bytes
×
8 bits
192 bytes
×
8 bits
256 bytes
×
8 bits
256 bytes
×
8 bits
1-bit
×
8, LED direct drive ports
1-bit
×
8
1-bit
×
1
1-bit
×
1
1-bit
×
2
12 sources, 12 vectors
8-bit
×
2, 16-bit
×
1
3-channel
1 channel
8-bit
×
1 (UART or clock synchronous)
10-bit resolution
×
8 channel
16-bit
×
1
Built-in
Built-in
Built-in (external ceramic resonator or quartz-crystal oscillator, external 32-kHz
quartz-crystal oscillator available) (built-in high/low-speed on-chip oscillator)
Function set ROM is assigned to address FFD8
16
to FFDA
16
.
Valid/invalid of low voltage detection circuit can be selected.
Oscillation mode can be selected.
Enable/disable of watchdog timer and STP instruction can be selected.
ROM code protect is assigned to address FFDB
16
.
Read/write the built-in QzROM by serial programmer is disabled by setting “00”
to ROM code protect.
4.5 to 5.5 V
2.4 to 5.5 V
2.2 to 5.5 V
4.0 to 5.5 V
2.4 to 5.5 V
1.8 to 5.5 V
4.0 to 5.5 V
Function
P3
0
, P3
1
I/O
ROM code protect
Power source
voltage
(at ceramic
resonator)
Double- at 8 MHz oscillation
speed
at 2 MHz oscillation
mode
at 1 MHz oscillation
High-
speed
mode
at 8 MHz oscillation
at 4 MHz oscillation
at 1 MHz oscillation
Power source
voltage
(at high-speed on-
chip oscillator)
Power source
voltage
(at low-speed on-
chip oscillator)
Power dissipation
Double- at 4 MHz oscillation
speed
mode
Double- at 250 kHz oscillation
speed
mode
1.8 to 5.5 V
30 mW
-20 to 85 °C
CMOS silicon gate
24-pin plastic molded SSOP (PRSP0024GA-A)
Operating temperature range
Device structure
Package
Rev.2.01 Oct 15, 2007
REJ03B0202-0201
Page 4 of 81
7549 Group
Fig 3.
V
SS
V
CC
9
10
3
7
FUNCTIONAL BLOCK DIAGRAM
(Package: PRSP0024GA-A)
Reset input
RESET
CNV
SS
Rev.2.01 Oct 15, 2007
REJ03B0202-0201
C P U
RAM
Prescaler 12 (8)
X
Y
S
PC
H
PS
PC
L
Timer A(16)
ROM
A
Timer 1(8)
FUNCTIONAL BLOCK DIAGRAM
Timer 2 (8)
Power-on reset circuit
Reset
Page 5 of 81
0
Low voltage
detection circuit
Reset
Watchdog timer
Reset
0
Clock
generating
circuit
A/D converter
(10)
Compare
(16)
SIO (8)
Capture
(16)
INT
0
P3(2)
P2(2)
P1(8)
Key-on wakeup
P0(8)
INT
1
20 19
8 6
5 4 2 1 24 23 22 21
18 17 16 15 14 13 12 11
I/O port P3
I/O port P2
Clock input Clock output
X
IN
/X
CIN
X
OUT
/X
COUT
I/O port P1
I/O port P0
