INCH-POUND
MIL-M-38510/307D
12 March 2003 __
SUPERSEDING
MIL-M-38510/307C
5 November 1987
MILITARY SPECIFICATION
MICROCIRCUITS, DIGITAL, BIPOLAR LOW-POWER SCHOTTKY TTL,
DECODERS, MONOLITHIC SILICON
Inactive for new design after 18 April 1997.
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
1. SCOPE
1.1 Scope. This specification covers the detail requirements for monolithic silicon, low-power Schottky TTL,
decoder microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided
for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have
been superseded by MIL-PRF-38535, (see 6.3).
1.2 Part number. The part number shall be in accordance with MIL-PRF-38535, and as specified herein.
1.2.1 Device types. The device types shall be as follows:
Device type
01
02
03
04
Circuit
Single 3 to 8 line decoder
Dual 2 to 4 line decoder
BCD-to-decimal decoder
BCD-to-seven segment decoder/driver
(15-volt, open collector output)
1.2.2 Device class. The device class shall be the product assurance level as defined in MIL-PRF-38535.
1.2.3 Case outlines. The case outlines shall be as designated in MIL-STD-1835 and as follows:
Outline letter
E
F
X
2
Descriptive designator
GDIP1-T16 or CDIP2-T16
GDFP2-F16 or CDFP3-F16
CQCC2-N20
CQCC1-N20
Terminals
16
16
20
20
Package style
Dual-in-line
Flat pack
Square leadless chip carrier
Square leadless chip carrier
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in
improving this document should be addressed to: Commander, Defense Supply Center Columbus, ATTN:
DSCC-VAS, P. O. Box 3990, Columbus, OH 43216-5000, by using the self addressed Standardization
Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.
AMSC N/A
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
FSC 5962
MIL-M-38510/307D
1.3 Absolute maximum ratings.
Supply voltage range .............................................................................
Input voltage range ................................................................................
Storage temperature range ....................................................................
Maximum power dissipation (P
D
) 1/
Device type 01 .................................................................................
Device type 02 ..................................................................................
Device type 03 and 04 ......................................................................
Output voltage (off state) (device type 04) .............................................
Output current (device type 04) ..............................................................
Lead temperature (soldering, 10 seconds) .............................................
Thermal resistance, junction to case (θ
JC
):
Cases E, F, X, and 2 .............................................................................
Junction temperature (T
J
) 2/...................................................................
1.4 Recommended operating conditions.
Supply voltage (V
CC
) .............................................................................. 4.5 V dc minimum to 5.5 V dc
maximum
Minimum high level input voltage (V
IH
) ................................................... 2.0 V dc
Maximum low level input voltage (V
IL
) .................................................... 0.7 V dc
Case operating temperature range (T
C
) ................................................. -55° to +125°C
2. APPLICABLE DOCUMENTS
2.1 Government documents.
2.1.1 Specifications and Standards. The following specifications and standards form a part of this specification to
the extent specified herein. Unless otherwise specified, the issues of these documents shall be those listed in the
issue of the Departments of Defense Index of Specifications and Standards (DODISS) and supplement thereto, cited
in the solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 -
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883
MIL-STD-1835
-
-
Test Method Standard for Microelectronics.
Interface Standard Electronic Component Case Outlines
Integrated Circuits (Microcircuits) Manufacturing, General Specification for.
-0.5 V dc to 7.0 V dc
-1.5 V dc at -18 mA to 5.5 V dc
-65° to +150°C
55 mW dc
60.5 mW dc
71.5 mW dc
15 V dc
12 mA dc
300°C
(See MIL-STD-1835)
175°C
(Unless otherwise indicated, copies of the above specifications and standards are available from the
Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this specification and the references cited
herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws
and regulations unless a specific exemption has been obtained.
_______
1/ Must withstand the added P
D
due to short-circuit test (e.g., I
OS
).
2/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in
screening conditions in accordance with MIL-PRF-38535.
2
MIL-M-38510/307D
3. REQUIREMENTS
3.1 Qualification. Microcircuits furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list before
contract award (see 4.3 and 6.4).
3.2 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535 and as
specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the
QM plan shall not affect the form, fit, or function as described herein.
3.3 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be
as specified in MIL-PRF-38535 and herein.
3.3.1 Terminal connections. The terminal connections shall be as specified on figure 1.
3.3.2 Truth tables. The truth tables shall be as specified on figure 2.
3.3.3 Schematic circuits. The schematic circuits shall be maintained by the manufacturer and made available to
the qualifying activity and the preparing activity upon request.
3.3.4 Case outlines. The case outlines shall be as specified in 1.2.3.
3.4 Lead material and finish. The lead material and finish shall be in accordance with MIL-PRF-38535 (see 6.6).
3.5 Electrical performance characteristics. The electrical performance characteristics are as specified in table I,
and apply over the full recommended case operating temperature range, unless otherwise specified.
3.6 Electrical test requirements. The electrical test requirements for each device class shall be the subgroups
specified in table II. The electrical tests for each subgroup are described in table III.
3.7 Marking. Marking shall be in accordance with MIL-PRF-38535.
3.8 Microcircuit group assignment. The devices covered by this specification shall be in microcircuit group
number 11 (see MIL-PRF-38535, appendix A).
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535
or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall
not effect the form, fit, or function as described herein.
4.2 Screening. Screening shall be in accordance with MIL-PRF-38535 and shall be conducted on all devices prior
to qualification and quality conformance inspection. The following additional criteria shall apply:
a. The burn-in test duration, test condition, and test temperature, or approved alternatives shall be as
specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test
circuit shall be maintained under document control by the device manufacturer's Technology Review
Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or
preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power
dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883.
b. Interim and final electrical test parameters shall be as specified in table II, except interim electrical
parameters test prior to burn-in is optional at the discretion of the manufacturer.
c. Additional screening for space level product shall be as specified in MIL-PRF-38535, appendix B.
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MIL-M-38510/307D
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55°C
≤
T
C
≤
+125°C
unless otherwise specified
V
IL
= 0.7 V
I
OH
= -50
µA
V
CC
= 4.5 V
V
IH
= 2.0 V
I
OH
= -400
µA
I
OL
= 1.6 mA
I
OL
= 1/
I
IN
= -18 mA,
T
C
= +25°C
V
OH
= 15 V
V
CC
= 5.5 V
V
IN
= 0.4 V
Device
types
04
01, 02,
03
04
01, 02,
03, 04
All
04
01
02, 03
04
04
04
V
IN
= 2.7 V
V
IN
= 7.0 V
V
IH
= 5.5 V 2/
V
IL
= GND
All
All
01, 03
02
01
02
03, 04
04
01, 02
-6
-15
-.001
-.03
-.10
-.11
-.36
Limits
Min
Max
2.4
2.5
0.40
0.40
-1.5
250
-.38
-.40
-.34
-.36
-1.37
20
100
-130
-100
10
11
13
158
38
Unit
High level output voltage
High level output voltage
Low level output voltage
at BI/RBO
Low level output voltage
Input clamp voltage
Maximum collector
cut-off current
Low level input current
at A, B, C, D, G
Low level input current
at LT and RBI
Low level input current
at BI/RBO
High level input
current
V
OH1
V
OH2
V
OL1
V
OL2
V
IC
I
CEX
I
IL1
V
V
V
V
V
µA
mA
I
IL2
I
IL3
I
IH1
I
IH2
mA
mA
µA
µA
mA
mA
Short circuit output
current
Supply current
I
OS
I
CC
Propagation delay time,
t
PLH1
low to high level
Propagation delay time,
t
PLH2
low to high level
through 2 levels of logic
(binary select to output)
Propagation delay time,
t
PLH2
low to high level
through 2 levels of logic
(A, B, C, or D to output)
Propagation delay time,
t
PLH3
low to high level
through 2 levels of logic
(enable to output)
See footnotes at end of table.
V
CC
= 5.0 V
C
L
= 50 pF
±10%
R
L
= 665Ω
±10%
R
L
= 2.0 kΩ
±10%
5
5
ns
ns
03
5
45
ns
01
02
5
5
35
44
ns
4
MIL-M-38510/307D
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions
-55°C
≤
T
C
≤
+125°C
unless otherwise specified
V
CC
= 5.0 V
R
L
= 2.0 kΩ
±10%
C
L
= 50 pF
±10%
Device
types
01
02
t
PLH4
03
Limits
Min
Max
5
5
5
48
51
53
ns
Unit
Propagation delay time,
low to high level
through 3 levels of logic
(binary select to output)
Propagation delay time,
low to high level
through 3 levels of logic
(A, B, C, or D to output)
Propagation delay time,
low to high level
through 3 levels of logic
(enable to output)
Propagation delay time,
high to low level
Propagation delay time,
high to low level
through 2 levels of logic
(binary select to output)
Propagation delay time,
high to low level
through 2 levels of logic
(A, B, C, or D to output)
Propagation delay time,
high to low level
through 2 levels of logic
(enable to output)
Propagation delay time,
high to low level
through 3 levels of logic
(binary select to output)
Propagation delay time,
high to low level
through 3 levels of logic
(A, B, C, or D to output)
Propagation delay time,
high to low level
through 3 levels of logic
(enable to output)
t
PLH4
ns
t
PLH5
01
5
47
ns
t
PHL1
t
PHL2
R
L
= 665Ω
±10%
R
L
= 2.0 kΩ
±10%
04
01
02
5
5
5
5
158
69
57
45
ns
ns
t
PHL2
03
ns
t
PHL3
01, 02
5
56
ns
t
PHL4
01
02
5
5
5
81
65
53
ns
t
PHL4
03
ns
t
PHL5
01
5
65
ns
1/ I
OL
= 4 mA for device types 01, 02, and 03; I
OL
= 12 mA for device type 04.
2/ Not more than one output should be shorted at one time.
5
