3851 Group
(Built-in 24 KB or more ROM)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0066-0101Z
Rev.1.01
Oct 15, 2003
DESCRIPTION
The 3851 group (built-in 24 KB or more ROM) is the 8-bit micro-
computer based on the 740 family core technology.
The 3851 group (built-in 24 KB or more ROM) is designed for the
household products and office automation equipment and includes
serial I/O functions, 8-bit timer, I
2
C-BUS interface, and A-D con-
verter.
FEATURES
Basic machine-language instructions ..................................... 71
Minimum instruction execution time ................................. 0.5
µs
(at 8 MHz oscillation frequency)
Memory size
ROM ................................................................ 24K to 32K bytes
RAM .................................................................... 640 to 1K bytes
Programmable input/output ports ........................................... 34
Interrupts ................................................ 17 sources, 16 vectors
Timers ............................................................................ 8-bit X 4
Serial I/O1 .................... 8-bit X 1(UART or Clock-synchronized)
Serial I/O2 ................................... 8-bit X 1(Clock-synchronized)
Multi-master I
2
C-BUS interface .................................. 1 channel
PWM .............................................................................. 8-bit X 1
A-D converter ............................................... 10-bit X 5 channels
Watchdog timer ........................................................... 16-bit X 1
Clock generating circuit ................................... Built-in 2 circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
Power source voltage
In high-speed mode ................................................. 4.0 to 5.5 V
(at 8 MHz oscillation frequency)
In middle-speed mode ............................................. 2.7 to 5.5 V
(at 8 MHz oscillation frequency)
In low-speed mode ................................................... 2.7 to 5.5 V
(at 32 kHz oscillation frequency)
Power dissipation
In high-speed mode ......................................................... 34 mW
(at 8 MHz oscillation frequency, at 5 V power source voltage)
In low-speed mode
Except M38517F8FP/SP ................................................. 60
µW
M38517F8FP/SP ............................................................ 450
µW
(at 32 kHz oscillation frequency, at 3 V power source voltage)
Operating temperature range .................................. –20 to 85°C
APPLICATION
Office automation equipment, FA equipment, Household products,
Consumer electronics, etc.
PIN CONFIGURATION (TOP VIEW)
V
CC
V
REF
AV
SS
P4
4
/INT
3
/PWM
P4
3
/INT
2
/S
CMP2
P4
2
/INT
1
P4
1
/INT
0
P4
0
/CNTR
1
P2
7
/CNTR
0
/S
RDY1
P2
6
/S
CLK1
P2
5
/SCL
2
/TxD
P2
4
/SDA
2
/RxD
P2
3
/SCL
1
P2
2
/SDA
1
CNV
SS
P2
1
/X
CIN
P2
0
/X
COUT
RESET
X
IN
X
OUT
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P3
0
/AN
0
P3
1
/AN
1
P3
2
/AN
2
P3
3
/AN
3
P3
4
/AN
4
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
P0
5
P0
6
P0
7
P1
0
/(LED
0
)
P1
1
/(LED
1
)
P1
2
/(LED
2
)
P1
3
/(LED
3
)
P1
4
/(LED
4
)
P1
5
/(LED
5
)
P1
6
/(LED
6
)
P1
7
/(LED
7
)
Package type : FP ........................... 42P2R-A/E (42-pin plastic-molded SSOP)
Package type : SP ........................... 42P4B (42-pin plastic-molded SDIP)
Fig. 1 M38517M8-XXXFP/SP pin configuration
M38517M8-XXXFP/SP
Rev.1.01
Oct 15, 2003
page 1 of 89
FUNCTIONAL BLOCK
Rev.1.01
Reset input
V
SS
V
CC
1
15
18
21
FUNCTIONAL BLOCK DIAGRAM
Main-clock
input
X
IN
RESET
CNV
SS
Main-clock
output
X
OUT
Fig.2 Functional block diagram
3851 Group
(Built-in 24 KB or more ROM)
Oct 15, 2003
C P U
19
20
Sub-clock Sub-clock
input
output
X
CIN
X
COUT
Clock generating circuit
page 2 of 89
ROM
X
Prescaler 12(8)
RAM
Timer 2( 8 )
Timer X( 8 )
Timer Y( 8 )
Y
Prescaler X(8)
A
Timer 1( 8 )
S
PC
H
PS
CNTR
1
PC
L
Prescaler Y(8)
CNTR
0
Watchdog
timer
Reset
A-D
converter
(10)
PWM
(8)
SI/O1(8)
I
2
C
SI/O2(8)
X
COUT
INT
0
–
INT
3
X
CIN
P4(5)
P3(5)
P2(8)
P1(8)
P0(8)
2 3
38 39 40 41 42
4 5 6 7 8
9 10 11 12 13 1416 17
22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37
I/O port P4
I/O port P3
I/O port P2
I/O port P1
I/O port P0
V
REF
AV
SS
3851 Group
(Built-in 24 KB or more ROM)
Table 1 Pin description
Pin
V
CC
, V
SS
CNV
SS
V
REF
AV
SS
RESET
X
IN
X
OUT
Name
Power source
CNV
SS
input
Reference
voltage input
Analog power
source input
Reset input
Clock input
Clock output
Functions
•Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
•This pin controls the operation mode of the chip.
•Normally connected to V
SS
.
•Reference voltage input pin for A-D converter.
•Analog power source input pin for A-D converter.
•Connect to Vss.
•Reset input pin for active “L”.
•Input and output pins for the clock generating circuit.
•Connect a ceramic resonator or quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
•When an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•CMOS 3-state output structure.
•P1
0
to P1
7
(8 bits) are enabled to output large current
for LED drive.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•P2
2
to P2
5
can be switched between CMOS compatible
input level or SMBUS input level in the I
2
C-BUS inter-
face function.
•P2
0
, P2
1
, P2
4
to P2
7
: CMOS3-state output structure.
•P2
4
, P2
5
: N-channel open-drain structure in the I
2
C-
BUS interface function.
•P2
2
, P2
3
: N-channel open-drain structure.
P3
0
/AN
0
–
P3
4
/AN
4
P4
0
/CNTR
1
P4
1
/INT
0
P4
2
/INT
1
P4
3
/INT
2
/S
CMP2
P4
4
/INT
3
/PWM
I/O port P3
•8-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
I/O port P4
•8-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
• Interrupt input pin
• S
CMP2
output pin
• Interrupt input pin
• PWM output pin
• Timer Y function pin
• Interrupt input pins
• A-D converter input pin
• I
2
C-BUS interface function pin/
Serial I/O1 function pins
• Serial I/O1 function pin
• Serial I/O1 function pin/Timer X
function pin
• Sub-clock generating circuit I/O
pins (connect a resonator)
• I
2
C-BUS interface function pins
• Serial I/O2 function pin
Function except a port function
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
–P0
7
P1
0
–P1
7
P2
0
/X
COUT
P2
1
/X
CIN
P2
2
/SDA
1
P2
3
/SCL
1
P2
4
/SDA
2
/RxD
P2
5
/SCL
2
/TxD
P2
6
/S
CLK1
P2
7
/CNTR
0
/
S
RDY1
I/O port P0
I/O port P1
I/O port P2
Rev.1.01
Oct 15, 2003
page 3 of 89
3851 Group
(Built-in 24 KB or more ROM)
PART NUMBERING
Product name
M3851 4
M
6
–
XXX
SP
Package type
SP : 42P4B
FP : 42P2R-A/E
SS : 42S1B-A
ROM number
Omitted in One Time PROM version shipped in blank,
EPROM version, and flash memory version.
– : standard
Omitted in One Time PROM version shipped in blank, EPROM
version, and flash memory version.
ROM/PROM/Flash memory size
9 : 36864 bytes
1 : 4096 bytes
A : 40960 bytes
2 : 8192 bytes
3 : 12288 bytes B : 45056 bytes
4 : 16384 bytes
5 : 20480 bytes
6 : 24576 bytes
7 : 28672 bytes
C : 49152 bytes
D : 53248 bytes
E : 57344 bytes
F : 61440 bytes
8 : 32768 bytes
The first 128 bytes and the last 2 bytes of ROM are reserved areas ; they
cannot be used as a user’s ROM area.
However, they can be programmed or erased in the flash memory version,
so that the users can use them.
Memory type
M : Mask ROM version
E : EPROM or One Time PROM version
F : Flash memory version
RAM size
0 : 192 bytes
1 : 256 bytes
2 : 384 bytes
3 : 512 bytes
4 : 640 bytes
5 : 768 bytes
6 : 896 bytes
7 : 1024 bytes
8 : 1536 bytes
9 : 2048 bytes
Fig. 3 Part numbering
Rev.1.01
Oct 15, 2003
page 4 of 89
3851 Group
(Built-in 24 KB or more ROM)
GROUP EXPANSION
Renesas plans to expand the 3851 group (built-in 24 KB or more
ROM) as follows.
Packages
42P4B ......................................... 42-pin shrink plastic-molded DIP
42P2R-A/E ......................................... 42-pin plastic-molded SSOP
42S1B-A .................. 42-pin shrink ceramic DIP (EPROM version)
Memory Type
Support for mask ROM, One Time PROM, and flash memory ver-
sions.
Memory Size
Flash memory size ......................................................... 32 K bytes
Mask ROM size ................................................. 24 K to 32 K bytes
One Time PROM size ..................................................... 24 K bytes
RAM size ............................................................... 640 to 1 K bytes
Memory Expansion Plan
ROM size (bytes)
ROM
exteranal
32K
28K
Mass production
Mass production
M38517M8/F8
24K
20K
16K
12K
8K
M38514M6/E6
384
512
640
768
896
1024
1152
RAM size (bytes)
1280
1408
1536
2048
Products under development or planning: the development schedule and specification may be revised without notice.
The development of planning products may be stopped.
Fig. 4 Memory expansion plan
Rev.1.01
Oct 15, 2003
page 5 of 89
