To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
MITSUBISHI MICROCOMPUTERS
3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
GENERAL DESCRIPTION
The 3885 group is the 8-bit microcomputer based on the 740 fam-
ily core technology.
The 3885 group is designed for Keyboard Controller for the note
book PC.
The multi-master I
2
C-bus interface can be added by option.
FEATURES
<Microcomputer mode>
qBasic
machine-language instructions ...................................... 71
qMinimum
instruction execution time .................................. 0.5
µs
(at 8 MHz oscillation frequency)
qMemory
size
ROM ................................................................. 32K to 60K bytes
RAM ............................................................... 1024 to 2048 bytes
qProgrammable
input/output ports ............................................ 72
qSoftware
pull-up transistors ....................................................... 8
qInterrupts
................................................. 22 sources, 16 vectors
qTimers
............................................................................. 8-bit
✕
4
qWatchdog
timer ............................................................ 16-bit
✕
1
qPWM
output .................................................................. 14-bit
✕
2
qSerial
I/O ....................... 8-bit
✕
1(UART or Clock-synchronized)
qMulti-master
I
2
C bus interface (option) ........................ 1 channel
qLPC
interface .............................................................. 2 channels
qSerialized
IRQ .................................................................. 3 factor
qA-D
converter ............................................... 10-bit
✕
8 channels
qD-A
converter ................................................. 8-bit
✕
2 channels
qComparator
circuit ...................................................... 8 channels
qClock
generating circuit ..................................... Built-in 2 circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
qPower
source voltage ................................................ 3.0 to 3.6 V
qPower
dissipation
In high-speed mode .......................................................... 20 mW
(at 8 MHz oscillation frequency, at 3.3 V power source voltage)
In low-speed mode ......................................................... 330 mW
(at 32 kHz oscillation frequency, at 3.3 V power source voltage)
qOperating
temperature range .................................... –20 to 85°C
<Flash memory mode>
qSupply
voltage ................................................. V
CC
= 3.3 ± 0.3V
qProgram/Erase
voltage ................................. V
PP
= 5.0 V ± 10 %
qProgramming
method ...................... Programming in unit of byte
qErasing
method
Parallel I/O mode
CPU reprogramming mode
qProgram/Erase
control by software command
qNumber
of times for programming/erasing ............................ 100
qOperating
temperature range (at programming/erasing)
........................................................................ Room temperature
APPLICATION
Note book PC
PIN CONFIGURATION (TOP VIEW)
P3
2
P3
3
P3
4
P3
5
P3
6
P3
7
P0
0
P0
1
P0
2
P0
3
P0
4
P0
5
P0
6
P0
7
P1
0
P1
1
P1
2
P1
3
P1
4
P1
5
48
47
46
45
60
59
58
44
43
51
50
49
57
56
55
54
53
52
42
41
P3
1
/PWM
10
P3
0
/PWM
00
P8
7
/SERIRQ
P8
6
/LCLK
P8
5
/LRESET
P8
4
/LFRAME
P8
3
/LAD
3
P8
2
/LAD
2
P8
1
/LAD
1
P8
0
/LAD
0
V
CC
V
REF
AV
SS
P6
7
/AN
7
P6
6
/AN
6
P6
5
/AN
5
P6
4
/AN
4
P6
3
/AN
3
P6
2
/AN
2
P6
1
/AN
1
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
13
14
15
16
17
12
11
10
18
19
20
6
3
4
5
7
8
1
2
9
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
M38857M8-XXXHP
M38858MC-XXXHP
M38859M8-XXXHP
M38859FFHP
P1
6
P1
7
P2
0
/CMP
REF
P2
1
P2
2
P2
3
P2
4
(LED
0
)
P2
5
(LED
1
)
P2
6
(LED
2
)
P2
7
(LED
3
)
V
SS
X
OUT
X
IN
P4
0
/X
COUT
P4
1
/X
CIN
RESET
CNV
SS
V
PP
P4
2
/INT
0
P4
3
/INT
1
P4
4
/R
X
D
P6
0
/AN
0
P7
7
/S
CL
P7
6
/S
DA
P7
5
/INT
41
P7
4
/INT
31
P7
3
/INT
21
P7
2
P7
1
P7
0
P5
7
/DA
2
/PWM
11
P5
6
/DA
1
/PWM
01
P5
5
/CNTR
1
P5
4
/CNTR
0
P5
3
/INT
40
P5
2
/INT
30
P5
1
/INT
20
P5
0
/INT
5
P4
7
/S
RDY
/CLKRUN
P4
6
/S
CLK
P4
5
/T
X
D
: Flash memory version
Package type : 80P6Q-A
Fig. 1 Pin configuration
1
2
Reset input
V
SS
V
CC
RESET
25
24
71
30
FUNCTIONAL BLOCK DIAGRAM (Package : 80P6Q-A)
Main-clock
input
X
IN
CNV
SS
Main-clock
output
X
OUT
28
29
Sub-clock Sub-clock
input
output
Fig. 2 Functional block diagram
C P U
X
CIN
X
COUT
Clock generating circuit
RAM
ROM
X
Prescaler 12 (8)
Prescaler X (8)
A
Timer 2 (8)
Timer X (8)
Timer Y (8)
Timer 1 (8)
Y
S
PC
H
PS
CNTR
0
CNTR
1
PC
L
Prescaler Y (8)
Watchdog
timer
Reset
I C
D-A
converter 2
(8)
D-A
converter1
(8)
2
A-D
converter
(10)
SI/O(8)
Comparator
PWM0(14)
PWM1(14)
S
CL
S
DA
X
COUT
INT
20,
INT
30,
INT
40,
INT
5
INT
0,
INT
1
X
CIN
LPC interface
CLKRUN
INT
21,
INT
31,
INT
41
Key-on
wake-up
PWM
00
,
PWM
01
CMP
REF
PWM
10
,
PWM
11
P8(8)
P6(8)
P5(8)
P7(8)
P4(8)
P3(8)
P2(8)
P1(8)
P0(8)
63 64 65 66 67 68 69 70
2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17
72 73
74 75 76 77 78 79 80 1
18 19 20 21 22 23 26 27
55 56 57 58 59 60 61 62
31 32 33 34 35 36 37 38
39 40 41 42 43 44 45 46
47 48 49 50 51 52 53 54
I/O port P8
I/O port P7
I/O port P6
I/O port P5
I/O port P4
I/O port P3
I/O port P2
I/O port P1
I/O port P0
V
REF
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3885 Group
AV
SS
MITSUBISHI MICROCOMPUTERS
3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION
Table 1 Pin description (1)
Pin
V
CC
, V
SS
CNV
SS
V
REF
AV
SS
RESET
X
IN
Name
Power source
CNV
SS
input
Reference voltage
Analog power source
Reset input
Clock input
Functions
•Apply voltage of 3.0 V ±10 % to Vcc, and 0 V to Vss.
•Connected to V
SS
.
•In the flash memory version, this pin functions as the V
PP
power source input pin.
•Reference voltage input pin for A-D and D-A converters.
•Analog power source input pin for A-D and D-A converters.
•Connect to V
SS
.
•Reset input pin for active “L”.
•Input and output pins for the clock generating circuit.
•Connect a ceramic resonator or quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
•When an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open.
•8-bit I/O port.
•I/O direction register allows each pin to be individually programmed as either input or output.
P0
0
–P0
7
I/O port P0
•CMOS compatible input level.
•CMOS 3-state output structure or N-channel open-drain output structure.
•8-bit I/O port.
P1
0
–P1
7
I/O port P1
•I/O direction register allows each pin to be individually programmed as either input or output.
•CMOS compatible input level.
•CMOS 3-state output structure or N-channel open-drain output structure.
P2
0
/CMP
REF
I/O port P2
P2
1
–P2
7
•8-bit I/O port.
•Comparator reference power source
•I/O direction register allows each pin to be individually input pin
programmed as either input or output.
•CMOS compatible input level.
•CMOS 3-state output structure.
•P2
4
to P2
7
(4 bits) are enabled to output large current for LED drive.
•8-bit I/O port.
P3
0
/PWM
00
P3
1
/PWM
10
I/O port P3
P3
2
–P3
7
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•CMOS 3-state output structure.
•These pins function as key-on wake-up and compara-
tor input.
•These pins are enabled to control pull-up.
•Key-on wake-up input pins
•Comparator input pins
•PWM output pins
•Key-on wake-up input pins
•Comparator input pins
Function except a port function
X
OUT
Clock output
3
MITSUBISHI MICROCOMPUTERS
3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 2 Pin description (2)
Pin
P4
0
/X
COUT
P4
1
/X
CIN
P4
2
/INT
0
P4
3
/INT
1
P4
4
/RxD
P4
5
/TxD
P4
6
/S
CLK
P4
7
/S
RDY
/CLKRUN
P5
0
/INT
5
P5
1
/INT
20
P5
2
/INT
30
P5
3
/INT
40
P5
4
/CNTR
0
P5
5
/CNTR
1
P5
6
/DA
1
/PWM
01
P5
7
/DA
2
/PWM
11
•8-bit I/O port with the same function as port P0
P6
0
/AN
0
–P6
7
/AN
7
I/O port P6
P7
0
P7
1
P7
2
P7
3
/INT
21
P7
4
/INT
31
P7
5
/INT
41
P7
6
/S
DA
P7
7
/S
CL
P8
0
/LAD
0
P8
1
/LAD
1
P8
2
/LAD
2
P8
3
/LAD
3
P8
4
/LFRAME
P8
5
/LRESET
P8
6
/LCLK
P8
7
/SERIRQ
•Serialized IRQ function pin
•CMOS compatible input level.
•CMOS 3-state output structure.
•8-bit CMOS I/O port with the same function as port P0
<Input level>
P7
0
–P7
5
: CMOS compatible input level or
TTL compatible input level
I/O port P7
P7
6
, P7
7
: CMOS compatible input level or
SMBUS input level in the I
2
C-BUS
interface function,
<Output structure>
N-channel open-drain output structure
•Each pin level of P7
0
to P7
5
can be read evev in
output port mode.
•8-bit CMOS I/O port with the same function as port
P0
•CMOS compatible input level.
•CMOS 3-state output structure.
I/O port P8
•LPC interface function pins
•I
2
C-BUS interface function pins
•Interrupt input pins
•A-D converter output pins
I/O port P4
Name
Functions
•8-bit I/O port with the same function as port P0
<Input level>
CMOS compatible input level
<Output level>
P4
0
, P4
1
: CMOS 3-state output structure
P4
2
-P4
7
: CMOS 3-state output structure or N-
channel open-drain output structure
•Each pin level of P4
2
to P4
6
can be read even in
output port mode.
•8-bit I/O port with the same function as port P0
•CMOS compatible input level
•CMOS 3-state output structure
I/O port P5
•Timer X, timer Y function pins
•D-A converter output pins
•PWM output pins
•Interrupt input pins
•Interrupt input pins
Function except a port function
•Sub-clock generating circuit I/O
pins (Connect a resonator.)
•Serial I/O function pins
•Serial I/O function pins
•Serialized IRQ function pin
4
