M3V Series
9x14 mm, 3.3 Volt, HCMOS/TTL, VCXO
•
HCMOS/TTL output to 160 MHz and excellent
jitter (2.1 ps typ.) in a SMT package
Phase-Locked Loops (PLL’s), Clock Recovery,
Reference Signal Tracking, Synthesizers,
Frequency Modulation/Demodulation
•
*Contact factory for availability.
**Other pull ranges available. Contact factory.
APR Equivalents
Pin Connections
16
Revision B, 4-13-04
M3V Series
9x14 mm, 3.3 Volt, HCMOS/TTL, VCXO
V
C
X
O
1.
2.
3.
4.
Frequencies above 70 MHz utilize a PLL design. Fundamental and PLL designs are available at other frequencies. Contact factory.
Symmetry is measured at 1.4 V with TTL load, and at 50% Vdd with HCMOS load.
TTL load - see load circuit diagram #1 on page 148. HCMOS load - see load circuit diagram #2 on page 148.
Rise/Fall times are measured between 0.5 V and 2.4 V with TTL load, and between 10% Vdd and 90% Vdd with HCMOS load.
17
Revision B, 4-13-04
