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M463S1654CT1-L1L

Synchronous DRAM Module, 16MX64, 6ns, CMOS, MICRO, SODIMM-144

器件类别:存储    存储   

厂商名称:SAMSUNG(三星)

厂商官网:http://www.samsung.com/Products/Semiconductor/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
SAMSUNG(三星)
零件包装代码
MODULE
包装说明
DIMM, DIMM144,20
针数
144
Reach Compliance Code
compliant
ECCN代码
EAR99
访问模式
SINGLE BANK PAGE BURST
最长访问时间
6 ns
其他特性
AUTO/SELF REFRESH
最大时钟频率 (fCLK)
100 MHz
I/O 类型
COMMON
JESD-30 代码
R-XDMA-N144
内存密度
1073741824 bit
内存集成电路类型
SYNCHRONOUS DRAM MODULE
内存宽度
64
湿度敏感等级
1
功能数量
1
端口数量
1
端子数量
144
字数
16777216 words
字数代码
16000000
工作模式
SYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
16MX64
输出特性
3-STATE
封装主体材料
UNSPECIFIED
封装代码
DIMM
封装等效代码
DIMM144,20
封装形状
RECTANGULAR
封装形式
MICROELECTRONIC ASSEMBLY
峰值回流温度(摄氏度)
225
电源
3.3 V
认证状态
Not Qualified
刷新周期
8192
自我刷新
YES
最大待机电流
0.008 A
最大压摆率
0.76 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
3.3 V
表面贴装
NO
技术
CMOS
温度等级
COMMERCIAL
端子形式
NO LEAD
端子节距
0.5 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
文档预览
M463S1654CT1
PC100/PC133
µSODIMM
16Mx64 SDRAM
µSODIMM
Revision 0.1
Sept. 2001
Rev. 0.1 Sept. 2001
M463S1654CT1
Revision History
Revision 0.0 (Aug. 2001,
Preliminary)
• First published.
PC100/PC133
µSODIMM
Revision 0.1 (Sept. 2001)
• Reduced IDD1/4 in DC Characteristics.
• Changed the Notes in Operating AC Parameter.
< Before >
5. For 1H/1L, tRDL=1CLK and tDAL=1CLK+tRP is also supported .
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.
< After >
5.In 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported.
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.
Rev. 0.1 Sept. 2001
M463S1654CT1
M463S1654CT1 SDRAM
µ
SODIMM
GENERAL DESCRIPTION
The Samsung M463S1654CT1 is a 16M bit x 64 Synchro-
nous Dynamic RAM high density memory module. The Sam-
sung M463S1654CT1 consists of four CMOS 16M x 16 bit with
4banks Synchronous DRAMs in TSOP-II 400mil package and
a 2K EEPROM in 8-pin TSSOP package on a 144-pin glass-
epoxy substrate. Three 0.1uF bypass capacitors are mounted
on the printed circuit board in parallel for each SDRAM. The
M463S1654CT1 is a Small Outline Dual In-line Memory Mod-
ule and is intended for mounting into 144-pin edge connector
sockets.
Synchronous design allows precise cycle control with the use
of system clock. I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable laten-
cies allows the same device to be useful for a variety of high
bandwidth, high performance memory system applications.
PC100/PC133
µSODIMM
16Mx64 SDRAM
µ
SODIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD
FEATURE
• Performance range
Part No.
M463S1654CT1-L7C/C7C
M463S1654CT1-L7A/C7A
M463S1654CT1-L1H/C1H
M463S1654CT1-L1L/C1L
Max Freq. (Speed)
133MHz@CL=2
133MHz@CL=3
100MHz@CL=2
100MHz@CL=3
Burst mode operation
Auto & self refresh capability (8192 Cycles/64ms)
LVTTL compatible inputs and outputs
Single 3.3V
±
0.3V power supply
MRS cycle with address key programs
Latency (Access from column address)
Burst length (1, 2, 4, 8 & Full page)
Data scramble (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the
system clock
• Serial presence detect with EEPROM
• PCB :
Height (30mm)
, double sided component
PIN CONFIGURATIONS (Front side/back side)
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
Front Pin
V
SS
DQ0
DQ1
DQ2
DQ3
V
DD
DQ4
DQ5
DQ6
DQ7
V
SS
DQM0
DQM1
V
DD
A0
A1
A2
V
SS
DQ8
DQ9
DQ10
DQ11
V
DD
DQ12
DQ13
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
Back
V
SS
DQ32
DQ33
DQ34
DQ35
V
DD
DQ36
DQ37
DQ38
DQ39
V
SS
DQM4
DQM5
V
DD
A3
A4
A5
V
SS
DQ40
DQ41
DQ42
DQ43
V
DD
DQ44
DQ45
Pin Front
51
53
55
57
59
DQ14
DQ15
V
SS
NC
NC
Pin
52
54
56
58
60
Back
Pin
Front
DQ21
DQ22
DQ23
V
DD
A6
A8
V
SS
A9
A10/AP
V
DD
DQM2
DQM3
V
SS
DQ24
DQ25
DQ26
DQ27
V
DD
DQ28
DQ29
DQ30
DQ31
V
SS
**SDA
V
DD
Pin
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
Back
DQ53
DQ54
DQ55
V
DD
A7
BA0
V
SS
BA1
A11
V
DD
DQM6
DQM7
V
SS
DQ56
DQ57
DQ58
DQ59
V
DD
DQ60
DQ61
DQ62
DQ63
V
SS
**SCL
V
DD
DQ46 95
DQ47 97
V
SS
99
NC 101
NC 103
105
107
Voltage Key
109
CLK0 62 CKE0 111
V
DD
V
DD
113
64
RAS 66 CAS 115
68 *CKE1 117
WE
70
CS0
A12 119
*CS1 72 *A13 121
74 *CLK1 123
DU
76
V
SS
V
SS
125
78
NC
NC 127
80
NC
NC 129
82
V
DD
V
DD
131
DQ16 84 DQ48 133
DQ17 86 DQ49 135
DQ18 88 DQ50 137
DQ19 90 DQ51 139
92
V
SS
141
V
SS
DQ20 94 DQ52 143
PIN NAMES
Pin Name
A0 ~ A12
BA0 ~ BA1
DQ0 ~ DQ63
CLK0
CKE0
CS0
RAS
CAS
WE
DQM0 ~ 7
V
DD
V
SS
SDA
SCL
DU
NC
Function
Address input (Multiplexed)
Select bank
Data input/output
Clock input
Clock enable input
Chip select input
Row address storbe
Column address strobe
Write enable
DQM
Power supply (3.3V)
Ground
Serial data I/O
Serial clock
Don′t use
No connection
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
* These pins are not used in this module.
**
These pins should be NC in the system
which does not support SPD.
* SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Rev. 0.1 Sept. 2001
M463S1654CT1
PIN CONFIGURATION DESCRIPTION
Pin
CLK
CS
Name
System clock
Chip select
PC100/PC133
µSODIMM
Input Function
Active on the positive going edge to sample all inputs.
Disables or enables device operation by masking or enabling all inputs except
CLK, CKE and DQM
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disable input buffers for power down in standby.
CKE should be enabled 1CLK+t
SS
prior to valid command.
Row/column addresses are multiplexed on the same pins.
Row address : RA0 ~ RA12, Column address : CA0 ~ CA8
Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
Latches column addresses on the positive going edge of the CLK with CAS low.
Enables column access.
Enables write operation and row precharge.
Latches data in starting from CAS, WE active.
Makes data output Hi-Z, t
SHZ
after the clock and masks the output.
Blocks data input when DQM active. (Byte masking)
Data inputs/outputs are multiplexed on the same pins.
Power and ground for the input buffers and the core logic.
CKE
Clock enable
A0 ~ A12
BA0 ~ BA1
RAS
CAS
WE
DQM0 ~ 7
DQ
0
~
63
Address
Bank select address
Row address strobe
Column address strobe
Write enable
Data input/output mask
Data input/output
Power supply/ground
V
DD
/V
SS
Rev. 0.1 Sept. 2001
M463S1654CT1
FUNCTIONAL BLOCK DIAGRAM
CS0
DQM0
LDQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
UDQM
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CS
DQM4
PC100/PC133
µSODIMM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
U0
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQM5
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
LDQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
UDQM
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CS
U2
DQM2
LDQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
UDQM
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
SDRAM U0 ~ U3
SDRAM U0 ~ U3
SDRAM U0 ~ U3
SDRAM U0 ~ U3
SDRAM U0 ~ U3
10Ω
DQn
V
DD
Three 0.1uF Capacitors
per each SDRAM
Vss
To all SDRAMs
Every DQ pin of SDRAM
CS
DQM6
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQM7
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
LDQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
UDQM
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Serial PD
SCL
47KΩ
WP
SA0 SA1 SA2
SDA
CS
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQM3
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
A0 ~ A12, BA0 & 1
RAS
CAS
WE
CKE0
U1
U3
U0
CLK0
U1
U2
U3
10Ω
CLK1
10pF
Rev. 0.1 Sept. 2001
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参数对比
与M463S1654CT1-L1L相近的元器件有:M463S1654CT1-L1H、M463S1654CT1-C7A、M463S1654CT1-L7A、M463S1654CT1-C7C、M463S1654CT1-L7C、M463S1654CT1-C1L、M463S1654CT1-C1H。描述及对比如下:
型号 M463S1654CT1-L1L M463S1654CT1-L1H M463S1654CT1-C7A M463S1654CT1-L7A M463S1654CT1-C7C M463S1654CT1-L7C M463S1654CT1-C1L M463S1654CT1-C1H
描述 Synchronous DRAM Module, 16MX64, 6ns, CMOS, MICRO, SODIMM-144 Synchronous DRAM Module, 16MX64, 6ns, CMOS, MICRO, SODIMM-144 Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, MICRO, SODIMM-144 Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, MICRO, SODIMM-144 Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, MICRO, SODIMM-144 Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, MICRO, SODIMM-144 Synchronous DRAM Module, 16MX64, 6ns, CMOS, MICRO, SODIMM-144 Synchronous DRAM Module, 16MX64, 6ns, CMOS, MICRO, SODIMM-144
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
零件包装代码 MODULE MODULE MODULE MODULE MODULE MODULE MODULE MODULE
包装说明 DIMM, DIMM144,20 DIMM, DIMM144,20 DIMM, DIMM144,20 DIMM, DIMM144,20 DIMM, DIMM144,20 DIMM, DIMM144,20 DIMM, DIMM144,20 DIMM, DIMM144,20
针数 144 144 144 144 144 144 144 144
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
访问模式 SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST
最长访问时间 6 ns 6 ns 5.4 ns 5.4 ns 5.4 ns 5.4 ns 6 ns 6 ns
其他特性 AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
最大时钟频率 (fCLK) 100 MHz 100 MHz 133 MHz 133 MHz 133 MHz 133 MHz 100 MHz 100 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-XDMA-N144 R-XDMA-N144 R-XDMA-N144 R-XDMA-N144 R-XDMA-N144 R-XDMA-N144 R-XDMA-N144 R-XDMA-N144
内存密度 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit 1073741824 bit
内存集成电路类型 SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE
内存宽度 64 64 64 64 64 64 64 64
湿度敏感等级 1 1 1 1 1 1 1 1
功能数量 1 1 1 1 1 1 1 1
端口数量 1 1 1 1 1 1 1 1
端子数量 144 144 144 144 144 144 144 144
字数 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words 16777216 words
字数代码 16000000 16000000 16000000 16000000 16000000 16000000 16000000 16000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
组织 16MX64 16MX64 16MX64 16MX64 16MX64 16MX64 16MX64 16MX64
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
封装代码 DIMM DIMM DIMM DIMM DIMM DIMM DIMM DIMM
封装等效代码 DIMM144,20 DIMM144,20 DIMM144,20 DIMM144,20 DIMM144,20 DIMM144,20 DIMM144,20 DIMM144,20
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
峰值回流温度(摄氏度) 225 225 225 225 225 225 225 225
电源 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
刷新周期 8192 8192 8192 8192 8192 8192 8192 8192
自我刷新 YES YES YES YES YES YES YES YES
最大待机电流 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A
最大压摆率 0.76 mA 0.76 mA 0.8 mA 0.8 mA 0.88 mA 0.88 mA 0.76 mA 0.76 mA
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V 3 V 3 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 NO NO NO NO NO NO NO NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子形式 NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD
端子节距 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
厂商名称 SAMSUNG(三星) - SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星)
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器件捷径:
00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W
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