M54/M74HC4518
M54/M74HC4520
HC4518 DUAL DECADE COUNTER
HC4520 DUAL 4 BIT BINARY COUNTER
.
.
.
.
.
.
.
.
HIGH SPEED
f
MAX
= 55 MHz (TYP.) at V
CC
= 5 V
LOW POWER DISSIPATION
I
CC
= 4
µA
(MAX.) AT T
A
= 25
°C
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE WITH
4520B/4518B
B1R
(Plastic Package)
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCXXXXF1R
M74HCXXXXM1R
M74HCXXXXB1R
M74HCXXXXC1R
PIN CONNECTIONS
(top view)
DESCRIPTION
The M54/74HC4518/4520 are high speed CMOS
DUAL 4 BIT BINARY COUNTERS fabricated in sili-
2
con gate C MOS technology. They have the same
high speed performance of LSTTL combined with
true CMOS low power consumption.
They consists of two identical internally syn-
chronous 4-stage counters. The counter stages are
D-type flip-flops having interchangeable Clock and
ENABLE inputs for incrementing on either the posi-
tive-going or negative-going transition.
For single-unit operation the ENABLE input is main-
tained ”high” and the counter advances on each
positive-going transition of the CLOCK. The
counters are cleared by high levels on their clear
lines. The counter can be cascaded in the ripple
mode by connecting Q4 to the enable input of the
subsequent counter while the clock input of the latter
is held permanently low.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
March 1993
NC =
No Internal
Connection
1/13
M54/M74HC4518/4520
LOGIC DIAGRAM
(1/2 HC4518)
LOGIC DIAGRAM
(1/2 HC4520)
2/13
M54/M74HC4518/4520
TIMING CHART
(HC4518)
TIMING CHART
(HC4520)
3/13
M54/M74HC4518/4520
TRUTH TABLE
INPUTS
CLOCK
L
X
X
L
H
X
X: Don’t Care Z: High Impedance
ENABLE
H
CLEAR
L
L
L
L
L
L
H
FUNCTION
INCREMENT COUNTER
INCREMENT COUNTER
NO CHANGE
NO CHANGE
NO CHANGE
NO CHANGE
Q0 THRU Q3 = L
X
PIN DESCRIPTION
PIN No
1, 9
2, 10
3, 4, 5, 6
7, 15
11, 12, 13,
14
8
16
SYMBOL
1CLOCK,
2CLOCK
1ENABLE,
2ENABLE
1Q0 to 1Q3
1CLEAR,
2CLEAR
2Q0 to 2Q3
GND
V
CC
NAME AND FUNCTION
Clock Inputs (LOW to
HIGH, Edge-triggered)
Clock Enable Inputs
Data Outputs
Asynchronous Reset
Inputs (Active LOW)
Data Outputs
Ground (0V)
Positive Supply Voltage
INPUT AND OUTPUT EQUIVALENT CIRCUIT
IEC LOGIC SYMBOLS
HC4518
HC4520
4/13
M54/M74HC4518/4520
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
D
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source Sink Current Per Output Pin
DC V
CC
or Ground Current
Power Dissipation
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
25
±
50
500 (*)
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
mW
o
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW:
≅
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
t
r
, t
f
Parameter
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature:
M54HC
Series
M74HC
Series
Input Rise and Fall Time
Value
2 to 6
0 to V
CC
0 to V
CC
-55 to +125
-40 to +85
0 to 1000
0 to 500
0 to 400
Unit
V
V
V
C
o
C
ns
o
V
CC
= 2 V
V
CC
= 4.5 V
V
CC
= 6 V
5/13
