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M5M5V408BTP-70LI

Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, 0.400 INCH, 1.27 MM PITCH, PLASTIC, TSOP2-32

器件类别:存储    存储   

厂商名称:Mitsubishi(日本三菱)

厂商官网:http://www.mitsubishielectric.com/semiconductors/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
零件包装代码
TSOP2
包装说明
TSOP2, TSOP32,.46
针数
32
Reach Compliance Code
unknown
ECCN代码
3A991.B.2.A
最长访问时间
70 ns
I/O 类型
COMMON
JESD-30 代码
R-PDSO-G32
JESD-609代码
e0
长度
20.95 mm
内存密度
4194304 bit
内存集成电路类型
STANDARD SRAM
内存宽度
8
功能数量
1
端子数量
32
字数
524288 words
字数代码
512000
工作模式
ASYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
512KX8
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
TSOP2
封装等效代码
TSOP32,.46
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, THIN PROFILE
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3/3.3 V
认证状态
Not Qualified
座面最大高度
1.2 mm
最小待机电流
2 V
最大压摆率
0.04 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
10.16 mm
Base Number Matches
1
文档预览
revision-K2.0e, ' 99.03.10
MITSUBISHI LSIs
M5M5V408BFP,TP,RT,KV
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
DESCRIPTION
The M5M5V408B is a family of low voltage 4-Mbit static RAMs
organized as 524,288-words by 8-bit, fabricated by Mitsubishi's high-
performance 0.25µm CMOS technology.
The M5M5V408B is suitable for memory applications where a
simple interfacing , battery operating and battery backup are the
important design objectives.
M5M5V408B is packaged in 32-pin plastic SOP, 32-pin plastic
TSOP and 32-pin 8mm x 13.4mm STSOP packages. Two types of
TSOPs and two types of STSOPs are available, M5M5V408BTP
(normal-lead-bend TSOP), M5M5V408BRT (reverse-lead-bend
TSOP),
M5M5V408BKV
(normal-lead-bend
STSOP)
and
M5M5V408BKR (reverse-lead-bend STSOP).
These two types
TSOPs and two types STSOPs are suitable for a surface mounting
on double-sided printed circuit boards.
From the point of operating temperature, the family is divided into
three versions; "Standard", "W-version", and "I-version". Those are
summarized in the part name table below.
FEATURES
• Single +2.7~+3.6V power supply
• Small stand-by current: 0.3µA(3V,typ.)
• No clocks, No refresh
• Data retention supply voltage=2.0V to 3.6V
• All inputs and outputs are TTL compatible.
• Easy memory expansion by S
• Common Data I/O
• Three-state outputs: OR-tie capability
• OE prevents data contention in the I/O bus
• Process technology: 0.25µm CMOS
• Package:
M5M5V408BFP: 32 pin 525 mil SOP
M5M5V408BTP/RT: 32 PIN 400mil TSOP(ll)
M5M5V408BKV/KR: 32 pin 8mm x13.4mm STSOP
PART NAME TABLE
Version,
Operating
temperature
Part name
(## stands for "FP","TP",
"RT","KV"or"KR")
M5M5V408B## -70L
M5M5V408B## -85L
M5M5V408B## -70H
M5M5V408B## -85H
M5M5V408B## -70LW
Power
Supply
2.7 ~ 3.6V
2.7 ~ 3.6V
Access
time
Stand-by current Icc
(PD)
, Vcc=3.0V
typical *
Ratings (max.)
25°C 40°C 25°C 40°C 70°C 85°C
---
---
---
1µA
---
3µA
30µA
15µA
---
---
max.
70ns
85ns
70ns
85ns
70ns
85ns
70ns
85ns
70ns
85ns
70ns
85ns
Active
current
Icc1
(3.0V, typ.)
Standard
0 ~ +70°C
0.3µA 1µA
W-
version
-20 ~ +85°C
M5M5V408B## -85LW
M5M5V408B## -70HW
M5M5V408B## -85HW
M5M5V408B## -70LI
2.7 ~ 3.6V
2.7 ~ 3.6V
2.7 ~ 3.6V
2.7 ~ 3.6V
---
---
---
1µA
---
1µA
---
3µA
---
3µA
30µA 60µA
15µA 30µA
30mA
(10MHz)
5mA
(1MHz)
0.3µA 1µA
---
---
I-
version
-40 ~ +85°C
M5M5V408B## -85LI
M5M5V408B## -70HI
M5M5V408B## -85HI
30µA 60µA
15µA 30µA
0.3µA 1µA
* "typical" parameter is sampled, not 100% tested.
MITSUBISHI ELECTRIC
1
revision-K2.0e, ' 99.03.10
MITSUBISHI LSIs
M5M5V408BFP,TP,RT,KV
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
PIN CONFIGURATION (TOP VIEW)
Pin
A0 ~ A18
DQ1 ~ DQ8
S
W
OE
Vcc
GND
Function
Address input
Data input / output
Chip select input
Write control input
Output inable input
Power supply
Ground supply
A
18
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
1
DQ
2
DQ
3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A
15
A
17
W
A
13
A
8
A
9
A
11
OE
A
10
S
DQ
8
DQ
7
DQ
6
DQ
5
DQ
4
V
CC
A
15
A
17
W
A
13
A
8
A
9
A
11
OE
A
10
S
DQ
8
DQ
7
DQ
6
DQ
5
DQ
4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A
18
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
1
DQ
2
DQ
3
GND
Outline
32P2M-A (FP)
32P3Y-H (TP)
Outline
32P3Y-J (RT)
A
11
A
9
A
8
A
13
W
A
18
A
15
Vcc
A
17
A
16
A
14
A
12
A
7
A
6
A
5
A
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
M5M5V408BKV
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
S
DQ8
DQ7
DQ6
DQ5
DQ4
GND
DQ3
DQ2
DQ1
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
12
A
14
A
16
A
17
Vcc
A
15
A
18
W
A
13
A
8
A
9
A
11
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
M5M5V408BKR
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A
3
A
2
A
1
A
0
DQ1
DQ2
DQ3
GND
DQ4
DQ5
DQ6
DQ7
DQ8
S
A
10
OE
Outline
32P3K-B
Outline
32P3K-C
MITSUBISHI ELECTRIC
2
revision-K2.0e, ' 99.03.10
MITSUBISHI LSIs
M5M5V408BFP,TP,RT,KV
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
FUNCTION
The M5M5408BFP,TP,RT,KV,KR is organized as 524,288-
words by 8-bit. These devices operate on a single +2.7~3.6V
power supply, and are directly TTL compatible to both input
and output. Its fully static circuit needs no clocks and no
refresh, and makes it useful.
A write operation is executed during the S low and W low
overlap time. The address(A0~A18) must be set up before
the write cycle
A read operation is executed by setting W at a high level
and OE at a low level while S are in an active state(S=L).
When setting S at a high level, the chips are in a non-
selectable mode in which both reading and writing are
disabled. In this mode, the output stage is in a high-impedance
state, allowing OR-tie with other chips. Setting the OE at a high
level,the output stage is in a high-impedance state, and the
data bus contention problem in the write cycle is eliminated.
The power supply current is reduced as low as 0.3µA(25°C,
typical), and the memory data can be held at +2V power
supply, enabling battery back-up operation during power failure
or power-down operation in the non-selected mode.
FUNCTION TABLE
S
H
L
L
L
W
X
L
H
H
OE
X
X
L
H
Mode
Non selection
Write
Read
Read
DQ
High-impedance
Data input (D)
Data output (Q)
High-impedance
Icc
Standby
Active
Active
Active
Pin
A0 ~ A18
Function
Address input
Chip select input
Write control input
Output inable input
Power supply
Ground supply
DQ1 ~ DQ8 Data input / output
S
W
OE
Vcc
GND
BLOCK DIAGRAM
M5M5V408B
FP/TP/RT
M5M5V408BKV/KR
16
15
14
13
12
11
10
9
6
7
21
22
M5M5V408BKV/KR
A
4
A
5
A
6
A
7
A
12
A
14
A
16
A
17
A
18
A
15
A
10
A
11
A
9
A
8
A
13
8
7
6
5
4
3
2
30
1
31
M5M5V408B
FP/TP/RT
13
14
15
17
18
19
20
21
MEMORY ARRAY
524288 WORDS
x 8 BITS
23
25
26
27
28
29
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
DQ
8
23
25
26
27
28
31
1
2
3
4
5
30
29
22
24
CLOCK
GENERATOR
W
S
OE
V
CC
(3V)
A
0
A
1
A
2
A
3
12
11
10
9
20
19
18
17
32
8
32
24
16
GND
(0V)
MITSUBISHI ELECTRIC
3
revision-K2.0e, ' 99.03.10
MITSUBISHI LSIs
M5M5V408BFP,TP,RT,KV
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Supply voltage
Input voltage
Output voltage
Power dissipation
Operating
temperature
Storage temperature
Conditions
With respect to GND
With respect to GND
With respect to GND
Ta=25°C
Standard
W-version
I-version
Ratings
Units
Vcc
V
I
V
O
P
d
T
a
T
stg
(-L, -H)
(-LW, -HW)
(-LI, -HI)
-0.5
*
~ +4.6
-0.5
*
~ Vcc + 0.5
0 ~ Vcc
700
0 ~ +70
-20 ~ +85
-40 ~ +85
-65 ~150
V
mW
°C
°C
* -3.0V in case of AC (Pulse width
30ns)
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
High-level input voltage
Low-level input voltage
High-level output voltage 1
I
OH
= -0.5mA
High-level output voltage 2
I
OH
= -0.05mA
Low-level output voltage
Input leakage current
Output leakage current
Active supply current
( AC, CMOS-level )
Active supply current
( AC,TTL-level )
Conditions
( Vcc=2.7 ~ 3.6V, unless otherwise noted)
Limits
Min
Typ
Max
Vcc+0.3V
Units
V
IH
V
IL
V
OH1
V
OH2
V
OL
I
I
I
O
Icc
1
Icc
2
2.2
-0.3 *
2.4
Vcc-0.5V
0.6
V
0.4
±1
±1
I
OL
=2mA
V
I
=0
~
Vcc
S=V
IH
or OE=V
IH,
V
I/O
=0
~
Vcc
S
≤0.2V
Output-open
Other inputs
≤0.2V
or
≥Vcc-0.2V
Output-open
S=VIL
Other inputs=V
IH
or V
IL
-LW, -LI
Vcc=3.6V, max.
-L, -LW, -LI
-HW, -HI
-H, -HW, -HI
-H
-HW
-HI
f= 10MHz
f= 1MHz
f= 10MHz
f= 1MHz
+85°C
+70°C
+85°C
+70°C
+40°C
0 ~ +25°C
-20 ~ +25°C
-40 ~ +25°C
µA
-
-
-
-
-
-
-
-
-
-
-
-
-
Icc
3
Stand by supply current
(CMOS-level input)
S
≥Vcc-0.2V
Other inputs=0~Vcc
30
5
30
5
-
-
-
-
1
0.3
0.3
0.3
-
40
7
40
7
80
40
40
20
5
2
2
2
0.5
mA
µA
Icc
4
Stand by supply current
(TTL-level input)
S=V
IH
,Other inputs= 0 ~ Vcc
mA
Note 1: Direction for current flowing into IC is indicated as positive (no mark)
Note 2: Typical value is for Vcc=3.0V
* -3.0V in case of AC (Pulse width
30ns)
CAPACITANCE
Symbol
Parameter
Input capacitance
Output capacitance
Conditions
V
I
=GND, V
I
=25mVrms, f=1MHz
V
O
=
GND,V
O
=25mVrms, f=1MHz
(Vcc=2.7 ~ 3.6V, unless otherwise noted)
Limits
Min
Typ
Max
Units
C
I
C
O
8
10
pF
MITSUBISHI ELECTRIC
4
revision-K2.0e, ' 99.03.10
MITSUBISHI LSIs
M5M5V408BFP,TP,RT,KV
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
AC ELECTRICAL CHARACTERISTICS
(1) TEST CONDITIONS
Supply voltage
Input pulse
Input rise time and fall time
Reference level
(Vcc=2.7 ~ 3.6V, unless otherwise noted)
2.7V~3.6V
V
IH
=2.4V,V
IL
=0.4V
5ns
V
OH
=V
OL
=1.5V
Transition is measured ±500mV from
steady state voltage.(for t
en
,t
dis
)
1TTL
DQ
CL
Including scope and
jig capacitance
Output loads
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
Fig.1 Output load
(2) READ CYCLE
Limits
Symbol
Parameter
Read cycle time
Address access time
Chip select access time
Output enable access time
Output disable time after S high
Output disable time after OE high
Output enable time after S low
Output enable time after OE low
Data valid time after address
M5M5V408B
FP,TP,RT,KV,KR-70
M5M5V408B
FP,TP,RT,KV,KR-85
Units
Min
Max
Min
Max
t
CR
t
a
(A)
t
a
(S)
t
a
(OE)
t
dis
(S)
t
dis
(OE)
t
en
(S)
t
en
(OE)
t
V
(A)
70
70
70
35
25
25
10
5
10
85
85
85
45
30
30
10
5
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
(3) WRITE CYCLE
Limits
Symbol
Parameter
Write cycle time
Write pulse width
Address set up time
Address set up time with respect to W high
Chip select set up time
Data set up time
Data hold time
Write recovery time
Output disable time after W low
Output disable time after OE high
Output enable time after W high
Output enable time after OE low
M5M5V408B
FP,TP,RT,KV,KR-70
M5M5V408B
FP,TP,RT,KV,KR-85
Units
Min
Max
Min
Max
t
CW
t
w
(W)
t
su
(A)
t
su
(A-WH)
t
su
(S)
t
su
(D)
t
h
(D)
t
rec
(W)
t
dis
(W)
t
dis
(OE)
t
en
(W)
t
en
(OE)
70
55
0
65
65
35
0
0
25
25
5
5
85
60
0
70
70
35
0
0
30
30
5
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MITSUBISHI ELECTRIC
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