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M74HC10C1R

HC/UH SERIES, TRIPLE 3-INPUT NAND GATE, PDIP14
HC/UH系列, 三 3输入 与非门, PDIP14

器件类别:逻辑    逻辑   

厂商名称:ST(意法半导体)

厂商官网:http://www.st.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
ST(意法半导体)
零件包装代码
QFN
包装说明
PLASTIC, CC-20
针数
20
Reach Compliance Code
compli
系列
HC/UH
JESD-30 代码
S-PQCC-J20
JESD-609代码
e3
长度
8.9662 mm
负载电容(CL)
50 pF
逻辑集成电路类型
NAND GATE
最大I(ol)
0.004 A
功能数量
3
输入次数
3
端子数量
20
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
QCCJ
封装等效代码
LDCC20,.4SQ
封装形状
SQUARE
封装形式
CHIP CARRIER
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
2/6 V
Prop。Delay @ Nom-Su
19 ns
传播延迟(tpd)
19 ns
认证状态
Not Qualified
施密特触发器
NO
座面最大高度
4.57 mm
最大供电电压 (Vsup)
6 V
最小供电电压 (Vsup)
2 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Matte Tin (Sn)
端子形式
J BEND
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
8.9662 mm
文档预览
M54HC10
M74HC10
TRIPLE 3-INPUT NAND GATE
.
.
.
.
.
.
.
.
HIGH SPEED
t
PD
= 6 ns (TYP.) AT V
CC
= 5 V
LOW POWER DISSIPATION
I
CC
= 1
µA
(MAX.) AT T
A
= 25
°C
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE
IOH
= I
OL
= 4 mA (MIN.)
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE WITH
54/74LS10
B1R
(Plastic Package)
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC10F1R
M74HC10M1R
M74HC10B1R
M74HC10C1R
DESCRIPTION
The M54/74HC10 is a high speed CMOS TRIPLE
3-INPUT NAND GATE fabricated with silicon gate
2
C MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
The internal circuit is composed of 3 stages includ-
ing buffer output, which enables high noise im-
munity and stable output.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
December 1992
1/9
M54/M74HC10
TRUTH TABLE
A
L
X
X
H
B
X
L
X
H
C
X
X
L
H
Y
H
H
H
L
IEC LOGIC SYMBOL
PIN DESCRIPTION
PIN No
1, 3, 9
2, 4, 10
13, 5, 11
12, 6, 8
7
14
SYMBOL
1A to 3A
1B to 3B
1C to 3C
1Y to 3Y
GND
V
CC
NAME AND FUNCTION
Data Inputs
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
SCHEMATIC CIRCUIT
(Per Gate)
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
CC
I
O
or I
GND
P
D
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source Sink Current Per Output Pin
DC V
CC
or Ground Current
Power Dissipation
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
25
±
50
500 (*)
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
mW
o
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW:
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
2/9
M54/M74HC10
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
t
r
, t
f
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature:
M54HC
Series
M74HC
Series
Input Rise and Fall Time
Parameter
Value
2 to 6
0 to V
CC
0 to V
CC
-55 to +125
-40 to +85
0 to 1000
0 to 500
0 to 400
Unit
V
V
V
C
C
ns
o
o
V
CC
= 2 V
V
CC
= 4.5 V
V
CC
= 6 V
DC SPECIFICATIONS
Test Conditions
Symbol
Parameter
V
CC
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
V
OL
Low Level Output
Voltage
2.0
4.5
6.0
4.5
6.0
I
I
I
CC
Input Leakage
Current
Quiescent Supply
Current
6.0
6.0
1.9
4.4
5.9
4.18
5.68
2.0
4.5
6.0
4.31
5.8
0.0
0.0
0.0
0.17
0.18
0.1
0.1
0.1
0.26
0.26
±0.1
1
T
A
= 25 C
54HC and 74HC
Min.
1.5
3.15
4.2
0.5
1.35
1.8
V
I
=
I
O
=-20
µA
V
IH
or
V
IL
I
O
=-4.0 mA
I
O
=-5.2 mA
V
I
=
I
O
= 20
µA
V
IH
or
V
IL
I
O
= 4.0 mA
I
O
= 5.2 mA
V
I
= V
CC
or GND
V
I
= V
CC
or GND
1.9
4.4
5.9
4.13
5.63
0.1
0.1
0.1
0.33
0.33
±1
10
Typ.
Max.
o
Value
-40 to 85
o
C -55 to 125
o
C
74HC
54HC
Min.
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
4.10
5.60
0.1
0.1
0.1
0.40
0.40
±1
20
µA
µA
V
V
Max.
Min.
1.5
3.15
4.2
0.5
1.35
1.8
V
Max.
V
Unit
V
IH
High Level Input
Voltage
Low Level Input
Voltage
High Level
Output Voltage
V
IL
V
OH
3/9
M54/M74HC10
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Test Conditions
Symbol
Parameter
V
CC
(V)
2.0
4.5
6.0
2.0
4.5
6.0
C
IN
C
PD
(*)
Input Capacitance
Power Dissipation
Capacitance
T
A
= 25 C
54HC and 74HC
Min. Typ. Max.
30
8
7
27
9
8
5
23
75
15
13
75
15
13
10
o
Value
-40 to 85
o
C -55 to 125
o
C
74HC
54HC
Min. Max. Min. Max.
95
19
16
95
19
16
10
110
22
19
110
22
19
10
pF
pF
ns
ns
Unit
t
TLH
t
THL
t
PLH
t
PHL
Output Transition
Time
Propagation
Delay Time
(*) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. I
CC
(opr) = C
PD
•V
CC
•f
IN
+ I
CC
/3 (per Gate)
SWITCHING CHARACTERISTICS TEST CIRCUIT
TEST CIRCUIT I
CC
(Opr.)
INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST.
4/9
M54/M74HC10
Plastic DIP14 MECHANICAL DATA
mm
MIN.
a1
B
b
b1
D
E
e
e3
F
I
L
Z
1.27
3.3
2.54
0.050
8.5
2.54
15.24
7.1
5.1
0.130
0.100
0.51
1.39
0.5
0.25
20
0.335
0.100
0.600
0.280
0.201
1.65
TYP.
MAX.
MIN.
0.020
0.055
0.020
0.010
0.787
0.065
inch
TYP.
MAX.
DIM.
P001A
5/9
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参数对比
与M74HC10C1R相近的元器件有:M54HC10F1R、M54HC10。描述及对比如下:
型号 M74HC10C1R M54HC10F1R M54HC10
描述 HC/UH SERIES, TRIPLE 3-INPUT NAND GATE, PDIP14 HC/UH SERIES, TRIPLE 3-INPUT NAND GATE, PDIP14 HC/UH SERIES, TRIPLE 3-INPUT NAND GATE, PDIP14
系列 HC/UH HC/UH HC/UH
功能数量 3 3 3
端子数量 20 14 14
温度等级 INDUSTRIAL MILITARY MILITARY
端子形式 J BEND THROUGH-HOLE THROUGH-HOLE
端子位置 QUAD DUAL DUAL
是否Rohs认证 符合 不符合 -
厂商名称 ST(意法半导体) ST(意法半导体) -
零件包装代码 QFN DIP -
包装说明 PLASTIC, CC-20 DIP, DIP14,.3 -
针数 20 14 -
Reach Compliance Code compli _compli -
JESD-30 代码 S-PQCC-J20 R-GDIP-T14 -
JESD-609代码 e3 e0 -
负载电容(CL) 50 pF 50 pF -
逻辑集成电路类型 NAND GATE NAND GATE -
最大I(ol) 0.004 A 0.004 A -
输入次数 3 3 -
最高工作温度 85 °C 125 °C -
最低工作温度 -40 °C -55 °C -
封装主体材料 PLASTIC/EPOXY CERAMIC, GLASS-SEALED -
封装代码 QCCJ DIP -
封装等效代码 LDCC20,.4SQ DIP14,.3 -
封装形状 SQUARE RECTANGULAR -
封装形式 CHIP CARRIER IN-LINE -
峰值回流温度(摄氏度) NOT SPECIFIED NOT SPECIFIED -
电源 2/6 V 2/6 V -
Prop。Delay @ Nom-Su 19 ns 22 ns -
传播延迟(tpd) 19 ns 22 ns -
认证状态 Not Qualified Not Qualified -
施密特触发器 NO NO -
座面最大高度 4.57 mm 5.08 mm -
最大供电电压 (Vsup) 6 V 6 V -
最小供电电压 (Vsup) 2 V 2 V -
标称供电电压 (Vsup) 5 V 5 V -
表面贴装 YES NO -
技术 CMOS CMOS -
端子面层 Matte Tin (Sn) Tin/Lead (Sn/Pb) -
端子节距 1.27 mm 2.54 mm -
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED -
宽度 8.9662 mm 7.62 mm -
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