19-1190; Rev 0; 3/97
IT
TION K
VALUA
E
BLE
AVAILA
10-Bit, 40Msps, TTL-Output ADC
____________________________Features
o
o
o
o
o
o
Monolithic 40Msps Converter
On-Chip Track/Hold
Bipolar, ±2V Analog Input
57dB SNR at 3.58MHz Input
5pF Input Capacitance
TTL Outputs
_______________General Description
The MAX1161 10-bit, monolithic analog-to-digital con-
verter (ADC) is capable of 40Msps minimum word
rates. An on-board track/hold ensures excellent dynam-
ic performance without the need for external compo-
nents. A 5pF input capacitance minimizes drive
requirement problems.
Inputs and outputs are TTL compatible. An overrange
output is provided to indicate overflow conditions.
Output data format is straight binary. Power dissipation
is low at only 1W with +5V and -5.2V power-supply volt-
ages. The MAX1161 also accepts wide, ±2V input volt-
ages.
The MAX1161 is available in 28-pin DIP and SO pack-
ages in the commercial temperature range.
MAX1161
________________________Applications
Medical Imaging
Professional Video
Radar Receivers
Instrumentation
Digital Communications
______________Ordering Information
PART
MAX1161ACPI
MAX1161BCPI
MAX1161ACWI
MAX1161BCWI
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
28 Wide Plastic DIP
28 Wide Plastic DIP
28 SO
28 SO
________________Functional Diagram
ANALOG
INPUT
4
COARSE
ADC
ANALOG
PRESCALER
__________________Pin Configuration
TOP VIEW
TOP VIEW
DGND
D0
D1
D2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
DV
CC
27
V
EE
26
AGND
25
V
CC
VFB
VSB
DECODING NETWORK
T/H
AMPLIFIER
BANK
D3
D4
DIGITAL
OUTPUT
D5
D6
D7
D8
D9
D10
DGND
MAX1161
24
23
22
VRM
21
VIN
20
VST
19
18
17
16
15
VFT
V
CC
AGND
V
EE
CLK
SUCCESSIVE INTERPOLATION
STAGE i
10
SUCCESSIVE INTERPOLATION
STAGE i + 1
.
.
.
.
SUCCESSIVE INTERPOLATION
STAGE N
DV
CC
DIP/SO
1
________________________________________________________________
Maxim Integrated Products
For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
10-Bit, 40Msps, TTL-Output ADC
MAX1161
ABSOLUTE MAXIMUM RATINGS
V
CC
........................................................................................+6V
V
EE
..........................................................................................-6V
Analog Input.......................................................VFB
≤
VIN
≤
VFT
VFT
,
VFB ...........................................................................3V, -3V
Reference-Ladder Current..................................................12mA
CLK Input...............................................................................V
CC
Digital Outputs.....................................................30mA to -30mA
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP ........................................................................1.14W
SO .........................................................................................1W
Operating Temperature Range...............................0°C to +70°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec). ............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +5.0V, V
EE
= -5.2V, DV
CC
= +5.0V, V
IN
= ±2.0V, VSB = -2.0V, VST = +2.0V, f
CLK
= 40MHz, 50% clock duty cycle,
T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Resolution
DC ACCURACY
(±full scale, 250kHz sample rate, T
A
= +25°C)
Integral Nonlinearity
Differential Nonlinearity
No Missing Codes
ANALOG INPUT
Input Voltage Range
Input Bias Current
Input Bias Current
Input Resistance
Input Resistance
Input Capacitance
Input Bandwidth
Positive Full-Scale Error
Negative Full-Scale Error
REFERENCE INPUT
Reference-Ladder
Resistance
Reference-Ladder
Tempco
TIMING CHARACTERISTICS
Maximum Conversion Rate
Overvoltage Recovery Time
Pipeline Delay (Latency)
Output Delay
Aperture Delay Time
Aperture Jitter Time
Acquisition Time
2
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
VI
V
VI
V
V
V
V
14
1
5
12
40
20
1
18
14
1
5
12
40
20
1
18
MHz
ns
Clock
Cycle
ns
ns
ps-RMS
ns
VI
V
500
800
0.8
500
800
0.8
Ω
Ω/°C
3dB small signal
T
A
= -55°C to +125°C
V
IN
= 0V
T
A
= -55°C to +125°C
VI
VI
VI
VI
VI
VI
V
V
V
100
75
300
300
5
120
±2.0
±2.0
±2.0
30
60
75
100
75
300
300
5
120
±2.0
±2.0
±2.0
30
60
75
V
µA
µA
kΩ
kΩ
pF
MHz
LSB
LSB
I
I
±1.0
±0.5
Guaranteed
±1.5
±0.75
Guaranteed
LSB
LSB
CONDITIONS
TEST
LEVEL
MIN
10
MAX1161A
TYP
MAX
MIN
10
MAX1161B
TYP
MAX
UNITS
Bits
_______________________________________________________________________________________
10-Bit, 40Msps, TTL-Output ADC
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +5.0V, V
EE
= -5.2V, DV
CC
= +5.0V, V
IN
= ±2.0V, VSB = -2.0V, VST = +2.0V, f
CLK
= 40MHz, 50% clock duty cycle,
T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
DYNAMIC PERFORMANCE
Effective Number of Bits
(ENOB)
f
IN
= 1MHz
f
IN
= 3.58MHz
f
IN
= 10.0MHz
T
A
= +25°C
f
IN
= 1MHz
Signal-to-Noise Ratio
(without harmonics)
(SNR)
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 3.58MHz
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 10.0MHz
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 1MHz
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 3.58MHz
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 10.0MHz
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 1MHz
Signal-to-Noise and
Distortion Ratio
(SINAD)
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 3.58MHz
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
f
IN
= 10.0MHz
Spurious-Free
Dynamic Range (SFDR)
Differential Phase
Differential Gain
T
A
= 0°C to +70°C,
T
A
= -25°C to +85°C
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
I
IV
I
IV
I
IV
I
IV
I
IV
I
IV
I
IV
I
IV
I
IV
V
V
V
55
53
55
53
48
45
54
51
54
51
46
45
52
49
52
49
44
43
67
0.2
0.5
46
54
57
55
57
55
50
47
56
53
56
53
48
47
54
8.7
8.7
7.3
52
50
52
50
46
43
52
49
52
49
43
41
49
46
49
46
41
40
67
0.2
0.7
dB
Degrees
%
43
51
dB
54
52
54
52
48
45
54
51
54
51
45
44
51
dB
dB
8.2
8.2
6.9
Bits
CONDITIONS
TEST
LEVEL
MAX1161A
MIN TYP MAX
MAX1161B
MIN TYP MAX
UNITS
MAX1161
Total Harmonic Distortion
(THD)
f
IN
= 1MHz
f
IN
= 3.58MHz,
4.35MHz
f
IN
= 3.58MHz,
4.35MHz
_______________________________________________________________________________________
3
10-Bit, 40Msps, TTL-Output ADC
MAX1161
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +5.0V, V
EE
= -5.2V, DV
CC
= +5.0V, V
IN
= ±2.0V, VSB = -2.0V, VST = +2.0V, f
CLK
= 40MHz, 50% clock duty cycle,
T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
DIGITAL INPUTS
Logic 1 Voltage
Logic 0 Voltage
Maximum Input
Current Low
Maximum Input
Current High
Pulse Width Low (CLK)
Pulse Width High (CLK)
DIGITAL OUTPUTS
Logic 1 Voltage
Logic 0 Voltage
POWER-SUPPLY REQUIREMENTS
V
CC
Voltages
DV
CC
-V
EE
I
CC
Currents
Power Dissipation
Power-Supply Rejection
TEST LEVEL CODES
All electrical characteristics are subject to the following conditions:
All parameters having min/max specifications are guaranteed. The
Test Level column indicates the specific device testing actually per-
formed during production and Quality Assurance inspection. Any
blank section in the data column indicates that the specification is
not tested at the specified condition.
Unless otherwise noted, all tests are pulsed; therefore, Tj = TC = TA.
CONDITIONS
TEST
LEVEL
V
V
MAX1161A
MIN TYP MAX
2.4
4.5
0.8
0
0
10
10
2.4
0.6
4.75
4.75
5.0
118
40
40
1.0
1.0
-4.95 -5.2
5.25
5.25
145
55
57
1.3
300
5
5
20
20
MAX1161B
MIN TYP MAX
2.4
4.0
0.8
0
0
10
10
2.4
0.6
4.75
4.75
5.0
118
40
40
1.0
1.0
5.25
5.25
-5.45
145
55
57
1.3
300
5
5
20
20
UNITS
V
V
µA
µA
ns
ns
V
V
T
A
= +25°C
T
A
= +25°C
IV
IV
IV
IV
IV
IV
IV
IV
IV
VI
VI
VI
VI
V
V
-5.45 -4.95 -5.2
DI
CC
-I
EE
V
CC
= 5V ±0.25V, V
EE
= -5.2V ±0.25V
mA
W
LSB
TEST LEVEL TEST PROCEDURE
I
100% production tested at the specified temperature.
II
100% production tested at TA = +25°C, and sample tested at the specified
III
IV
V
VI
temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characterization data.
Parameter is a typical value for information purposes only.
100% production tested at TA = +25°C. Parameter is guaranteed over specified
temperature range.
______________________________________________________________Pin Description
PIN
1, 13
2
3–10
11
12
14, 28
15
16, 27
NAME
DGND
D0
D1–D8
D9
D10
DV
CC
CLK
V
EE
FUNCTION
Digital Ground
TTL Output (LSB)
TTL Outputs
TTL Output (MSB)
TTL Output Overrange
+5V Supply (digital)
Clock
-5.2V Supply (analog)
PIN
17, 26
18, 25
19
20
21
22
23
24
NAME
AGND
V
CC
VFT
VST
VIN
VRM
VSB
VFB
FUNCTION
Analog Ground
+5V Supply (analog)
Force for Top of Reference Ladder
Sense for Top of Reference Ladder
Analog Input
Middle of Voltage Reference Ladder
Sense for Bottom of Reference Ladder
Force for Bottom of Reference Ladder
4
_______________________________________________________________________________________
10-Bit, 40Msps, TTL-Output ADC
__________________________________________Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION vs.
INPUT FREQUENCY
MAX1161-01
MAX1161
SIGNAL-TO-NOISE vs.
INPUT FREQUENCY
MAX1161-02
SIGNAL-TO-NOISE AND DISTORTION
vs. INPUT FREQUENCY
f
S
= 40Msps
70
60
SINAD (dB)
50
40
30
20
MAX1161-03
80
f
S
= 40Msps
70
60
THD (dB)
50
40
30
20
1
10
INPUT FREQUENCY (MHz)
80
f
S
= 40Msps
70
60
SNR (dB)
50
40
30
20
80
100
1
10
INPUT FREQUENCY (MHz)
100
1
10
INPUT FREQUENCY (MHz)
100
SNR, THD, SINAD vs.
SAMPLE RATE
MAX1161-04
SNR, THD, SINAD vs.
TEMPERATURE
MAX1161-06
SPECTRAL RESPONSE
f
S
= 40Msps
f
IN
= 1MHz
-30
AMPLITUDE (dB)
MAX1161-05
80
f
IN
= 1MHz
70
SNR, THD, SINAD (dB)
SNR
60
50
40
30
20
1
10
SAMPLE RATE (Msps)
65
0
60
SNR, THD, SINAD (dB)
55
SNR
THD
SINAD
-60
THD
SINAD
50
45
-90
f
S
= 40Msps
f
IN
= 1MHz
-120
-25
0
25
50
75
0
2
4
6
8
10
TEMPERATURE (°C)
INPUT FREQUENCY (MHz)
40
100
_______________Detailed Description
The MAX1161 requires few external components to
achieve the stated operation and performance. Figure 2
shows the typical interface requirements when using the
MAX1161 in normal circuit operation. The following sec-
tion provides a description of the pin functions, and out-
lines critical performance criteria to consider for
achieving optimal device performance.
Power Supplies and Grounding
The MAX1161 requires -5.2V and +5V analog supply
voltages. The +5V supply is common to analog V
CC
and
digital DV
CC
. A ferrite bead in series with each supply
line reduces the transient noise injected into the analog
V
CC
. These beads should be connected as close to the
device as possible. The connection between the beads
and the MAX1161 should not be shared with any other
device. Bypass each power-supply pin as close to the
device as possible. Use 0.1µF for V
EE
and V
CC
, and
0.01µF for DV
CC
(chip capacitors are recommended).
The MAX1161 has two grounds: AGND and DGND.
These internal grounds are isolated on the device. Use
ground planes for optimum device performance.
Use DGND for the DV
CC
return path (typically 40mA)
and for the return path for all digital output logic inter-
faces. Separate AGND and DGND from each other,
connecting them together only through a ferrite bead at
the device.
5
_______________________________________________________________________________________
