19-5182; Rev 1; 5/11
TION KIT
EVALUA BLE
AVAILA
1Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
General Description
The MAX3946 is a +3.3V, multirate, low-power laser
diode driver designed for Ethernet and Fibre Channel
transmission systems at data rates up to 11.3Gbps.
This device is optimized to drive a differential transmit-
ter optical subassembly (TOSA) with a 25I flex circuit.
The unique design of the output stage enables use of
unmatched TOSAs, greatly reducing headroom limita-
tions and lowering power consumption.
The device receives differential CML-compatible signals
with on-chip line termination. It can deliver laser modula-
tion current of up to 80mA, at an edge speed of 22ps
(20% to 80%), into a 5I to 25I external differential load.
The device is designed to have a symmetrical output
stage with on-chip back terminations integrated into
its outputs. A high-bandwidth, fully differential signal
path is implemented to minimize deterministic jitter. An
equalization block can be activated to compensate for
the SFP+ connector. The integrated bias circuit provides
programmable laser bias current up to 80mA. Both the
laser bias generator and the laser modulator can be dis-
abled from a single pin.
A 3-wire digital interface reduces the pin count and
permits adjustment of input equalization, pulse-width
adjustment, Tx polarity, Tx deemphasis, modulation cur-
rent, and bias current without the need for external com-
ponents. The MAX3946 is available in a 4mm x 4mm,
24-pin TQFN package.
Features
S
225mW Power Dissipation Enables < 1W SFP+
Modules
S
Up to 100mW Power Consumption Reduction by
Enabling the Use of Unmatched FP/DFB TOSAs
S
Supports SFF-8431 SFP+ MSA and SFF-8472
Digital Diagnostic
S
225mW Power Dissipation at 3.3V (I
MOD
= 40mA,
I
BIAS
= 60mA Assuming 25I TOSA)
S
Single +3.3V Power Supply
S
Up to 11.3Gbps (NRZ) Operation
S
Programmable Modulation Current from 10mA to
100mA (5I Load)
S
Programmable Bias Current from 5mA to 80mA
S
Programmable Input Equalization
S
Programmable Output Deemphasis
S
25I Output Back Termination at TOUT+ and
TOUT-
S
DJ Performance 7ps
P-P
with Mismatched
Differential Load (5I)
S
DJ Performance 5ps
P-P
with Mismatched
Differential Load (25I)
S
DJ Performance 5ps
P-P
with 50I Differential Load
S
Programmable Pulse Width
S
Edge Transition Times of 22ps
S
Bias Current Monitor
S
Integrated Eye Safety Features
S
3-Wire Digital Interface
S
-40°C to +95°C Operation
MAX3946
Applications
4x/8x FC SFP+ Optical Transceivers
10GFC SFP+ Optical Transceivers
10GBASE-LR SFP+ Optical Transceivers
10GBASE-LRM SFP+ Optical Transceivers
OC192-SR XFP/SFP+ SDH/SONET Transceivers
Ordering Information
PART
MAX3946ETG+
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
24 TQFN-EP*
Note:
Parts are guaranteed by design and characterization to
operate over the -40°C to +95°C ambient temperature range
(T
A
) and are tested up to +85°C.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
_______________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
MAX3946
ABSOLUTE MAXIMUM RATINGS
V
CC
, V
CCT
, V
CCD
................................................-0.3V to +4.0V
Current Into TOUT+ and TOUT-.................................... +100mA
Current Into TIN+ and TIN- ............................. -20mA to +20mA
Voltage Range at TIN+, TIN-,
DISABLE, SDA, SCL, CSEL, FAULT,
BMAX, and BMON................................ -0.3V to (V
CC
+ 0.3V)
Voltage Range at BIAS........................................................-0.3V to V
CC
Voltage Range at TOUT+ and TOUT- ....(V
CC
- 1.3V) to (V
CC
+ 1.3V)
Current into BIAS.........................................................................+130mA
Continuous Power Dissipation (T
A
= +70NC)
TQFN (derate 27.8mW/NC above +70NC)..................2222mW
Storage Temperature Range .......................... -55NC to +150NC
Die Attach Temperature .................................................+400NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (q
JA
) ..........36°C/W
Junction-to-Case Thermal Resistance (q
JC
) .................3°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
CC
= +2.85V to +3.63V, T
A
= -40°C to +85°C, and Figure 1. Guaranteed by design and characterization from T
A
= -40°C to +95°C.
Typical values are at V
CC
= +3.3V, I
BIAS
= 60mA, I
MOD
= 40mA, 25I differential output load, and T
A
= +25°C, unless otherwise
noted.) (Note 2)
PARAMETER
POWER SUPPLY
Power-Supply Current
Power-Supply Voltage
Power-Supply Noise
POWER-ON RESET
V
CC
for Enable High
V
CC
for Enable Low
DATA INPUT SPECIFICATION
Input Data Rate
Differential Input Voltage
Differential Input Resistance
Differential Input Return Loss
Common-Mode Input Return
Loss
BIAS GENERATOR
Maximum Bias Current
I
BIASMAX
Current into BIAS pin, DISABLE = low, and
TX_EN = high
80
mA
V
IN
R
IN
SDD11
SCC11
Part powered on, f
P
10GHz
Part powered on, 1GHz
P
f
P
10GHz
TXEQ_EN = high, launch amplitude into
FR4 transmission line
P
5.5in
TXEQ_EN = low
1
0.19
0.15
75
100
12
10
10
11.3
0.7
1.0
125
I
dB
dB
Gbps
V
P-P
2.3
2.55
2.45
2.75
V
V
I
CC
V
CC
DC to 10MHz
10MHz to 20MHz
Excludes output current through the exter-
nal pullup inductors (Note 3)
2.85
68
90
3.63
100
10
mA
V
mV
P-P
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
______________________________________________________________________________________
1Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.85V to +3.63V, T
A
= -40°C to +85°C, and Figure 1. Guaranteed by design and characterization from T
A
= -40°C to +95°C.
Typical values are at V
CC
= +3.3V, I
BIAS
= 60mA, I
MOD
= 40mA, 25I differential output load, and T
A
= +25°C, unless otherwise
noted.) (Note 2)
PARAMETER
Minimum Bias Current
SYMBOL
I
BIASMIN
CONDITIONS
Current into BIAS pin, DISABLE = low, and
TX_EN = high
Current into BIAS pin, DISABLE = high or
TX_EN = low or SET_IBIAS[8:0] = H0x00;
BIAS pin voltage at V
CC
5mA
P
I
BIAS
P
80mA, V
BIAS
= V
CC
- 1.5V
(Notes 2, 4)
V
BIAS
G
BMON
G
BMON
= I
BMON
/I
BIAS
, external resistor to
ground defines voltage
5mA
P
I
BIAS
P
80mA (Notes 2, 4)
0.9
9
0
1.2
1
1.5
10
MIN
TYP
MAX
5
UNITS
mA
MAX3946
Bias-Off Current
I
BIAS-OFF
100
FA
Bias Current DAC Stability
Instantaneous Compliance
Voltage at BIAS
BMON Current Gain
Compliance Voltage at BMON
BMON Current Gain Stability
LASER MODULATOR
TOUT+ and TOUT-
Instantaneous Output
Compliance Voltage
3
2.1
11
1.8
4
%
V
mA/A
V
%
V
CC
-
1.0
Current into external 25I differential termi-
nation, output common-mode
voltage = V
CC
Current into external 50I differential termi-
nation, output common-mode
voltage = V
CC
V
CC
+
1.0
V
80
mA
P-P
60
10
50
mA
P-P
I
100
1.5
22
22
5
5
7
5
10.5
3
30
30
12
12
ps
P-P
ps
FA
%
Maximum Modulation Current
I
MODMAX
Minimum Modulation Current
Differential Output Resistance
Modulation-Off Maximum Current
Modulation Current DAC Stability
Modulation Current Edge Speed
(Note 2)
I
MODMIN
2 x R
OUT
I
MOD-OFF
Current between TOUT+ and TOUT- when
DISABLE = high or TX_EN = low or
SET_IMOD[8:0] = H0x00
10mA
P
I
MOD
P
80mA (Notes 2, 4)
20% to 80%, 20mA
P
I
MOD
P
80mA
t
R,
t
F
20% to 80%, 10mA
P
I
MOD
P
80mA,
TXDE_MD[1:0] = 3d
10mA
P
I
MOD
P
60mA, 11.3Gbps, output
differential load = 50I
10mA
P
I
MOD
P
80mA, 11.3Gbps, output
differential load = 25I
10mA
P
I
MOD
P
80mA, 11.3Gbps, output
differential load = 5I
10mA
P
I
MOD
P
60mA, 10.7Gbps, output
differential load = 50I (K28.5 pattern)
Deterministic Jitter (Notes 2, 5)
DJ
_______________________________________________________________________________________
3
1Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
MAX3946
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.85V to +3.63V, T
A
= -40°C to +85°C, and Figure 1. Guaranteed by design and characterization from T
A
= -40°C to +95°C.
Typical values are at V
CC
= +3.3V, I
BIAS
= 60mA, I
MOD
= 40mA, 25I differential output load, and T
A
= +25°C, unless otherwise
noted.) (Note 2)
PARAMETER
Random Jitter
Differential Output Return Loss
SAFETY FEATURES
Threshold Voltage at BMAX
V
BMAX
FAULT always occurs for V
BMAX
R
1.3V,
FAULT never occurs for V
BMAX
< 1.1V
(Note 2, Figure 1)
FAULT never occurs for V
BIAS
R
0.57V,
FAULT always occurs for V
BIAS
< 0.44V
Warning always occurs for V
BMON
R
V
CC
- 0.5V, warning never occurs for
V
BMON
< V
CC
- 0.7V
Time from rising edge of DISABLE input
signal to I
BIAS
< I
BIAS-OFF
and I
MOD
<
I
MOD-OFF
Time from falling edge of DISABLE to I
BIAS
and I
MOD
at 90% of steady state
Time from power-on or negation of FAULT
using DISABLE
Time from fault to FAULT on, C
FAULT
P
20pF, R
FAULT
= 4.7kI
Time DISABLE must be held high to reset
FAULT
I
BIAS-FS
INL
DNL
SET_IBIAS[8:1] = HxFF
5mA
P
I
BIAS
P
80mA
5mA
P
I
BIAS
P
80mA, guaranteed mono-
tonic at 8-bit resolution SET_IBIAS[8:1]
0.5
1.1
1.2
1.3
V
SYMBOL
RJ
SDD22
CONDITIONS
10mA
P
I
MOD
P
80mA, output differential
load = 25I (Note 2)
Part powered on, f
P
5GHz
Part powered on, f
P
10GHz
MIN
TYP
0.19
8
6
MAX
0.55
UNITS
ps
RMS
dB
Threshold Voltage at BIAS
V
BIAS
0.44
V
CC
-
0.7
0.48
V
CC
-
0.6
0.57
V
CC
-
0.5
V
Threshold Voltage at BMON
SFP TIMING REQUIREMENTS
DISABLE Assert Time
V
BMON
V
t
_OFF
0.05
1
Fs
DISABLE Negate Time
FAULT Reset Time of Power-On
Time
FAULT Reset Time
DISABLE to Reset
BIAS CURRENT DAC
Full-Scale Current
LSB Size
Integral Nonlinearity
Differential Nonlinearity
t
_ON
t
_INIT
t
_FAULT
0.5
50
0.5
5
200
2
Fs
Fs
Fs
Fs
80
100
190
±0.5
±0.5
mA
FA
%FS
LSB
MODULATION CURRENT DAC (25I DIFFERENTIAL LOAD)
Full-Scale Current
LSB Size
Integral Nonlinearity
Differential Nonlinearity
INL
DNL
10mA
P
I
MOD
P
80mA
10mA
P
I
MOD
P
80mA, guaranteed mono-
tonic at 9-bit resolution SET_IMOD[8:0]
I
MOD-FS
SET_IMOD[8:1] = HxFF
80
105
200
Q1
Q0.5
mA
FA
%FS
LSB
4
______________________________________________________________________________________
1Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.85V to +3.63V, T
A
= -40°C to +85°C, and Figure 1. Guaranteed by design and characterization from T
A
= -40°C to +95°C.
Typical values are at V
CC
= +3.3V, I
BIAS
= 60mA, I
MOD
= 40mA, 25I differential output load, and T
A
= +25°C, unless otherwise
noted.) (Note 2)
PARAMETER
CONTROL I/O SPECIFICATIONS
DISABLE Input Current
DISABLE Input High Voltage
DISABLE Input Low Voltage
DISABLE Input Resistance
Input High Voltage
Input Low Voltage
Input Hysteresis
Input Leakage Current
Output High Voltage
Output Low Voltage
SCL Clock Frequency
SCL Pulse-Width High
SCL Pulse-Width Low
SDA Setup Time
SDA Hold Time
SCL Rise to SDA Propagation
Time
CSEL Pulse-Width Low
CSEL Leading Time Before the
First SCL Edge
CSEL Trailing Time After the Last
SCL Edge
SDA, SCL Load
I
IH
I
IL
V
IH
V
IL
R
PULL
V
IH
V
IL
V
HYST
I
IL
, I
IH
V
OH
V
OL
f
SCL
t
CH
t
CL
t
DS
t
DH
t
D
t
CSW
t
L
t
T
C
B
Total bus capacitance on one line with
4.7kI pullup to V
CC
500
500
500
20
0.5
0.5
100
100
5
V
IN
= 0V or V
CC
, internal pullup or
pulldown is 75kI typical
External pullup is (4.7kI to 10kI) to V
CC
External pullup is (4.7kI to 10kI) to V
CC
V
CC
- 0.5
0.4
400
1000
80
150
Internal pullup resistor
Depends on pullup resistance
1.8
0
4.7
2.0
7.5
500
12
800
V
CC
0.8
10
V
CC
0.8
FA
V
V
kI
V
V
mV
FA
V
V
kHz
Fs
Fs
ns
ns
ns
ns
ns
ns
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX3946
3-WIRE DIGITAL I/O SPECIFICATIONS (SDA, SCL, CSEL)
3-WIRE DIGITAL INTERFACE TIMING CHARACTERISTICS (Figure 5)
Note 2:
Guaranteed by design and characterization (T
A
= -40NC to +95NC).
Note 3:
BIAS is connected to 2.0V. TOUT+/TOUT- are connected through pullup inductors to a separate supply that is equal to V
CCT
.
Note 4:
Stability is defined as [(I_measured) - (I_reference)]/(I_reference) over the listed current range, temperature, and V
CC
=
V
CCREF
Q5%.
V
CCREF
= 3.0V to 3.45V. Reference current measured at V
CCREF
, T
A
= +25NC.
Note 5:
Measured with K28.5 data pattern at 10.7Gbps and with a (2
7
- 1 PRBS + 72 zeros + 2
7
- 1 PRBS (inverted) + 72 ones)
pattern at 11.3Gbps.
_______________________________________________________________________________________
5
PCB设计
