Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(2.7V ≤ V
CC
≤ 5.5V, V
CM = V
GND
= 0V, VOUT = VCC
/2, R
L = 10kΩ connected to VCC/2,
SHDN
= VCC,
TA = +25°C,
unless otherwise noted.)
PARAMETER
Input Offset Voltage
Long-Term Offset Drift
Input Bias Current
Input Offset Current
Peak-to-Peak Input Noise
Voltage
Input Voltage-Noise Density
Common-Mode Input
Voltage Range
Common-Mode Rejection Ratio
Power-Supply Rejection Ratio
I
B
I
OS
e
n
P-P
e
n
V
CM
CMRR
PSRR
(Note 2)
(Note 2)
R
S
= 100Ω, 0.01Hz to 10Hz
f = 1kHz
Inferred from CMRR test
-0.1V ≤ V
CM
≤ V
CC
- 1.3V (Note 1)
2.7V ≤ V
CC
≤ 5.5V (Note 1)
0.05V ≤ V
OUT
≤ V
CC
- 0.05V
R
L
= 10kΩ
(Note 1)
0.1V ≤ V
OUT
≤ V
CC
- 0.1V
(Note 1)
R
L
= 10kΩ
Output Voltage Swing
V
OH
/V
OL
R
L
= 1kΩ
Output Short-Circuit Current
Output Leakage Current
Slew Rate
Gain-Bandwidth Product
Minimum Stable Closed-Loop
Gain
GBWP
To either supply
0 ≤ V
OUT
≤ V
CC
, SHDN = GND (Note 2)
V
CC
= 5V, C
L
= 100pF,
V
OUT
= 2V step
R
L
= 10kΩ, C
L
= 100pF,
measured at f = 100kHz
R
L
= 10kΩ, C
L
= 100pF,
phase margin = 60°
MAX4238
MAX4239
MAX4238
MAX4239
MAX4238
MAX4239
R
L
= 1kΩ
V
CC
- V
OH
V
OL
V
CC
- V
OH
V
OL
V
GND
- 0.1
120
120
125
125
140
140
150
dB
145
4
4
35
35
40
0.01
0.35
1.6
1
6.5
1
10
1
10
10
50
50
mA
µA
V/µs
MHz
V/V
mV
SYMBOL
V
OS
(Note 1)
CONDITIONS
MIN
TYP
0.1
50
1
2
1.5
30
V
CC
- 1.3
MAX
2
UNITS
µV
nV/1000hr
pA
pA
µV
P-P
NV/√Hz
V
dB
dB
Large-Signal Voltage Gain
A
VOL
www.maximintegrated.com
Maxim Integrated │
2
MAX4238/MAX4239
Ultra-Low Offset/Drift, Low-Noise,
Precision SOT23 Amplifiers
Electrical Characteristics (continued)
(2.7V ≤ V
CC
≤ 5.5V, V
CM = V
GND
= 0V, VOUT = VCC
/2, R
L = 10kΩ connected to VCC/2,
SHDN
= VCC,
TA = +25°C,
unless otherwise noted.)
PARAMETER
Maximum Closed-Loop Gain
SYMBOL
CONDITIONS
R
L
= 10kΩ, C
L
= 100pF,
phase margin = 60°
MAX4238
MAX4239
0.1% (10 bit)
Settling Time
-1V step
0.025% (12 bit)
0.006% (14 bit)
0.0015% (16 bit)
0.1% (10 bit)
Overload Recovery Time
AV = 10
(Note 4)
0.025% (12 bit)
0.006% (14 bit)
0.0015% (16 bit)
0.1% (10 bit)
Startup Time
AV = 10
0.025% (12 bit)
0.006% (14 bit)
0.0015% (16 bit)
Supply Voltage Range
Supply Current
Shutdown Logic-High
Shutdown Logic-Low
Shutdown Input Current
V
CC
I
CC
V
IH
V
IL
0V ≤ V
SHDN
≤ V
CC
0.1
Inferred by PSRR test
SHDN = V
CC
, no load, V
CC
= 5.5V
SHDN = GND, V
CC
= 5.5V
2.2
0.8
1
2.7
600
0.1
MIN
TYP
1000
6700
0.5
1.0
1.7
2.3
3.3
4.1
4.9
5.7
1.8
2.6
3.4
4.3
5.5
850
1
V
µA
V
V
µA
ms
ms
ms
MAX
UNITS
V/V
www.maximintegrated.com
Maxim Integrated │
3
MAX4238/MAX4239
Ultra-Low Offset/Drift, Low-Noise,
Precision SOT23 Amplifiers
Electrical Characteristics
(2.7V ≤ V
CC
≤ 5.5V, V
CM
= GND = 0V, V
OUT
= V
CC
/2, R
L
= 10kΩ connected to V
CC
/2,
SHDN
= V
CC
,
T
A
= -40°C to +125°C,
unless other-
wise noted.) (Note 5)
PARAMETER
Input Offset Voltage
Input Offset Drift
Common-Mode Input Voltage
Range
Common-Mode Rejection Ratio
Power-Supply Rejection Ratio
SYMBOL
V
OS
TCV
OS
V
CM
(Note 1)
(Note 1)
Inferred from CMRR test
V
GND
- 0.05V ≤
V
CM
≤ V
CC
–
1.4V (Note 1)
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
V
GND
- 0.05
115
90
120
125
dB
95
120
dB
80
20
20
100
100
2
2.7
5.5
900
2
2.2
0.7
µA
V
µA
V
V
mV
CONDITIONS
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
10
V
CC
- 1.4
MIN
TYP
MAX
2.5
3.5
UNITS
µV
nV/°C
V
CMRR
PSRR
dB
dB
2.7V ≤ V
CC
≤ 5.5V (Note 1)
R
L
= 10kΩ,
0.1V ≤ V
OUT
≤ V
CC
- 0.1V
(Note 1)
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
0.1V ≤ V
OUT
≤ V
CC
- 0.1V,
T
A
= -40°C to +85°C
0.2V ≤ V
OUT
≤ V
CC
- 0.2V,
T
A
= -40°C to +125°C
V
CC
- V
OH
V
OL
V
CC
- V
OH
V
OL
Large-Signal Voltage Gain
A
VOL
R
L
= 1kΩ
(Note 1)
R
L
= 10kΩ
Output Voltage Swing
V
OH
/V
OL
R
L
= 1kΩ
Output Leakage Current
Supply Voltage Range
Supply Current
Shutdown Logic High
Shutdown Logic Low
V
CC
I
CC
V
IH
V
IL
0V ≤ V
OUT
≤ V
CC
,
SHDN
= GND
(Note 3)
Inferred by PSRR test
SHDN
= V
CC
, no load, V
CC
= 5.5V
SHDN
= GND, V
CC
= 5.5V
Shutdown Input Current
0V ≤ V
SHDN
≤ V
CC
2
µA
Note 1:
Guaranteed by design. Thermocouple and leakage effects preclude measurement of this parameter during production
testing. Devices are screened during production testing to eliminate defective units.
Note 2:
IN+ and IN- are gates to CMOS transistors with typical input bias current of 1pA. CMOS leakage is so small that it is
impractical to test and guarantee in production. Devices are screened during production testing to eliminate defective units.
Note 3:
Leakage does not include leakage through feedback resistors.
Note 4:
Overload recovery time is the time required for the device to recover from saturation when the output has been
driven to either rail.
Note 5:
Specifications are 100% tested at T
A
= +25°C, unless otherwise noted. Limits over temperature are guaranteed by design.
