Operating Temperature Range .......................... -40NC to +85NC
Maximum Junction Temperature.....................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
Junction-to-Ambient Thermal Resistance (B
JA
) ..............48NC/W
Junction-to-Case Thermal Resistance (B
JC
) .....................7NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
IN
= 12V (for MAX5974A/MAX5974C, bring V
IN
up to 17V for startup), V
CS
= V
CSSC
= V
DITHER/SYNC
= V
FB
= V
FFB
= V
DCLMP
=
V
GND
, V
EN
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R
RT
= 34.8kI, R
DT
= 25kI, C
IN
= 1FF, T
A
= -40NC to +85NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MAX5974A/
MAX5974C
MAX5974B/
MAX5974D
MIN
TYP
MAX
UNITS
UNDERVOLTAGE LOCKOUT/STARTUP (IN)
15.4
8
6.65
17
16
8.4
7
18.5
16.5
V
8.85
7.35
20
V
V
Bootstrap UVLO Wakeup Level
V
INUVR
V
IN
rising
Bootstrap UVLO Shutdown
Level
IN Clamp Voltage
IN Supply Current in
Undervoltage Lockout
IN Supply Current After Startup
ENABLE (EN)
Enable Threshold
Input Current
OSCILLATOR (RT)
RT Bias Voltage
NDRV Switching Frequency
Range
2
V
INUVF
V
IN_CLAMP
V
IN
falling
I
IN
= 2mA (sinking)
V
IN
= +15V (for MAX5974A/
MAX5974C);
V
IN
= +7.5V (for MAX5974B/MAX5974D),
when in bootstrap UVLO
V
IN
= +12V
V
EN
rising
V
EN
falling
I
START
100
150
FA
I
C
V
ENR
V
ENF
I
EN
V
RT
f
SW
1.8
1.17
1.09
1.215
1.14
3
1.26
1.19
1
mA
V
FA
V
1.23
100
600
kHz
Maxim Integrated
MAX5974A/MAX5974B/MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 12V (for MAX5974A/MAX5974C, bring V
IN
up to 17V for startup), V
CS
= V
CSSC
= V
DITHER/SYNC
= V
FB
= V
FFB
= V
DCLMP
=
V
GND
, V
EN
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R
RT
= 34.8kI, R
DT
= 25kI, C
IN
= 1FF, T
A
= -40NC to +85NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NDRV Switching Frequency
Accuracy
Maximum Duty Cycle
SYNCHRONIZATION (SYNC)
Synchronization Logic-High
Input
Synchronization Pulse Width
Synchronization Frequency
Range
Maximum Duty Cycle During
Synchronization
DITHERING RAMP GENERATOR (DITHER)
Charging Current
Discharging Current
Ramp’s High Trip Point
Ramp’s Low Trip Point
SOFT-START AND RESTART (SS)
Charging Current
I
SS-CH
I
SS-D
Discharging Current
I
SS-DH
V
SS
= 2V, normal shutdown
(V
EN
< V
ENF
or V
IN
< V
INUVF
),
V
SS
= 2V, hiccup mode discharge for
t
RSTRT
(Note 3)
9.5
0.65
1.6
10
1.34
2
10.5
2
2.4
FA
mA
FA
V
DITHER
= 0V
V
DITHER
= 2.2V
45
43
50
50
2
0.4
55
57
FA
FA
V
V
f
SYNCIN
1.1 x
f
SW
D
MAX
x f
SYNC
/
f
SW
V
IH-SYNC
2.91
50
2x
f
SW
V
ns
kHz
%
D
MAX
f
SW
= 250kHz
-8
79
80
+8
82
%
%
Discharge Threshold to Disable
Hiccup and Restart
Minimum Restart Time During
Hiccup Mode
Normal Operating High Voltage
Duty-Cycle Control Range
DUTY-CYCLE CLAMP (DCLMP)
DCLMP Input Current
Duty-Cycle Control Range
NDRV DRIVER
Pulldown Impedance
Pullup Impedance
Peak Sink Current
Peak Source Current
Fall Time
Rise Time
Maxim Integrated
V
SS-DTH
t
RSTRT-MIN
V
SS-HI
V
SS-DMAX
I
DCLMP
V
DCLMP-R
D
MAX
(typ) = (V
SS-DMAX
/2.43V)
V
DCLMP
= 0 to 5V
V
DCLMP
= 0.5V
D
MAX
(typ) =
1 - (V
DCLMP/
2.43V)
V
DCLMP
= 1V
V
DCLMP
= 2V
0
-100
73
54
14.7
0.15
1024
5
2
0
75.4
56
16.5
1.9
4.7
1
0.65
+100
77.5
58
18.3
3.4
8.3
V
Clock
Cycles
V
V
nA
%
R
NDRV-N
R
NDRV-P
I
NDRV
(sinking) = 100mA
I
NDRV
(sourcing) = 50mA
I
I
A
A
ns
ns
3
t
NDRV-F
t
NDRV-R
C
NDRV
= 1nF
C
NDRV
= 1nF
14
27
MAX5974A/MAX5974B/MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 12V (for MAX5974A/MAX5974C, bring V
IN
up to 17V for startup), V
CS
= V
CSSC
= V
DITHER/SYNC
= V
FB
= V
FFB
= V
DCLMP
=
V
GND
, V
EN
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R
RT
= 34.8kI, R
DT
= 25kI, C
IN
= 1FF, T
A
= -40NC to +85NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
AUXDRV DRIVER
Pulldown Impedance
Pullup Impedance
Peak Sink Current
Peak Source Current
Fall Time
Rise Time
DEAD-TIME PROGRAMMING (DT)
DT Bias Voltage
NDRV to AUXDRV Delay
(Dead Time)
CURRENT-LIMIT COMPARATOR (CS)
Cycle-by-Cycle Peak
Current-Limit Threshold
Cycle-by-Cycle Reverse
Current-Limit Threshold
Current-Sense Blanking Time
for Reverse Current Limit
Number of Consecutive Peak
Current-Limit Events to Hiccup
Current-Sense Leading-Edge
Blanking Time
Propagation Delay from
Comparator Input to NDRV
Minimum On-Time
SLOPE COMPENSATION (CSSC)
Slope Compensation Current
Ramp Height
PWM COMPARATOR
Comparator Offset Voltage
Current-Sense Gain
Current-Sense Leading-Edge
Blanking Time
Comparator Propagation Delay
V
PWM-OS
A
CS-PWM
t
CSSC-BLANK
t
PWM
V
COMP
- V
CSSC
DV
COMP
/DV
CSSC
(Note 4)
From NDRV rising edge
Change in V
CSSC
= 10mV (including
internal leading-edge blanking)
1.35
3.1
1.7
3.33
115
150
2
3.6
V
V/V
ns
ns
Current ramp’s peak added to CSSC
input per switching cycle
47
52
58
FA
V
CS-PEAK
V
CS-REV
t
CS-BLANK-
REV
SYMBOL
R
AUX-N
R
AUX-P
CONDITIONS
I
AUXDRV
(sinking) = 50mA
I
AUXDRV
(sourcing) = 25mA
MIN
TYP
4.3
10.6
0.5
0.3
MAX
7.7
18.9
UNITS
I
I
A
A
ns
ns
V
t
AUX-F
t
AUX-R
V
DT
C
AUXDRV
= 1nF
C
AUXDRV
= 1nF
24
45
1.215
t
DT
From NDRV falling
to AUXDRV falling
From AUXDRV rising
to NDRV rising
R
DT
= 10kI
R
DT
= 100kI
R
DT
= 10kI
R
DT
= 100kI
310
300
40
350
40
360
420
410
ns
ns
375
Turns AUXDRV off for the remaining
cycle if reverse current limit is exceeded
From AUXDRV falling edge
-118
393
-100
115
8
410
-88
mV
mV
ns
Events
ns
N
HICCUP
t
CS-BLANK
From NDRV rising edge
From CS rising (10mV overdrive) to
NDRV falling (excluding leading-edge
blanking)
100
115
t
PDCS
t
ON-MIN
35
150
200
ns
ns
4
Maxim Integrated
MAX5974A/MAX5974B/MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 12V (for MAX5974A/MAX5974C, bring V
IN
up to 17V for startup), V
CS
= V
CSSC
= V
DITHER/SYNC
= V
FB
= V
FFB
= V
DCLMP
=
V
GND
, V
EN
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R
RT
= 34.8kI, R
DT
= 25kI, C
IN
= 1FF, T
A
= -40NC to +85NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
ERROR AMPLIFIER
V
FB
when I
COMP
= 0,
V
COMP
= 2.5V
MAX5974A/
MAX5974B
MAX5974C/
MAX5974D
MAX5974A/
MAX5974B
MAX5974C/
MAX5974D
MAX5974A/
MAX5974B
MAX5974C/
MAX5974D
Open loop (typical gain
= 1) -3dB frequency
V
FB
= 1V, V
COMP
= 2.5V
V
FB
= 1.75V, V
COMP
= 1V
MAX5974A/
MAX5974B
MAX5974C/
MAX5974D
300
300
1.5
1.202
-250
-500
80
1.8
1.8
2.55
2.66
2
MHz
30
375
375
455
455
FA
FA
3.2
mS
3.5
1.52
1.215
1.54
V
1.227
+250
nA
+100
dB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FB Reference Voltage
V
REF
FB Input Bias Current
I
FB
V
FB
= 0 to 1.75V
Voltage Gain
A
EAMP
Transconductance
g
M
Transconductance Bandwidth
BW
Source Current
Sink Current
FREQUENCY FOLDBACK (FFB)
V
CSAVG
-to-FFB Comparator
Gain
FFB Bias Current
NDRV Switching Frequency
During Foldback
I
FFB
f
SW-FB
10
V
FFB
= 0V, V
CS
= 0V (not in FFB mode)
26
30
f
SW
/2
33
V/V
FA
kHz
Note 2:
All devices are 100% production tested at T
A
= +25NC. Limits over temperature are guaranteed by design.
Note 3:
See the
Output Short-Circuit Protection with Hiccup Mode
section.
Note 4:
The parameter is measured at the trip point of latch with V
