19-2523; Rev 1; 11/05
Microprocessor Supervisory Reset Circuits
with Edge-Triggered, One-Shot Manual Reset
General Description
The MAX6467/MAX6468 microprocessor (µP) supervi-
sory circuits monitor single power-supply voltages from
+1.8V to +5.0V and assert a reset if the supply voltage
drops below its preset threshold. An edge-triggered,
one-shot manual reset function ensures that the µP
enters the reset mode for a fixed timeout period only,
even in the event of a continuously asserted manual
reset. The MAX6467/MAX6468 significantly improve
system reliability compared to traditional manual reset
supervisory circuits.
A variety of factory-trimmed threshold options accommo-
date different supply voltages and tolerances, eliminating
external components. The factory-set thresholds range
from +1.575V to +4.625V to monitor +5.0V, +3.3V, +3.0V,
+2.5V, and +1.8V supplies with various tolerances. Reset
timeout periods of 150ms (min) and 1200ms (min) are
available to accommodate different µP platforms.
A single, active-low
RESET
output asserts when V
CC
drops below its threshold or if the edge-triggered
MR
asserts low.
RESET
remains low for the reset timeout
period after V
CC
rises above its threshold and for a fixed,
one-shot timeout period after a manual reset input falling
edge.
RESET
remains valid as long as V
CC
remains
above +1V. Open-drain (MAX6467) and push-pull
(MAX6468) output options provide additional flexibility in
the system design.
The MAX6467/MAX6468 are offered in the space-saving
4-pin SOT143 package and the ultra-small 4-pin SC70
package and are specified over the automotive (-40°C to
+125°C) temperature range.
Features
♦
Precision Factory-Set Reset Threshold Voltages
for +5.0V, +3.3V, +3.0V, +2.5V, and +1.8V Supplies
♦
Edge-Triggered Manual Reset Input with One-
Shot Pulsed Reset Output
♦
Two Reset Timeout Period Options (150ms or
1200ms min)
♦
Immune to Short Voltage Transients
♦
Low Supply Current (3µA at V
CC
= +1.8V)
♦
RESET
Valid to V
CC
= +1V
♦
Active-Low Open-Drain and Push-Pull
RESET
Output Options
♦
-40°C to +125°C Operating Temperature Range
♦
Small 4-Pin SC70 and SOT143 Packages
♦
No External Components Required
♦
Pin Compatible with MAX811, MAX6315,
MAX6384, and MAX6386
MAX6467/MAX6468
Ordering Information
PART
MAX6467XS_
_D_-T
MAX6467US_ _D_-T
MAX6468XS_
_D_-T
MAX6468US_ _D_-T
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
4 SC70-4
4 SOT143-4
4 SC70-4
4 SOT143-4
Applications
Cell Phones/PDAs
Embedded Control Systems
Industrial Equipment
Automotive Products
Portable/Battery-Powered Equipment
Medical Devices
DSL Modems
MP3 Players
GPS Systems
Digital Cameras
Note:
Insert reset threshold suffix (see Reset Threshold table)
after XS or US. Insert reset timeout delay (see Reset Timeout
Delay table) after D to complete the part number. Sample stock
is generally held on standard versions only (see Standard
Versions table). Standard versions have an order increment
requirement of 2500 pieces. Nonstandard versions have an
order increment requirement of 10,000 pieces. Contact factory
for availability.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “T” with “+T” when ordering.
Pin Configurations
TOP VIEW
GND 1
4
V
CC
MR
RESET 2
MAX6467XS
MAX6468XS
SC70
3
Typical Operating Circuit appears at end of data sheet.
Pin Configurations continued at end of data sheet.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Microprocessor Supervisory Reset Circuits
with Edge-Triggered, One-Shot Manual Reset
MAX6467/MAX6468
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +6.0V
RESET
to GND
Open-Drain........................................................-0.3V to +6.0V
Push-Pull.................................................-0.3V to (V
CC
+ 0.3V)
MR
to GND .................................................-0.3V to (V
CC
+ 0.3V)
Input/Output Current (all pins) ............................................20mA
Continuous Power Dissipation (T
A
= +70°C)
4-Pin SC70 (derate 3.1mW/°C above +70°C) ..............245mW
4-Pin SOT143 (derate 4mW/°C above +70°C).............320mW
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +1.2V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Operating Voltage Range
SYMBOL
V
CC
CONDITIONS
T
A
= 0°C to +125°C
T
A
= -40°C to 0°C
V
CC
= +5.5V, no load
Supply Current
I
CC
V
CC
= +3.6V, no load
V
CC
= +2.5V, no load
V
CC
= +1.8V, no load
V
CC
Reset Threshold
(See the Reset Threshold Table)
V
CC
Reset Delay
V
CC
Reset Timeout Period
MR
Timeout Period
MR
Rising Debounce Period
(Note 2)
T
A
= +25°C
V
TH
T
A
= -40°C to +85°C
T
A
= +85°C to +125°C
t
RD
t
RP
t
MRP
t
DEB
V
IL
MR
Input Voltage
V
IH
V
IL
V
IH
MR
Minimum Input Pulse
MR
Glitch Rejection
MR
to
RESET
Delay
MR
Pullup Resistance
RESET
Output High
(MAX6468 Only)
MR
to V
CC
V
CC
≥
+2.5V, I
SOURCE
= 500µA,
RESET
not
asserted
V
OH
V
CC
≥
+4.5V, I
SOURCE
= 800µA,
RESET
not
asserted
750
0.8 x V
CC
V
0.8 x V
CC
V
CC
falling at 10mV/µs from V
TH
+ 100mV
to V
TH
- 100mV
D3 option
D7 option
D3 and D7 options
D3 and D7 options
V
TH
< +4V
V
TH
≥
+4V
150
1200
150
150
-1.5%
-2.5%
-3%
35
225
1800
225
225
300
2400
300
300
0.3 x V
CC
0.7 x V
CC
0.8
2.4
1
100
200
1500
2250
µs
ns
ns
Ω
V
MIN
1.0
1.2
7
6
4
3
V
TH
TYP
MAX
5.5
5.5
13
11
8
7.5
+1.5%
+2.5%
+3%
µs
ms
ms
ms
V
µA
UNITS
V
2
_______________________________________________________________________________________
Microprocessor Supervisory Reset Circuits
with Edge-Triggered, One-Shot Manual Reset
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +1.2V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
V
CC
≥
+1V, I
SINK
= 80µA,
RESET
asserted
RESET
Output Low
V
OL
V
CC
≥
+2.5V, I
SINK
= 1.2mA,
RESET
asserted
V
CC
≥
+4.5V, I
SINK
= 3.2mA,
RESET
asserted
RESET
Output Leakage Current
(MAX6467 Only)
I
LKG
RESET
not asserted
MIN
TYP
MAX
0.3
0.3
0.3
1
µA
V
UNITS
MAX6467/MAX6468
Note 1:
Specifications over temperature are guaranteed by design. Production testing at T
A
= +25°C only.
Note 2:
The
MR
input ignores falling edges that occur within the
MR
rising debounce period (t
DEB
) after
MR
first rises from low to
high (after a valid
MR
reset assertion). This prevents invalid reset assertion due to switch bounce.
Typical Operating Characteristics
(V
CC
= +5V, MAX6468US29D3 device, T
A
= +25°C, unless otherwise noted.)
V
CC
TO RESET DELAY
vs. TEMPERATURE
V
CC
= V
TH
+ 100mV TO V
TH
- 100mV
MAX6467 toc03
SUPPLY CURRENT vs. TEMPERATURE
MAX6467 toc01
SUPPLY CURRENT vs. SUPPLY VOLTAGE
9
8
SUPPLY CURRENT (µA)
7
6
5
4
3
2
1
0
16
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
MAX6467 toc02
10
9
8
SUPPLY CURRENT (µA)
7
6
5
4
3
2
1
0
V
CC
= +2.5V
V
CC
= +1.8V
V
CC
= +5.5V
V
CC
= +3.6V
10
26
V
CC
TO RESET DELAY (µs)
24
22
20
18
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX6467 toc04
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
MAX6467 toc05
OUTPUT VOLTAGE LOW
vs. SINK CURRENT
600
550
500
450
400
350
300
250
200
150
100
50
0
0
1
2
3
4
5
6
7
8
9
10
I
SINK
(mA)
V
OL
(mV)
V
CC
= 5.0V
MAX6467 toc06
210
209
RESET TIMEOUT PERIOD (ms)
208
207
206
205
204
203
202
201
200
1.010
NORMALIZED RESET THRESHOLD (V)
1.005
1.000
0.995
0.990
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
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3
Microprocessor Supervisory Reset Circuits
with Edge-Triggered, One-Shot Manual Reset
MAX6467/MAX6468
Typical Operating Characteristics (continued)
(V
CC
= +5V, MAX6468US29D3 device, T
A
= +25°C, unless otherwise noted.)
OUTPUT VOLTAGE HIGH
vs. SOURCE CURRENT
MAX6467 toc07
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAXIMUM TRANSIENT DURATION (µs)
MAX6467 toc08
5.5
5.0
4.5
4.0
3.5
V
OH
(V)
3.0
2.5
2.0
1.5
1.0
0.5
0
0
1
2
3
4
5
V
CC
= +5.0V
600
500
400
300
200
100
0
RESET ASSERTS
ABOVE THIS LINE
6
7
8
0
10
20
30
40
50
60
I
SOURCE
(mA)
RESET THRESHOLD OVERDRIVE (mV)
MR TO RESET DELAY
vs. TEMPERATURE
MAX6467 toc09
PROPAGATION DELAY
(WITH 100mV OVERDRIVE)
MAX6467 toc10
120
115
MR TO RESET DELAY (ns)
110
105
100
95
90
85
80
75
70
65
60
3.0V
V
CC
100mV/div
AC-COUPLED
2.8V
3V
RESET 1V/div
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
4µs/div
RESET PULLUP AND PULLDOWN RESPONSE
MAX6467 toc11
RESET TIMEOUT PERIOD
MAX6467 toc12
C
RESET
= 47pF, R
PULLUP
= 100kΩ,
V
PULLUP
= 1.6V
1.675V
V
CC
200mV/div
1.475V
3.3V
V
CC
2V/div
0
1.6V
RESET 500mV/div
3.3V
RESET 2V/div
0
0
MAX6467_S16D3-T
40µs/div
40ms/div
4
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Microprocessor Supervisory Reset Circuits
with Edge-Triggered, One-Shot Manual Reset
Pin Description
PIN
1
NAME
GND
RESET
Ground
Reset Output.
RESET
is an active-low open-drain (MAX6467) or push-pull (MAX6468) output.
RESET
asserts
low when V
CC
drops below the selected threshold and remains low for the V
CC
reset timeout period after
V
CC
rises above the threshold. The
RESET
one-shot asserts low for a fixed
MR
reset timeout period on the
falling edge of the manual reset input. The open-drain output requires an external pullup resistor.
Manual Reset Input. Drive
MR
low to initiate a reset output.
MR
controls an edge-triggered one-shot that
asserts
RESET
low for a fixed
MR
timeout period when
MR
is driven low. Internal timing circuitry ignores
switch close and open bounce to ensure proper one-shot reset timing.
Power-Supply Input. V
CC
provides power to the device and is also a monitored voltage. When V
CC
drops
below the selected threshold,
RESET
asserts low and remains low for the reset timeout period after V
CC
rises
above the threshold. For better noise immunity, bypass V
CC
to GND with a 0.1µF capacitor.
FUNCTION
MAX6467/MAX6468
2
3
MR
4
V
CC
V
CC
V
TH
GND
MR
SWITCH
BOUNCE
SWITCH
BOUNCE
SWITCH
BOUNCE
GND
RESET
t
RP
GND
t
MRP
t
DEB
t
MRP
Figure 1. Timing Diagram
Detailed Description
Reset Output
The MAX6467 provides an active-low open-drain
RESET
output. The MAX6468 provides an active-low
push-pull
RESET
output.
RESET
asserts low if V
CC
drops below the selected threshold or if a falling edge
occurs on
MR. RESET
remains low for the V
CC
reset
timeout period after V
CC
increases above the threshold
voltage or is one-shot pulsed low for the
MR
timeout
period after a falling edge on
MR.
Manual Reset Input
Many µP-based products require manual reset capability,
allowing the operator, a test technician, or external logic
circuitry to initiate a reset. A falling edge on
MR
asserts
RESET
low.
RESET
is one-shot pulsed low for the
MR
timeout period after a falling edge on
MR.
An internal
1.5kΩ pullup resistor to V
CC
allows MR to be left uncon-
nected if not used.
MR
can be driven with TTL or CMOS-
logic levels, or with open-drain/collector outputs. Connect
a normally open momentary pushbutton switch from
MR
to GND to realize a manual reset function. External
debounce circuitry is not required, as the MAX6467/
MAX6468 respond to the first falling edge on
MR
and
ignore subsequent falling edges within the reset timeout
period and during the
MR
debounce period (see Figure
1). After
MR
goes high for 150ms (t
DEB
), the manual reset
one-shot is ready to trigger a reset on the next
MR
falling
edge. Connect a 0.1µF capacitor from
MR
to GND when
using long cables to provide additional noise immunity
(Figure 2).
5
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