首页 > 器件类别 > 模拟混合信号IC > 信号电路

MB15F05LPV

PLL FREQUENCY SYNTHESIZER, 1800 MHz, PBCC16

器件类别:模拟混合信号IC    信号电路   

厂商名称:FUJITSU(富士通)

厂商官网:http://edevice.fujitsu.com/fmd/en/index.html

下载文档
器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
FUJITSU(富士通)
零件包装代码
BCC
包装说明
VBCC, LCC16,.13X.18,25
针数
16
Reach Compliance Code
compli
模拟集成电路 - 其他类型
PLL FREQUENCY SYNTHESIZER
JESD-30 代码
R-PBCC-B16
长度
4.55 mm
功能数量
1
端子数量
16
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
VBCC
封装等效代码
LCC16,.13X.18,25
封装形状
RECTANGULAR
封装形式
CHIP CARRIER, VERY THIN PROFILE
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3 V
认证状态
Not Qualified
座面最大高度
0.8 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3 V
表面贴装
YES
技术
BICMOS
温度等级
INDUSTRIAL
端子形式
BUTT
端子节距
0.635 mm
端子位置
BOTTOM
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
4.2 mm
Base Number Matches
1
文档预览
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-21351-1E
ASSP
Dual Serial Input
PLL Frequency Synthesizer
MB15F05L
s
DESCRIPTION
The Fujitsu MB15F05L is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 1800MHz and
a 233.15MHz prescalers. A 64/65 or a 128/129 for the 1800MHz prescaler, and a 16/17 for the 233.15MHz
prescaler can be selected that enables pulse swallow operation.
The latest BiCMOS process technology is used, resuItantly a supply current is limited as low as 5.0mA typ. at
a supply voltage of 3.0V.
Furthermore, a super charger circuit is included to provide a fast tuning as well as low noise performance. As
a result of this, MB15F05L is ideally suitable for digital mobile communications, such as PHS(Personal Handy
Phone System).
s
FEATURES
High frequency operationRF synthesizer: 1800MHz max. / IF synthesizer: 233.15MHz fixed
Low power supply voltage: V
CC
= 2.7 to 3.6V
Very Low power supply current : I
CC
= 5.0 mA typ. (Vcc = 3V)
Power saving function : Supply current at power saving mode Typ.0.1
µ
A (Vcc=3V), Max.10
µ
A (I
PS1
=I
PS2
)
Dual modulus prescaler : 1800MHz prescaler(64/65,128/129)
Serial input 14–bit programmable reference divider: R = 5 to 16,383
Serial input 18–bit programmable divider consisting of:
- Binary 7–bit swallow counter: 0 to 127
- Binary 11–bit programmable counter: 5 to 2,047
• On–chip high performance charge pump circuit and phase comparator, achieving high–speed lock–up and
low phase noise
• On–chip phase control for phase comparator
• Wide operating temperature: Ta = -40 to 85˚C
s
PACKAGES
16-pin, Plastic SSOP
16-pin,plastic BCC
(FPT-16P-M05)
(LCC-16P-M03)
MB15F05L
s
PIN ASSIGNMENTS
SSOP-16pin
GND
RF
OSCin
GND
IF
fin
IF
Vcc
IF
LD/fout
PS
IF
Do
IF
1
2
3
4
16
15
14
Clock
Data
LE
fin
RF
Vcc
RF
Xfin
RF
PS
RF
Do
RF
TOP 13
VIEW
5
12
6
7
8
11
10
9
(FPT-16P-M05)
BCC-16pin
OSCin
GND
IF
fin
IF
V
CCIF
LD/fout
PS
IF
1
2
3
GND
RF
Clock
16
15
14
13
12
TOP VIEW
4
5
6
7
8
11
10
9
V
CCRF
Xin
RF
PS
RF
Data
LE
fin
RF
D
OIF
D
ORF
(LCC-16P-M03)
2
MB15F05L
s
PIN DESCRIPTION
Pin No.
SSOP16
1
2
3
4
5
BCC16
16
1
2
3
4
Pin name I/O
GND
RF
OSCin
GND
IF
fin
IF
Vcc
IF
I
I
Ground for RF–PLL section.
The programmable reference divider input. TCXO should be connected
with a AC coupling capacitor.
Ground for the IF-PLL section.
Prescaler input pin for the IF-PLL.
The connection with VCO should be AC coupling.
Power supply voltage input pin for the IF-PLL section.
Lock detect signal output (LD) / phase comparator monitoring output
(fout)
The output signal is selected by a LDS bit in a serial data.
LDS bit = ”H” ; outputs fout signal
LDS bit = ”L” ; outputs LD signal
Power saving mode control for the IF-PLL section. This pin must be set
at ”L” Power-ON. (Open is prohibited.)
PS
IF
= ”H” ; Normal mode
PS
IF
= ”L” ; Power saving mode
Charge pump output for the IF-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
Charge pump output for the RF-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
Power saving mode control for the RF-PLL section. This pin must be set
at ”L” Power-ON. (Open is prohibited.)
PS
RF
= ”H” ; Normal mode
PS
RF
= ”L” ; Power saving mode
Prescaler complimentary input for the RF-PLL section.
This pin should be grounded via a capacitor.
Power supply voltage input pin for the RF-PLL section, the shift register
and the oscillator input buffer. When power is OFF, latched data of RF-
PLL is cancelled.
Prescaler input pin for the RF-PLL.
The connection with VCO should be AC coupling.
Load enable signal input (with the schmitt trigger circuit.)
When LE is ”H”, data in the shift register is transferred to the
corresponding
latch according to the control bit in a serial data.
Serial data input (with the schmitt trigger circuit.)
A data is transferred to the corresponding latch (IF-ref counter, IF-prog.
counter, RF-ref. counter, RF-prog. counter) according to the control bit
in a serial data.
Clock input for the 23-bit shift register (with the schmitt trigger circuit.)
One bit data is shifted into the shift register on a rising edge of the
clock.
Descriptions
6
5
LD/fout
O
7
6
PS
IF
I
8
9
7
8
Do
IF
Do
RF
O
O
10
9
PS
RF
I
11
12
13
10
11
12
Xfin
RF
Vcc
RF
fin
RF
I
I
14
13
LE
I
15
14
Data
I
16
15
Clock
I
3
MB15F05L
s
BLOCK DIAGRAM
Vcc
IF
5
GND
IF
3
7
PS
IF
Intermittent
mode
control
(IF–PLL)
Swallow counter Programmable
counter
(IF–PLL)
(IF–PLL)
N = 291
A=7
fp
IF
Phase
comp.
(IF–PLL)
Charge Super
pump charger
(IF–PLL)
8 Do
IF
Prescaler
fin
IF
4
(IF–PLL)
16/17
14bit latch
Reference
counter(IF–PLL)
(R=384)
fr
IF
Lock
Det.
(IF–PLL)
LD
IF
2
OSCin
AND
OR
Binary 14-bit pro-
grammable ref.
counter
(RF–PLL)
14-bit latch
fr
RF
Selector
LD
fr
IF
fr
RF
fp
IF
fp
RF
6 LD/fout
T1
T2
LD
RF
2-bit latch
fin
RF
13
Xfin
RF
11
Prescaler
(RF–PLL)
Lock
Det.
(RF–PLL)
64/65,
128/129
LDS SW
RF
FC
RF
Intermittent
mode
control
(RF–PLL)
Binary 7-bit
swallow counter
(RF–PLL)
Binary 11-bit
programmable
counter
(RF–PLL)
11-bit latch
Phase
comp.
fp
RF
PS
RF
10
Charge Super
pump charger
(RF–PLL)
9 Do
RF
3-bit latch
7-bit latch
LE 14
Schmitt
circuit
Latch selector
Data 15
Clock 16
Schmitt
circuit
Schmitt
circuit
C C
N N
1 2
23-bit shift
register
12
1
GND
RF
Note: SSOP-16pin
V
CC
RF
4
MB15F05L
s
ABSOLUTE MAXIMUM RATINGS
Parameter
Power supply voltage
Input voltage
Output voltage
Output Current
Storage temperature
Symbol
V
CC
V
I
V
O
Io
Ido
T
STG
Rating
–0.5 to +4.0
–0.5 to V
CC
+0.5
–0.5 to V
CC
+0.5
-10 to +10
-25to+25
–55 to +125
Unit
V
V
V
mA
mA
°
C
Except Do
Do output
Remark
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s
RECOMMENDED OPERATING CONDITIONS
Parameter
Power supply voltage
Input voltage
Operating temperature
Symbol
V
CC
V
i
Ta
Value
Min
2.7
GND
–40
Typ
3.0
Max
3.6
V
CC
+85
Unit
V
V
°
C
Note
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All
the device’s electrical characteristics are warranted when operated within these ranges.
Always yse semiconductor devices within the recommended operating conditions. Operation outside
these ranges may adversely affect reliability and could result in device failure.
No warranty is made with repect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representative beforehand.
Handling Precautions
• This device should be transported and stored in anti-static containers.
• This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are
properly grounded. Cover workerbenches with grounded conductive mats.
• Always turn the power supply off before inserting or removing the device from its socket.
• Protect leads with a conductive sheet when handling or transporting PC boards with devices.
5
查看更多>
参数对比
与MB15F05LPV相近的元器件有:MB15F05LPFV、MB15F05L。描述及对比如下:
型号 MB15F05LPV MB15F05LPFV MB15F05L
描述 PLL FREQUENCY SYNTHESIZER, 1800 MHz, PBCC16 PLL FREQUENCY SYNTHESIZER, 1800 MHz, PDSO16 PLL FREQUENCY SYNTHESIZER, 1800 MHz, PDSO16
是否Rohs认证 不符合 不符合 -
厂商名称 FUJITSU(富士通) FUJITSU(富士通) -
零件包装代码 BCC SOIC -
包装说明 VBCC, LCC16,.13X.18,25 LSSOP, TSSOP16,.25 -
针数 16 16 -
Reach Compliance Code compli compli -
模拟集成电路 - 其他类型 PLL FREQUENCY SYNTHESIZER PLL FREQUENCY SYNTHESIZER -
JESD-30 代码 R-PBCC-B16 R-PDSO-G16 -
长度 4.55 mm 5 mm -
功能数量 1 1 -
端子数量 16 16 -
最高工作温度 85 °C 85 °C -
最低工作温度 -40 °C -40 °C -
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY -
封装代码 VBCC LSSOP -
封装等效代码 LCC16,.13X.18,25 TSSOP16,.25 -
封装形状 RECTANGULAR RECTANGULAR -
封装形式 CHIP CARRIER, VERY THIN PROFILE SMALL OUTLINE, LOW PROFILE, SHRINK PITCH -
峰值回流温度(摄氏度) NOT SPECIFIED NOT SPECIFIED -
电源 3 V 3 V -
认证状态 Not Qualified Not Qualified -
座面最大高度 0.8 mm 1.45 mm -
最大供电电压 (Vsup) 3.6 V 3.6 V -
最小供电电压 (Vsup) 2.7 V 2.7 V -
标称供电电压 (Vsup) 3 V 3 V -
表面贴装 YES YES -
技术 BICMOS BICMOS -
温度等级 INDUSTRIAL INDUSTRIAL -
端子形式 BUTT GULL WING -
端子节距 0.635 mm 0.65 mm -
端子位置 BOTTOM DUAL -
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED -
宽度 4.2 mm 4.4 mm -
热门器件
热门资源推荐
器件捷径:
E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ
需要登录后才可以下载。
登录取消