Spansion
®
Analog and Microcontroller
Products
The following document contains information on Spansion analog and microcontroller products. Although the
document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion
will continue to offer these products to new and existing customers.
Continuity of Specifications
There is no change to this document as a result of offering the device as a Spansion product. Any changes that
have been made are the result of normal document improvements and are noted in the document revision
summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a
revision summary.
Continuity of Ordering Part Numbers
Spansion continues to support existing part numbers beginning with “MB”. To order these products, please use
only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local sales office for additional information about Spansion memory, analog, and
microcontroller products and solutions.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-16608-1E
32-bit Microcontroller
CMOS
FR60 MB91460G Series
MB91F469GA/F469GB
■
DESCRIPTION
MB91460G series is a line of general-purpose 32-bit RISC microcontrollers designed for embedded control
applications which require high-speed real-time processing, such as consumer devices and on-board vehicle
systems. This series uses the FR60 CPU, which is compatible with the FR family* of CPUs.
This series contains the LIN-USART and CAN controllers.
* : FR, the abbreviation of FUJITSU RISC controller, is a line of products of Fujitsu Microelectronics Limited.
■
FEATURES
1. FR60 CPU core
•
•
•
•
•
•
•
32-bit RISC, load/store architecture, five-stage pipeline
16-bit fixed-length instructions (basic instructions)
Instruction execution speed: 1 instruction per cycle
Instructions including memory-to-memory transfer, bit manipulation, and barrel shift instructions: Instructions
suitable for embedded applications
Function entry/exit instructions and register data multi-load store instructions : Instructions supporting C
language
Register interlock function: Facilitating assembly-language coding
Built-in multiplier with instruction-level support
Signed 32-bit multiplication : 5 cycles
Signed 16-bit multiplication : 3 cycles
Interrupts (save PC/PS) : 6 cycles (16 priority levels)
(Continued)
•
For the information for microcontroller supports, see the following web site.
This web site includes the
"Customer Design Review Supplement"
which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.5
MB91460G Series
(Continued)
• Harvard architecture enabling program access and data access to be performed simultaneously
• Instructions compatible with the FR family
2. Internal peripheral resources
• General-purpose ports : Maximum 205 ports
• DMAC (DMA Controller)
Maximum of 5 channels able to operate simultaneously (including 2 external channels)
3 transfer sources (external pin/internal peripheral/software)
Activation source can be selected using software
Addressing mode specifies full 32-bit addresses (increment/decrement/fixed)
Transfer mode (demand transfer/burst transfer/step transfer/block transfer)
Fly-by transfer support (between external I/O and memory)
Transfer data size selectable from 8/16/32-bit
Multi-byte transfer enabled (by software)
DMAC descriptor in I/O areas (200
H
to 240
H
, 1000
H
to 1024
H
)
• A/D converter (successive approximation type)
10-bit resolution: 32 channels
Conversion time: minimum 1
μs
• External interrupt inputs : 16 channels
12 channels shared with CAN RX, I
2
C SDA or I2C SCL pins
• Bit search module (for REALOS)
Function to search from the MSB (most significant bit) for the position of the first “0”, “1”, or changed bit in a word
• LIN-USART (full duplex double buffer): 8 channels, 4 channels with FIFO
Clock synchronous/asynchronous selectable
Sync-break detection
Internal dedicated baud rate generator
• I
2
C bus interface (supports 400 kbps): 4 channel
Master/slave transmission and reception
Arbitration function, clock synchronization function
• CAN controller (C-CAN): 6 channels
Maximum transfer speed: 1 Mbps
128 transmission/reception message buffers
• Sound generator : 1 channelTone frequency : PWM frequency divide-by-two (reload value + 1)
• Alarm comparator : 2 channelsMonitor external voltageGenerate an interrupt in case of voltage lower/higher
than the defined thresholds (reference voltage)
• 16-bit PPG timer : 16 channels
• 16-bit PFM timer : 1 channel
• 16-bit reload timer: 8 channels
• 16-bit free-run timer: 8 channels (1 channel each for ICU and OCU)
• Input capture: 8 channels (operates in conjunction with the free-run timer)
• Output compare: 8 channels (operates in conjunction with the free-run timer)
• Up/Down counter: 4 channels (4*8-bit or 2*16-bit)
• Watchdog timer
• Real-time clock
• Low-power consumption modes : Sleep/stop mode function
• Low voltage detection circuit
(Continued)
2
DS07-16608-1E
MB91460G Series
(Continued)
• Clock supervisor
Monitors the sub-clock (32 kHz) and the main clock (4 MHz) , and switches to a recovery clock (CR oscillator,
etc.) when the oscillations stop.
• Clock modulator
• Clock monitor
• Sub-clock calibration
Corrects the real-time clock timer when operating with the 32 kHz or CR oscillator
• Main oscillator stabilization timer
Generates an interrupt in sub-clock mode after the stabilization wait time has elapsed on the 23-bit stabilization
wait time counter
• Sub-oscillator stabilization timer
Generates an interrupt in main clock mode after the stabilization wait time has elapsed on the 15-bit stabilization
wait time counter
3. Package and technology
•
•
•
•
Package : 320-pin plastic BGA (BGA-320)
CMOS 0.18
μm
technology
Power supply range 3 V to 5 V (1.8 V internal logic provided by a step-down voltage converter)
Operating temperature range: between - 40°C and + 125°C
DS07-16608-1E
3
MB91460G Series
■
PRODUCT LINEUP
Feature
Max. core frequency (CLKB)
Max. resource frequency (CLKP)
Max. external bus freq. (CLKT)
Max. CAN frequency (CLKCAN)
Max. FlexRay frequency (SCLK)
Technology
0.35μm
0.18μm
MB91V460A
(Evaluation device)
80MHz
40MHz
40MHz
20MHz
MB91F469Gx
100MHz at 1.9V main regulator output voltage *
1
88MHz at 1.8V main regulator output voltage
50MHz
50MHz
50MHz
Flash memory
Satellite Flash memory
Flash Protection
Flash CRC calculation
Emulation SRAM 32bit read data
no
no
no
2112 KByte
no
yes
yes
D-RAM
ID-RAM
Flash-cache (F-cache)
External bus cache (I-cache)
Boot-ROM / BI-ROM
MMU/MPU
64 KByte
64 KByte
16 KByte
4 KBytes
4 KByte fixed
MPU (16 ch)
*2
64 KByte
32 KByte
16 KBytes
4 KBytes
4 KByte
MPU (8 ch)
*2
DMA
MAC (μDSP)
5 ch
no
5 ch
no
Watchdog timer
Watchdog timer (RC osc. based)
Bit Search
RTC
Free Running Timer
ICU
OCU
Reload Timer
PPG 16-bit
PFM 16-bit
Sound Generator
Up/Down Counter (8/16-bit)
SMC
LCD controller (40x4)
yes
yes (disengageable)
yes
1 ch
8 ch
8 ch
8 ch
8 ch
16 ch
1 ch
1 ch
4 ch (8-bit) / 2 ch (16-bit)
6 ch
1ch
yes
yes
yes
1 ch
8 ch
8 ch
8 ch
8 ch
16 ch
1 ch
1 ch
4 ch (8-bit) / 2 ch (16-bit)
-
-
C_CAN
LIN-USART
I2C (400k)
6 ch (128msg)
4 ch + 4 ch FIFO + 8 ch
4 ch
6 ch (128msg)
4 ch + 4 ch FIFO
4 ch
FR external bus
yes (32bit addr, 32bit data, 8 chip selects)
yes (28bit addr, 32bit data, 8 chip selects)
4
DS07-16608-1E
