MB95F332H/F332K/F333H/F333K/F334H/F334K
F
2
MC-8FX MB95330H Series 8-bit Micro-
controllers
MB95330H is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers
of this series contain a variety of peripheral resources.
Features
F
2
MC-8FX CPU core
Instruction set optimized for controllers
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I
2
C
1 channel
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Built-in wake-up function
Multiplication and division instructions
16-bit arithmetic operations
Bit test branch instructions
Bit manipulation instructions, etc.
Selectable main clock source
Main OSC clock (up to 16.25 MHz, maximum machine clock
frequency: 8.125 MHz)
External clock (up to 32.5 MHz, maximum machine clock fre-
quency: 16.25 MHz)
Main CR clock (1/8/10/12.5 MHz ±2%, maximum machine
clock frequency: 12.5 MHz)
Selectable subclock source
Sub-OSC clock (32.768 kHz)
External clock (32.768 kHz)
Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 200 kHz)
8/16-bit composite timer
2 channels
8/16-bit PPG
3 channels
16-bit PPG
1 channel (can work independently or together
with the multi-pulse generator)
16-bit reload timer
1 channel (can work independently or
together with the multi-pulse generator)
Time-base timer
1 channel
Watch prescaler
1 channel
Full duplex double buffer
Capable of clock-asynchronous (UART) serial data transfer
and clock-synchronous (SIO) serial data transfer
Multi-pulse generator (MPG) (for DC
motor control)
1 channel
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16-bit reload timer
1 channel
16-bit PPG timer
1 channel
Waveform sequencer (including a 16-bit timer equipped with a
buffer and a compare clear function)
Full duplex double buffer
Capable of clock-synchronous serial data transfer and
clock-asynchronous serial data transfer
Interrupt by edge detection (rising edge, falling edge, and both
edges can be selected)
Can be used to wake up the device from different low power
consumption (standby) modes
8-bit and 10-bit resolution can be chosen.
Stop mode
Sleep mode
Watch mode
Time-base timer mode
MB95F332H/F333H/F334H (maximum no. of I/O ports: 28)
Clock
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LIN-UART
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External interrupt
10 channels
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Timer
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8/10-bit A/D converter
8 channels
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Low power consumption (standby) modes
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UART/SIO
1 channel
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I/O port
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General-purpose I/O ports (N-ch open drain): 3
General-purpose I/O ports (CMOS I/O): 25
General-purpose I/O ports (N-ch open drain): 4
General-purpose I/O ports (CMOS I/O): 25
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MB95F332K/F333K/F334K (maximum no. of I/O ports: 29)
Cypress Semiconductor Corporation
Document Number: 002-07522 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised April 04, 2016
MB95330H Series
On-chip debug
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Clock supervisor counter
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1-wire serial control
Serial writing supported (asynchronous mode)
Built-in hardware watchdog timer
Built-in low-voltage detector
Built-in clock supervisor counter function
CMOS input level / hysteresis input level
The erase/write operation and the read operation can be
executed in different banks (upper bank/lower bank) simulta-
neously.
Protects the content of the Flash memory
Programmable port input voltage level
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Hardware/software watchdog timer
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Dual operation Flash memory
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Low-voltage detection reset circuit
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Flash memory security function
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Document Number: 002-07522 Rev. *A
Page 2 of 66
MB95330H Series
Contents
Product Line-up ................................................................ 4
Packages and Corresponding Products ........................ 6
Differences Among Products and Notes On
Product Selection ............................................................. 7
Pin Assignment ................................................................ 8
Pin Description ............................................................... 10
I/O Circuit Type ............................................................... 14
Notes On Device Handling ............................................. 16
Pin Connection ............................................................... 16
Block Diagram ................................................................ 18
CPU Core ......................................................................... 18
I/O Map ............................................................................. 20
Interrupt Source Table ................................................... 26
Electrical Characteristics ............................................... 27
Absolute Maximum Ratings ....................................... 27
Recommended Operating Conditions ....................... 28
DC Characteristics .................................................... 30
AC Characteristics ..................................................... 33
Clock Timing .............................................................. 33
Source Clock/Machine Clock .................................... 35
External Reset ........................................................... 37
Power-on Reset ......................................................... 37
Peripheral Input Timing ............................................. 38
LIN-UART Timing ...................................................... 39
Low-voltage Detection ............................................... 44
I2C Timing ................................................................. 46
UART/SIO, Serial I/O Timing ..................................... 49
MPG Input Timing ..................................................... 50
A/D Converter ............................................................ 50
A/D Converter Electrical Characteristics ................... 50
Notes on Using the A/D Converter ............................ 51
Definitions of A/D Converter Terms ........................... 52
Flash Memory Write/Erase Characteristics ............... 55
Sample Characteristics .................................................. 56
Mask Options .................................................................. 61
Ordering Information ...................................................... 62
Package Dimension .........................................................63
Document Number: 002-07522 Rev. *A
Page 3 of 66
MB95330H Series
1. Product Line-up
Part number
MB95F332H
Parameter
Type
Clock supervisor
counter
Program ROM ca-
pacity
RAM capacity
Low-voltage
detection reset
Reset input
It supervises the main clock oscillation.
8 Kbyte
240 bytes
12 Kbyte
496 bytes
No
Dedicated
Number of basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Interrupt processing time
I/O ports (Max): 28
CMOS I/O: 25
N-ch open drain: 3
20 Kbyte
1008 bytes
8 Kbyte
240 bytes
12 Kbyte
496 bytes
Yes
Selected by software
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8 and 16 bits
: 61.5 ns (with machine clock = 16.25 MHz)
: 0.6 µs (with machine clock = 16.25 MHz)
I/O ports (Max): 29
CMOS I/O: 25
N-ch open drain: 4
20 Kbyte
1008 bytes
Flash memory product
MB95F333H
MB95F334H
MB95F332K
MB95F333K
MB95F334K
CPU functions
General-purpose
I/O
Time-base timer
Interrupt cycle: 0.256 ms to 8.3 s (when external clock = 4 MHz)
Reset generation cycle
Hardware/software
Main oscillation clock at 10 MHz: 105 ms (Min)
watchdog timer
The sub-CR clock can be used as the source clock of the hardware watchdog timer.
Wild register
LIN-UART
8/10-bit A/D con-
verter
It can be used to replace three bytes of data.
A wide range of communication speeds can be selected by a dedicated reload timer.
Clock-synchronous serial data transfer and clock-asynchronous serial data transfer is enabled.
The LIN function can be used as a LIN master or a LIN slave.
8 channels
8-bit resolution and 10-bit resolution can be chosen.
2 channels
8/16-bit
composite timer
The timer can be configured as an "8-bit timer x 2 channels" or a "16-bit timer x 1 channel".
It has built-in timer function, PWC function, PWM function and input capture function.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
It can output square wave.
10 channels
Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
It can be used to wake up the device from different standby modes.
1-wire serial control
It supports serial writing. (asynchronous mode)
External
interrupt
On-chip debug
(Continued)
Document Number: 002-07522 Rev. *A
Page 4 of 66
MB95330H Series
(Continued)
Part number
MB95F332H
Parameter
1 channel
Data transfer with UART/SIO is enabled.
It has a full duplex double buffer, variable data length (5/6/7/8 bits), a built-in baud rate generator and an error de-
tection function.
It uses the NRZ type transfer format.
LSB-first data transfer and MSB-first data transfer are available to use.
Clock-asynchronous (UART) serial data transfer and clock-synchronous (SIO) serial data transfer is enabled.
1 channel
I
2
C
Master/slave transmission and receiving
It has a bus error function, an arbitration function, a transmission direction detection function and a wake-up function.
It also has functions of generating and detecting repeated START conditions.
3 channels
8/16-bit PPG
Each channel of PPG can be used as two 8-bit PPG channels or a single 16-bit PPG channel.
The counter operating clock can be selected from eight clock sources.
PWM mode and one-shot mode are available to use.
The counter operating clock can be selected from eight clock sources.
It supports external trigger start.
It can work independently or together with the multi-pulse generator.
MB95F333H
MB95F334H
MB95F332K
MB95F333K
MB95F334K
UART/SIO
16-bit PPG
Two clock modes and two counter operating modes are available to use.
It can output square waveform.
16-bit reload timer Count clock: it can be selected from internal clocks (seven types) and external clocks.
Two counter operating modes: reload mode and one-shot mode
It can work independently or together with the multi-pulse generator.
16-bit PPG timer: 1 channel
Multi-pulse genera-
16-bit reload timer operations: toggle output, one-shot output
tor (for DC motor
Event counter: 1 channel
control)
Waveform sequencer (including a 16-bit timer equipped with a buffer and a compare clear function)
Watch prescaler
Eight different time intervals can be selected.
It supports automatic programming, Embedded Algorithm, and write/erase/erase-suspend/erase-resume com-
mands.
It has a flag indicating the completion of the operation of Embedded Algorithm.
Number of write/erase cycles: 100000
Data retention time: 20 years
Flash security feature for protecting the content of the Flash memory
Sleep mode, stop mode, watch mode, time-base timer mode
FPT-32P-M30
DIP-32P-M06
LCC-32P-M19
Flash memory
Standby mode
Package
Document Number: 002-07522 Rev. *A
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