MB96300
PRELIMININARY SPECIFICATION
FME-MB96300 rev 19
16-bit Proprietary Microcontroller
CMOS
F
2
MC-16FX MB96300 Series
MB96300 series is based on Fujitsu’s advanced 16FX architecture (16-bit with instruction pipeline for RISC-like
performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy
migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation
include significantly improved performance - even at the same operation frequency, reduced power consumption
and faster start-up time.
For highest processing speed at optimized power consumption an internal PLL can be selected to supply the
CPU with up to 56MHz operation frequency from an external 4MHz resonator. The result is a minimum instruction
cycle time of 17.8ns going together with excellent EMI behavior. An on-chip clock modulation circuit significantly
reduces emission peaks in the frequency spectrum. The emitted power is minimised by the on-chip voltage
regulator that reduces the internal CPU voltage. A flexible clock tree allows to select suitable operation frequencies
for peripheral resources independent of the CPU speed.
s
PACKAGES
• 48-pin
FME/EMDC- 2007-02-12
PR
EL
IM
IN
AR
48-pin Plastic LQFP
(FPT-48P-M26)
s
DESCRIPTION
MB96300_shortspec.fm
Y
MB96300 Series
• 64-pin
64-pin Plastic LQFP
Preliminary Specification
64-pin Plastic LQFP
(FPT-64P-M23)
• 80-pin
• 100-pin
PR
EL
100-pin Plastic QFP
(FPT-100P-M22)
2
FME/EMDC- 2007-02-12
IM
IN
A
80-pin Plastic LQFP
(FPT-80P-M21)
100-pin Plastic LQFP
(FPT 100P M05)
RY
(FPT-100P-M20)
(FPT-64P-M24)
MB96300_shortspec.fm
Preliminary Specification
• 120-pin
120-pin Plastic LQFP
MB96300
(FPT 100P M05)
(FPT-120P-M21)
FME/EMDC- 2007-02-12
PR
EL
MB96300_shortspec.fm
IM
IN
AR
3
Y
MB96300 Series
s
FEATURES
Preliminary Specification
• 16-bit core CPU, up to 56 MHz internal, 17.8 ns instruction cycle time
• 0.18µm CMOS Process Technology
• Optimized instruction set for controller applications (bit, byte, word and long-word data types; 23 different
addressing modes; barrel shift; variety of pointers)
• 8-byte instruction execution queue
• Signed multiply (16 bit
×
16 bit) and divide (32 bit/16 bit) instructions available
• Internal voltage regulator supports reduced internal MCU voltage, offering low EMI and low power
consumption figures
• Code Security Feature
• Up to 5 FULL-CAN interfaces; conforming to Version 2.0 Part A and Part B, ISO16845 certified
• Powerful interrupt functions (8 progr. priority levels; up to 16 external interrupts)
• Fast Interrupt processing
• Three independent clock timers (23-bit RC clock timer, 23-bit Main clock timer, 17-bit Sub clock timer)
• Watchdog Timer
• Up to 2 channels I2C with 400 kbit/s
• Up to 6 channels16-bit reload timer
• Up to 10 channels full duplex USARTs (SCI/LIN)
• Up to 40 channels analog inputs for A/D Converter (Resolution 10 bits or 8 bits)
• Up to 12 channels ICU (Input capture unit) 16 bit
• Up to 4 channels 16-bit free running timer
• Up to 12 channels OCU (Output compare unit) 16 bit
• Up to 20 channels
×
16-bit Programmable Pulse Generator
• Up to 6 channels Stepper Motor Controller with integrated high current output drivers
• LCD controller with up to 4 COM
×
72 SEG, internal or external voltage generation
• Memory Patch Function, can also be used to implement embedded debug support
• Low Power Consumption - 13 operating modes : (different Run, Sleep, Timer modes, Stop mode)
• 3-32 MHz external clock, on-chip PLL with programmable multiplication factor 1 ... 16
• 32 kHz Subsystem Clock
• 100kHz/2MHz internal RC clock
• External bus interface with up to 6 Chip select signals, 8bit or 16bit data, 24bit address, multiplexed or non-
multiplexed, programmable timing
• Up to 2 channels Alarm comparators
• Programmable input levels (Automotive / CMOS-Schmitt trigger / TTL) for all ports
• Programmable Pull-up resistors for all ports
• Programmable output driving strength for EMI optimization
• Package : 48-pin / 64-pin / 80-pin /100-pin / 120-pin plastic QFP and LQFP
4
FME/EMDC- 2007-02-12
MB96300_shortspec.fm
PR
EL
IM
IN
A
• Up to 16 channels DMA - Automatic transfer function independent of CPU, can be assigned freely to
resources
RY
Preliminary Specification
• Controller Area Network (CAN) - License of Robert Bosch GmbH
MB96300
FME/EMDC- 2007-02-12
PR
EL
MB96300_shortspec.fm
IM
IN
AR
5
Y
