MC10EL12, MC100EL12
5.0 V ECL Low Impedance
Driver
The MC10EL/100EL12 is a low impedance drive buffer. With two
pairs of OR/NOR outputs the device is ideally suited for high drive
applications such as memory addressing. The device is a function
equivalent to the E112 device with higher performance capabilities.
With propagation delays significantly faster than the E112, the EL12 is
ideally suited for those applications which require the ultimate in
AC performance.
The 100 Series contains temperature compensation.
Features
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MARKING
DIAGRAMS*
8
1
SOIC−8
D SUFFIX
CASE 751
8
HEL12
ALYW
G
1
1
8
KEL12
ALYW
G
•
290 ps Propagation Delay
•
Dual Outputs for 25
W
Drive Applications
•
ESD Protection: Human Body Model; > 1.0 kV
•
•
•
•
•
•
•
•
Machine Model; > 100 V
PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 V with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V with V
EE
=
−4.2
V to
−5.7
V
Internal Input Pulldown Resistors
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 44 devices
Pb−Free Packages are Available
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HL12
ALYWG
G
8
KL12
ALYWG
G
1
1
4R M
G
G
DFN8
MN SUFFIX
CASE 506AA
1
4
1
Q
a
1
8
V
CC
Q
b
2
7
D
0
H
K
4R
2F
A
MC10
MC100
MC10
MC100
= Assembly Location
L
Y
W
M
G
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
Q
a
3
6
D
1
*For additional marking information, refer to
Application Note AND8002/D.
Q
b
4
5
V
EE
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Figure 1. Logic Diagram and Pinout Assignment
©
Semiconductor Components Industries, LLC, 2008
August, 2008
−
Rev. 7
1
Publication Order Number:
MC10EL12/D
2F M
G
G
4
MC10EL12, MC100EL12
Table 1. PIN DESCRIPTION
PIN
D0, D1
Qa,Qa; Qb, Qb
V
CC
V
EE
EP
FUNCTION
ECL Data Inputs
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad must be connected
to a sufficient thermal conduit. Electrically connect to
the most negative supply (GND) or leave unconnected,
floating open.
Table 2. MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
I
I
out
T
A
T
stg
q
JA
q
JC
q
JA
q
JC
q
JA
T
sol
q
JC
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Pb
Pb−Free
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 1)
DFN8
SOIC−8
SOIC−8
SOIC−8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
V
CC
V
I
V
EE
Condition 2
Rating
8
−8
6
−6
50
100
−40
to +85
−65
to +150
190
130
41 to 44
185
140
41 to 44
±
5%
129
84
265
265
35 to 40
Unit
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
°C/W
Thermal Resistance (Junction−to−Case)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. JEDEC standard multilayer board
−
2S2P (2 signal, 2 power)
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2
MC10EL12, MC100EL12
Table 3. 10EL SERIES PECL DC CHARACTERISTICS
V
CC
= 5.0 V; V
EE
= 0.0 V (Note 2)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 5)
Output LOW Voltage (Note 3)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
3920
3050
3770
3050
Min
Typ
14
4010
3200
Max
17
4110
3350
4110
3500
150
0.5
4020
3050
3870
3050
Min
25°C
Typ
14
4105
3210
Max
17
4190
3370
4190
3520
150
0.3
4090
3050
3940
3050
Min
85°C
Typ
14
4185
3227
Max
17
4280
3405
4280
3555
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.06 V /
−0.5
V.
3. Outputs are terminated through a 50
W
resistor to V
CC
−
2 volts.
Table 4. 10EL SERIES NECL DC CHARACTERISTICS
V
CC
= 0.0 V; V
EE
=
−5.0
V (Note 4)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 5)
Output LOW Voltage (Note 5)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
−1080
−1950
−1230
−1950
Min
Typ
14
−990
−1800
Max
17
−890
−1650
−890
−1500
150
0.5
−980
−1950
−1130
−1950
Min
25°C
Typ
14
−895
−1790
Max
17
−810
−1630
−810
−1480
150
0.3
−910
−1950
−1060
−1950
Min
85°C
Typ
14
−815
−1773
Max
17
−720
−1595
−720
−1445
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.06 V /
−0.5
V.
5. Outputs are terminated through a 50
W
resistor to V
CC
−
2 volts.
Table 5. 100EL SERIES PECL DC CHARACTERISTICS
V
CC
= 5.0 V; V
EE
= 0.0 V (Note 6)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 7)
Output LOW Voltage (Note 7)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
3915
3170
3835
3190
Min
Typ
14
3995
3305
Max
17
4120
3445
4120
3525
150
0.5
3975
3190
3835
3190
Min
25°C
Typ
14
4045
3295
Max
17
4120
3380
4120
3525
150
0.5
3975
3190
3835
3190
Min
85°C
Typ
16
4050
3295
Max
20
4120
3380
4120
3525
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.8 V /
−0.5
V.
7. Outputs are terminated through a 50
W
resistor to V
CC
−
2 volts.
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3
MC10EL12, MC100EL12
Table 6. 100EL SERIES NECL DC CHARACTERISTICS
V
CC
= 0.0 V; V
EE
=
−5.0
V (Note 8)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 9)
Output LOW Voltage (Note 9)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
−1085
−1830
−1165
−1810
Min
Typ
14
−1005
−1695
Max
17
−880
−1555
−880
−1475
150
0.5
−1025
−1810
−1165
−1810
Min
25°C
Typ
14
−955
−1705
Max
17
−880
−1620
−880
−1475
150
0.5
−1025
−1810
−1165
−1810
Min
85°C
Typ
16
−955
−1705
Max
20
−880
−1620
−880
−1475
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.8 V /
−0.5
V.
9. Outputs are terminated through a 50
W
resistor to V
CC
−
2 volts.
Table 7. AC CHARACTERISTICS
V
CC
= 5.0 V; V
EE
= 0.0 V or V
CC
= 0.0 V; V
EE
=
−5.0
V (Note 9)
−40°C
Symbol
f
max
t
PLH
t
PHL
t
JITTER
t
r
t
f
Characteristic
Maximum Toggle Frequency
Propagation Delay to
Output
Cycle−to−Cycle Jitter
Output Rise/Fall Times Q
(20%
−
80%)
150
120
Min
Typ
TBD
280
TBD
350
550
150
500
180
Max
Min
25°C
Typ
TBD
290
TBD
350
550
150
450
210
Max
Min
85°C
Typ
TBD
320
TBD
350
550
480
Max
Unit
GHz
ps
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10. 10 Series: V
EE
can vary +0.06 V /
−0.5
V.
100 Series: V
EE
can vary +0.8 V /
−0.5
V.
Q
Driver
Device
Q
Z
o
= 50
W
D
Receiver
Device
Z
o
= 50
W
50
W
50
W
D
V
TT
V
TT
= V
CC
−
3.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
−
Termination of ECL Logic Devices.)
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4
MC10EL12, MC100EL12
ORDERING INFORMATION
Device
MC10EL12D
MC10EL12DG
MC10EL12DR2
MC10EL12DR2G
MC10EL12DT
MC10EL12DTG
MC10EL12DTR2
MC10EL12DTR2G
MC10EL12MNR4
MC10EL12MNR4G
MC100EL12D
MC100EL12DG
MC100EL12DR2
MC100EL12DR2G
MC100EL12DT
MC100EL12DTG
MC100EL12DTR2
MC100EL12DTR2G
MC100EL12MNR4
MC100EL12MNR4G
Package
SOIC−8
SOIC−8
(Pb−Free)
SOIC−8
SOIC−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
DFN8
DFN8
(Pb−Free)
SOIC−8
SOIC−8
(Pb−Free)
SOIC−8
SOIC−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
TSSOP−8
TSSOP−8
(Pb−Free)
DFN8
DFN8
(Pb−Free)
Shipping
†
98 Units / Rail
98 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
100 Units / Rail
100 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
1000 / Tape & Reel
1000 / Tape & Reel
98 Units / Rail
98 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
100 Units / Rail
100 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
1000 / Tape & Reel
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
ECL Clock Distribution Techniques
−
Designing with PECL (ECL at +5.0 V)
−
ECLinPSt I/O SPiCE Modeling Kit
−
Metastability and the ECLinPS Family
−
Interfacing Between LVDS and ECL
−
The ECL Translator Guide
−
Odd Number Counters Design
−
Marking and Date Codes
−
Termination of ECL Logic Devices
−
Interfacing with ECLinPS
−
AC Characteristics of ECL Devices
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5
