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MC100ELT21DG

Translator PECL to TTL 1-CH Unidirectional 8-Pin SOIC N Rail

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器件参数
参数名称
属性值
欧盟限制某些有害物质的使用
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8542.39.00.01
Logic Family
ECL
Logic Function
Translator
Translation
PECL to TTL
Channel Type
Unidirectional
Number of Channels
1
Maximum Frequency (MHz)
100(Typ)
Maximum Propagation Delay Time @ Maximum CL (ns)
5.5@4.75V to 5.25V
Absolute Propagation Delay Time (ns)
5.5
Minimum High Level Input Voltage (V)
3.835
Process Technology
ECL
Maximum Low Level Output Current (mA)
24
Maximum High Level Output Current (mA)
-3
Minimum Operating Supply Voltage (V)
4.75
Typical Operating Supply Voltage (V)
5
Maximum Operating Supply Voltage (V)
5.25
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
85
系列
Packaging
Rail
Maximum Supply Current (mA)
32
Pin Count
8
Supplier Package
SOIC N
Standard Package Name
SOP
Mounting
Surface Mount
Package Height
1.5(Max)
Package Length
5(Max)
Package Width
4(Max)
PCB changed
8
Lead Shape
Gull-wing
参考设计
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5 V Differential PECL to
TTL Translator
MC10ELT21, MC100ELT21
Description
The MC10ELT/100ELT21 is a differential PECL to TTL translator.
Because PECL (Positive ECL) levels are used, only +5 V and ground
are required. The small outline 8-lead package and the single gate of
the ELT21 makes it ideal for those applications where space,
performance and low power are at a premium.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01
mF
capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
The 100 Series contains temperature compensation.
Features
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE
751−07
MARKING DIAGRAMS*
8
HLT21
ALYW
G
8
KLT21
ALYW
G
3.5 ns Typical Propagation Delay
24 mA TTL Output
Flow Through Pinouts
Operating Range: V
CC
= 4.75 V to 5.25 V with GND = 0 V
Q Output Will Default LOW with Inputs Left Open or < 1.3 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1
1
H
K
A
L
Y
W
G
= MC10
= MC100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note
AND8002/D.
ORDERING INFORMATION
Device
MC10ELT21DG
MC10ELT21DR2G
MC100ELT21DG
Package
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
Shipping
98 Units / Tube
2500 /
Tape & Reel
98 Units / Tube
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifica-
tions Brochure,
BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
April, 2021
Rev. 14
1
Publication Order Number:
MC10ELT21/D
MC10ELT21, MC100ELT21
NC
1
TTL
PECL
D0
3
6
NC
8
V
CC
Table 1. PIN DESCRIPTION
Pin
Q0
D0, DO
V
BB
V
CC
GND
NC
TTL Outputs
PECL Differential Outputs
Reference Voltage Output
Positive Supply
Ground
No Connect
Function
D0
2
7 Q0
V
BB
4
5
GND
Figure 1. 8−Lead Pinout and Logic Diagram
(Top View)
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note
AND8003/D.
Value
50 kW
N/A
> 2 kV
Pb−Free Pkg
Level 1
UL 94 V−0 @ 0.125 in
81 Devices
Table 3. MAXIMUM RATINGS
Symbol
V
CC
V
IN
I
BB
TA
T
stg
q
JA
q
JC
T
sol
Parameter
PECL Power Supply
PECL Input Voltage
V
BB
Sink/Source
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
Pb−Free
0 lfpm
500 lfpm
Standard Board
<2 to 3 sec @ 260°C
SOIC−8
SOIC−8
SOIC−8
Condition 1
GND = 0 V
GND = 0 V
V
I
V
CC
Condition 2
Rating
7
0 to 6
±0.5
−40
to +85
−65
to +150
190
130
41 to 44
265
Unit
V
V
mA
°C
°C
°C/W
°C/W
°C/W
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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2
MC10ELT21, MC100ELT21
Table 4. 10ELT SERIES PECL INPUT DC CHARACTERISTICS
V
CC
= 5.0 V; GND = 0.0 V (Note 2)
−40°C
Symbol
V
IH
V
IL
V
BB
V
IHCMR
I
IH
I
IL
Characteristic
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 3)
Input HIGH Current
Input LOW Current
0.5
Min
3770
3050
3.57
2.2
Typ
Max
4110
3500
3.7
5.0
255
0.5
Min
3870
3050
3.65
2.2
25°C
Typ
Max
4190
3520
3.75
5.0
175
0.3
Min
3930
3050
3.69
2.2
85°C
Typ
Max
4265
3555
3.81
5.0
175
Unit
mV
mV
V
V
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
2. Output parameters vary 1:1 with V
CC
. V
CC
can vary
±
0.25 V.
3. V
IHCMR
min varies 1:1 with GND, V
IHCMR
max varies 1:1 with V
CC
.
Table 5. 100ELT SERIES PECL INPUT DC CHARACTERISTICS
V
CC
= 5.0 V; GND = 0.0 V (Note 4)
−40°C
Symbol
V
IH
V
IL
V
BB
V
IHCMR
I
IH
I
IL
Characteristic
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
Input HIGH Voltage Common Mode
Range (Differential Configuration) (Note 5)
Input HIGH Current
Input LOW Current
0.5
Min
3835
3190
3.62
2.2
Typ
Max
4120
3525
3.74
5.0
255
0.5
Min
3835
3190
3.62
2.2
25°C
Typ
Max
4120
3525
3.74
5.0
175
0.5
Min
3835
3190
3.62
2.2
85°C
Typ
Max
4120
3525
3.745
5.0
175
Unit
mV
mV
V
V
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
4. Input parameters vary 1:1 with V
CC
. V
CC
can vary
±
0.25 V.
5. V
IHCMR
min varies 1:1 with GND, V
IHCMR
max varies 1:1 with V
CC
.
Table 6. TTL OUTPUT DC CHARACTERISTICS
V
CC
= 4.75 V to 5.25 V; T
A
=
−40°C
to 85°C)
Symbol
V
OH
V
OL
I
CCH
I
CCL
I
OS
Characteristic
Output HIGH Voltage
Output LOW Voltage
Power Supply Current
Power Supply Current
Output Short Circuit Current
−150
Condition
I
OH
=
−3.0
mA
I
OL
= 24 mA
20
22
Min
2.4
Typ
Max
(Note 6)
0.5
29
32
−60
Unit
V
V
mA
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
6. Maximum level is V
CC
0.7 by design.
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3
MC10ELT21, MC100ELT21
AC CHARACTERISTICS
V
CC
= 4.75 V to 5.25 V; GND = 0.0 V (Note 7)
−40°C
Symbol
f
max
t
JITTER
t
PLH
t
PHL
V
PP
t
r
/t
f
Characteristic
Maximum Toggle Frequency
Random Clock Jitter (RMS)
Propagation Delay @ 1.5 V
Propagation Delay @ 1.5 V
Input Swing (Note 8)
Output Rise/Fall Time
(10−90%)
2.0
2.0
200
5.5
5.5
1000
2.0
2.0
200
750
Min
Typ
Max
Min
25°C
Typ
100
35
5.5
5.5
1000
2.0
2.0
200
5.5
5.5
1000
Max
Min
85°C
Typ
Max
Unit
MHz
ps
ns
ns
mV
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
7. R
L
= 500
W
to GND and C
L
= 20 pF to GND. Refer to Figure 2.
8. V
PP
(min) is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of
40.
APPLICATION
TTL RECEIVER
CHARACTERISTIC TEST
*C
L
includes
fixture
capacitance
C
L
*
R
L
AC TEST LOAD
GND
Figure 2. TTL Output Loading Used for Device Evaluation
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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参数对比
与MC100ELT21DG相近的元器件有:CSC12A03750JDO3、PRA100I4-2K34DBB31。描述及对比如下:
型号 MC100ELT21DG CSC12A03750JDO3 PRA100I4-2K34DBB31
描述 Translator PECL to TTL 1-CH Unidirectional 8-Pin SOIC N Rail Array/Network Resistor, Isolated, Metal Glaze/thick Film, 0.3W, 75ohm, 100V, 5% +/-Tol, -100,100ppm/Cel, Array/Network Resistor, Isolated, Thin Film, 0.1W, 2340ohm, 50V, 0.5% +/-Tol, -10,10ppm/Cel, 1606,
是否Rohs认证 - 不符合 不符合
Objectid - 700394261 981838964
Reach Compliance Code - compliant compliant
ECCN代码 - EAR99 EAR99
YTEOL - 7.25 4.88
构造 - Conformal Coating Chip
JESD-609代码 - e0 e0
网络类型 - Isolated Isolated
端子数量 - 12 8
最高工作温度 - 125 °C 155 °C
最低工作温度 - -55 °C -55 °C
封装高度 - 4.95 mm 0.4 mm
封装长度 - 30.23 mm 4 mm
封装形式 - SIP SMT
封装宽度 - 2.49 mm 1.6 mm
包装方法 - Tube Box
额定功率耗散 (P) - 0.3 W 0.1 W
电阻 - 75 Ω 2340 Ω
电阻器类型 - ARRAY/NETWORK RESISTOR ARRAY/NETWORK RESISTOR
系列 - CSC PRA (CNW)
技术 - METAL GLAZE/THICK FILM THIN FILM
温度系数 - 100 ppm/°C 10 ppm/°C
端子面层 - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - with Nickel (Ni) barrier
容差 - 5% 0.5%
工作电压 - 100 V 50 V
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