MC10EL35, MC100EL35
5 V ECL JK Flip‐Flop
Description
The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data
enters the master portion of the flip-flop when the clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition
of the clock. The reset pin is asynchronous and is activated with a logic
HIGH.
The 100 Series contains temperature compensation.
8
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8
1
1
TSSOP−8
DT SUFFIX
CASE 948R−02
Features
•
525 ps Propagation Delay
•
2.2G Hz Toggle Frequency
•
ESD Protection:
♦
SOIC−8 NB
D SUFFIX
CASE 751−05
•
•
•
•
•
•
•
•
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
> 1 kV Human Body Model
♦
> 100 V Machine Model
PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V with
V
EE
=
−4.2
V to
−5.7
V
Internal Input Pulldown Resistors on J, K, CLK, and R
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity:
♦
Level 1 for SOIC−8 NB
♦
Level 3 for TSSOP−8
♦
For Additional Information, see Application Note
AND8003/D
Flammability Rating: UL−94 V−0 @ 0.125 in,
Oxygen Index 28 to 34
Transistor Count = 81 Devices
MARKING DIAGRAMS*
8
HEL35
ALYW
G
1
8
KEL35
ALYW
G
1
SOIC−8
1
1
8
KL35
ALYWG
G
8
HL35
ALYWG
G
TSSOP−8
H = MC10
K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note
AND8002/D.
ORDERING INFORMATION
Device
MC10EL35DG
MC10EL35DTG
MC100EL35DG
MC100EL35DTG
Package
SOIC−8 NB
(Pb-Free)
TSSOP−8
(Pb-Free)
SOIC−8 NB
(Pb-Free)
TSSOP−8
(Pb-Free)
Shipping
98 Units / Tube
100 Unit / Tube
98 Units / tube
100 Units / Tube
©
Semiconductor Components Industries, LLC, 2016
July, 2016
−
Rev. 8
1
Publication Order Number:
MC10EL35/D
MC10EL35, MC100EL35
Table 1. PIN DESCRIPTION
J
1
J
8
V
CC
J
PIN
ECL Input
ECL Input
ECL Reset
ECL Clock Input
ECL Data Outputs
Positive Supply
Negative Supply
FUNCTION
K
2
K
7
Q
K
R
CLK
CLK
3
R
6
Q
Q, Q
V
CC
V
EE
R
4
5
V
EE
Table 1. TRUTH TABLE
Figure 1. Logic Diagram and Pinout Assignment
J*
L
L
H
H
X
K*
L
H
L
H
X
R*
L
L
L
L
H
CLK
Z
Z
Z
Z
X
Qn+1
Qn
L
H
Qn
L
Table 2. MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
I
I
out
T
A
T
stg
q
JA
q
JC
q
JA
q
JC
T
sol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction-to-Ambient)
Thermal Resistance (Junction-to-Case)
Thermal Resistance (Junction-to-Ambient)
Thermal Resistance (Junction-to-Case)
Wave Solder (Pb-Free)
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
< 2 to 3 sec @ 260°C
SOIC−8 NB
SOIC−8 NB
SOIC−8 NB
TSSOP−8
TSSOP−8
TSSOP−8
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
≤
V
CC
V
I
≥
V
EE
Condition 2
Rating
8
−8
6
−6
50
100
−40
to +85
−65
to +150
190
130
41 to 44
185
140
41 to 44
±5%
265
Unit
V
V
V
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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MC10EL35, MC100EL35
Table 3. 10EL SERIES PECL DC CHARACTERISTICS
(V
CC
= 5.0 V; V
EE
= 0 V (Note 1))
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
3920
3050
3770
3050
Min
Typ
27
4010
3200
Max
32
4110
3350
4110
3500
150
0.5
4020
3050
3870
3050
Min
25°C
Typ
27
4105
3210
Max
32
4190
3370
4190
3520
150
0.3
4090
3050
3940
3050
Min
85°C
Typ
27
4185
3227
Max
32
4280
3405
4280
3555
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.25 V /
−0.5
V.
2. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.
Table 4. 10EL SERIES NECL DC CHARACTERISTICS
(V
CC
= 0 V; V
EE
=
−5.0
V (Note 1))
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
−1080
−1950
−1230
−1950
Min
Typ
27
−990
−1800
Max
32
−890
−1650
−890
−1500
150
0.5
−980
−1950
−1130
−1950
Min
25°C
Typ
27
−895
−1790
Max
32
−810
−1630
−810
−1480
150
0.3
−910
−1950
−1060
−1950
Min
85°C
Typ
27
−815
−1773
Max
32
−720
−1595
−720
−1445
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.25 V /
−0.5
V.
2. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.
Table 5. 100EL SERIES PECL DC CHARACTERISTICS
(V
CC
= 5.0 V; V
EE
= 0 V (Note 1))
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Input HIGH Voltage (Single-Ended)
Input LOW Voltage (Single-Ended)
Input HIGH Current
Input LOW Current
0.5
3915
3170
3835
3190
Min
Typ
27
3995
3305
Max
32
4120
3445
4120
3525
150
0.5
3975
3190
3835
3190
Min
25°C
Typ
27
4045
3295
Max
32
4120
3380
4120
3525
150
0.5
3975
3190
3835
3190
Min
85°C
Typ
32
4050
3295
Max
37
4120
3380
4120
3525
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.8 V /
−0.5
V.
2. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.
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MC10EL35, MC100EL35
Table 6. 100EL SERIES NECL DC CHARACTERISTICS
(V
CC
= 0 V; V
EE
=
−5.0
V (Note 1))
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Input HIGH Voltage (Single-Ended)
Input LOW Voltage (Single-Ended)
Input HIGH Current
Input LOW Current
0.5
−1085
−1830
−1165
−1810
Min
Typ
27
−1005
−1695
Max
32
−880
−1555
−880
−1475
150
0.5
−1025
−1810
−1165
−1810
Min
25°C
Typ
27
−955
−1705
Max
32
−880
−1620
−880
−1475
150
0.5
−1025
−1810
−1165
−1810
Min
85°C
Typ
32
−955
−1705
Max
37
−880
−1620
−880
−1475
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.8 V /
−0.5
V.
2. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.-
Table 7. AC CHARACTERISTICS
(V
CC
= 5.0 V; V
EE
= 0 V or V
CC
= 0 V; V
EE
=
−5.0
V (Note 1))
−40°C
Symbol
fmax
t
PLH
t
PHL
t
S
t
H
t
RR
t
PW
t
JITTER
t
r
t
f
Characteristic
Maximum Toggle Frequency
Propagation Delay
to Output
Setup Time
Hold Time
Reset Recovery
Minimum Pulse Width
CLK, Reset
Cycle-to-Cycle Jitter
Output Rise/Fall Times Q (20%−80%)
100
CLK
MR
J, K
J, K
Min
1.4
290
225
150
250
400
400
1.0
225
350
100
Typ
2.0
515
450
0
100
200
740
675
Max
Min
1.8
350
275
150
250
400
400
1.0
225
350
100
25°C
Typ
2.2
525
450
0
100
200
700
625
Max
Min
1.8
395
350
150
250
400
400
1.0
225
350
85°C
Typ
2.2
570
525
0
100
200
745
700
Max
Unit
GHz
ps
ps
ps
ps
ps
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. 10 Series: V
EE
can vary +0.25 V /
−0.5
V.
100 Series: V
EE
can vary +0.8 V /
−0.5
V.
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MC10EL35, MC100EL35
Q
Driver
Device
Q
Z
o
= 50
W
50
W
50
W
D
Z
o
= 50
W
D
Receiver
Device
V
TT
V
TT
= V
CC
−
3.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note
AND8020/D
−
Termination of ECL Logic Devices)
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
ECL Clock Distribution Techniques
−
Designing with PECL (ECL at +5.0 V)
−
ECLinPSt I/O SPiCE Modeling Kit
−
Metastability and the ECLinPS Family
−
Interfacing Between LVDS and ECL
−
The ECL Translator Guide
−
Odd Number Counters Design
−
Marking and Date Codes
−
Termination of ECL Logic Devices
−
Interfacing with ECLinPS
−
AC Characteristics of ECL Devices
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