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MC10XS3412DHFKR2

Power Switch ICs - Power Distribution Eswitch Gen3 1012

器件类别:模拟混合信号IC    驱动程序和接口   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
Reach Compliance Code
not_compliant
ECCN代码
EAR99
接口集成电路类型
BUFFER OR INVERTER BASED PERIPHERAL DRIVER
湿度敏感等级
3
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Freescale Semiconductor
Technical Data
Document Number: MC10XS3412
Rev. 12.0, 2/2013
Quad High Side Switch
(Dual 10 mOhmDual 12 mOhm)
The 10XS3412 is one in a family of devices designed for low-voltage
automotive lighting applications. Its four low R
DS(ON)
MOSFETs (dual
10 mOhm/dual 12 mOhm) can control four separate 55/28 W bulbs,
and/or Xenon modules, and/or LEDs.
Programming, control and diagnostics are accomplished using a
16-bit SPI interface. Its output with selectable slew rate improves
electromagnetic compatibility (EMC) behavior. Additionally, each
output has its own parallel input or SPI control for pulse-width
modulation (PWM) control. The 10XS3412 allows the user to program
via the SPI the fault current trip levels and duration of acceptable lamp
inrush. The device has Fail-safe mode to provide functionality of the
outputs in case of MCU damage.
Features
• Four protected 10 m and 12 m high side switches (at 25 °C)
• Operating voltage range of 6.0 to 20 V with sleep current
< 5.0
A,
extended mode from 4.0 to 28 V
• 8.0 MHz 16-bit 3.3 V and 5.0 V SPI control and status reporting
with daisy chain capability
• PWM module using external clock or calibratable internal
oscillator with programmable outputs delay management
• Smart overcurrent shutdown, severe short-circuit,
overtemperature protection with time limited autoretry, and Fail-
safe mode in case of MCU damage
• Output OFF or ON open-load detection compliant to bulbs or
LEDs and short to battery detection
• Analog current feedback with selectable ratio and board
temperature feedback
10XS3412
HIGH SIDE SWITCH
FK SUFFIX (PB-FREE)
98ARL10596D
24-PIN PQFN
FK SUFFIX (PB-FREE)
98ASA00426D
24-PIN PQFN
ORDERING INFORMATION
Device
(for Tape and Reel,
add an R2 suffix)
MC10XS3412CHFK
MC10XS3412JHFK
Temperature
Range (T
A
)
Package
- 40 to 125°C
24 PQFN
V
DD
V
DD
V
PWR
V
DD
V
PWR
10XS3412
VDD
I/O
SCLK
CS
SI
I/O
MCU
SO
I/O
I/O
I/O
I/O
A/D
GND
WAKE
FS
SCLK
CS
SO
RST
SI
IN0
IN1
IN2
IN3
CSNS
FSI
GND
VPWR
HS0
LOAD
HS1
LOAD
HS2
LOAD
HS3
LOAD
Figure 1. 10XS3412 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2008 - 2013. All rights reserved.
DEVICE VARIATIONS
DEVICE VARIATIONS
Table 1. Device Variations
Characteristic
Wake Input Clamp Voltage, I
CL(WAKE)
< 2.5 mA
10XS3412CHFK
10XS3412JHFK
Fault Detection Blanking Time
10XS3412CHFK
10XS3412JHFK
Output Shutdown Delay Time
10XS3412CHFK
10XS3412JHFK
Peak Package Reflow Temperature During Reflow,
(1)
,
(2)
10XS3412CHFK
10XS3412JHFK
Notes
1. Pin soldering temperature limit is for 40 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
2. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics.
T
PPRT
Note 2
t
DETECT
-
-
7.0
7.0
30
20
°C
Symbol
V
CL(WAKE)
19
20
25
27
32
35
s
-
-
5.0
5.0
20
10
s
Min
Typ
Max
Unit
V
t
FAULT
10XS3412
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VDD
VPWR
I
UP
CS
SCLK
I
DWN
SO
SI
RST
WAKE
FS
IN0
IN1
IN2
IN3
V
DD
Failure
Detection
Internal
Regulator
V
REG
POR
Over/Undervoltage
Protections
Charge
Pump
VPWR
Voltage Clamp
Selectable Slew Rate
Gate Driver
Selectable Overcurrent
Detection
Severe Short-circuit
Detection
Short to VPWR
Detection
Overtemperature
Detection
Open-load
Detections
HS0
Logic
HS0
R
DWN
I
DWN
R
DWN
HS1
Calibratable
Oscillator
V
REG
PWM
Module
HS1
HS2
HS2
HS3
FSI
Programmable
Watchdog
Temperature
Feedback
Overtemperature
Prewarning
Analog MUX
V
DD
HS3
Selectable Output
Current Recopy
GND
CSNS
Figure 2. 10XS3412 Simplified Internal Block Diagram
10XS3412
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
PIN CONNECTIONS
Transparent Top View of Package
WAKE
CSNS
1
24
14
GND
23
FSI
GND
22
HS2
Definition
This pin reports an analog value proportional to the designated HS[0:3] output
current or the temperature of the GND flag (pin 14). It is used externally to
generate a ground-referenced voltage for the microcontroller (MCU) . Current
recopy and temperature feedback is SPI programmable.
Each direct input controls the device mode. The IN[0 : 3] high side input pins
are used to directly control HS0 : HS3 high side output pins.
The PWM frequency can be generated from IN0 pin to PWM module in case
of external clock is set.
Output
Input
Input
Input
Input
Input
Power
Fault Status
(Active Low)
Wake
Reset
Chip Select
(Active Low)
Serial Clock
Serial Input
Digital Drain Voltage
This pin is an open drain configured output requiring an external pull-up
resistor to V
DD
for fault reporting.
This input pin controls the device mode.
This input pin is used to initialize the device configuration and fault registers,
as well as place the device in a low-current Sleep mode.
This input pin is connected to a chip select output of a master microcontroller
(MCU).
This input pin is connected to the MCU providing the required bit shift clock for
SPI communication.
This pin is a command data input pin connected to the SPI serial data output
of the MCU or to the SO pin of the previous device of a daisy
-
chain of devices.
This pin is an external voltage input pin used to supply power interfaces to the
SPI bus.
SCLK
VDD
RST
IN3
IN2
IN1
3
13 12 11 10
SO
GND
16
17
9
8
7
6
5
4
HS3
18
15
VPWR
19
HS1
20
NC
21
HS0
Figure 3. 10XS3412 Pin Connections
Table 2. 10XS3412 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page
23.
Pin
Number
1
Pin Name
CSNS
Pin
Function
Output
Formal Name
Output Current
Monitoring
2
3
5
6
7
8
9
10
11
12
13
IN0
IN1
IN2
IN3
FS
WAKE
RST
CS
SCLK
SI
VDD
Input
Direct Inputs
10XS3412
IN0
2
NC
CS
FS
SI
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
Table 2. 10XS3412 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page
23.
Pin
Number
14, 17, 23
15
16
18
19
21
22
4, 20
24
Pin Name
GND
VPWR
SO
HS3
HS1
HS0
HS2
NC
FSI
Pin
Function
Ground
Power
Output
Output
Formal Name
Ground
Definition
These pins, internally shorted, are the ground for the logic and analog circuitry
of the device. These ground pins must be also shorted in the board.
Positive Power Supply This pin connects to the positive power supply and is the source of operational
power for the device.
Serial Output
High Side Outputs
This output pin is connected to the SPI serial data input pin of the MCU or to
the SI pin of the next device of a daisy
-
chain of devices.
Protected 10 m (HS0 and HS1) 12 m (HS2 and HS3) high side power
output pins to the load.
N/A
Input
No Connect
Fail Safe Input
These pins may not be connected.
This input enables the watchdog timeout feature.
10XS3412
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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参数对比
与MC10XS3412DHFKR2相近的元器件有:MC10XS3412CHFKR2。描述及对比如下:
型号 MC10XS3412DHFKR2 MC10XS3412CHFKR2
描述 Power Switch ICs - Power Distribution Eswitch Gen3 1012 Power Management IC Development Tools QUAD HI SIDE SWITCH
是否Rohs认证 符合 符合
厂商名称 NXP(恩智浦) NXP(恩智浦)
Reach Compliance Code not_compliant not_compliant
ECCN代码 EAR99 EAR99
接口集成电路类型 BUFFER OR INVERTER BASED PERIPHERAL DRIVER BUFFER OR INVERTER BASED PERIPHERAL DRIVER
湿度敏感等级 3 3
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