首页 > 器件类别 >

MC33592FTAER2

PLL Tuned UHF Receiver for Data Transfer Applications

厂商名称:FREESCALE (NXP)

下载文档
MC33592FTAER2 在线购买

供应商:

器件:MC33592FTAER2

价格:-

最低购买:-

库存:点击查看

点击购买

文档预览
Freescale Semiconductor, Inc.
Technical Data
Romeo2
MC33592/D
Rev. 0, 7/2002
PLL Tuned UHF
Receiver for Data
Transfer Applications
FEATURES
Freescale Semiconductor, Inc...
Figure 1: Simplified block diagram
Table 1: Ordering Information
Device
MC33592FTA
RF frequency/
IF filter bandwidth
434MHz / 300kHz
Ambiant
Temperature Range
-40°C to +85°C
Package
LQFP24
© Motorola, Inc., 2002
This document contains information on a new product under development. Motorola
reserves the right to change or discontinue this product without notice.
For More Information On This Product,
Go to: www.freescale.com
GNDVCO
315MHz, 434MHz Bands
OOK Demodulation
Low Current Consumption: 5mA Typ. in Run Mode
Internal or External Strobing
Fast Wake-Up Time (1ms)
-105dBm RF Sensitivity (at 4.8kBd Data Rate)
Fully Integrated VCO
Image Cancelling Mixer
Integrated IF Bandpass Filter at 660kHz
IF Bandwidth: 300kHz
ID Byte and Tone Detection
Data Rate: 1 to 11kBd
Manchester Coded Data Clock Recovery
Fully Configurable by SPI Interface
Few External Components, no RF Adjustment
Pin Connections
RCBGAP
STROBE
GNDDIG
MIXOUT
CAFC
24 23
VCC
1
VCC
2
VCCLNA
3
RFIN
4
GNDLNA
5
GNDSUB
6
XTAL1
XTAL2
PFD
GND
CAGC
CMIXAGC
22
21
20
19
18
VCCDIG
17
SCLK
16
MOSI
15
MISO
14
RESETB
13
DMDAT
7
8
9
10
11
12
Freescale Semiconductor, Inc.
PIN FUNCTION DESCRIPTION
PIN FUNCTION DESCRIPTION
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
VCC
VCC
VCCLNA
RFIN
GNDLNA
GNDSUB
PFD
GNDVCO
GND
XTAL1
XTAL2
CAGC
DMDAT
RESETB
MISO
MOSI
SCLK
VCCDIG
GNDDIG
RCBGAP
STROBE
CAFC
MIXOUT
CMIXAGC
Description
5V power supply
5V power supply
5V LNA power supply
RF input
LNA ground
Ground
Access to VCO control voltage
VCO ground
Ground
Reference oscillator crystal
Reference oscillator crystal
IF AGC capacitor for OOK
Demodulated data (OOK modulation)
State Machine Reset
SPI interface I/O
SPI interface I/O
SPI interface clock
5V digital power supply
Digital ground
Reference voltage output
Strobe oscillator control
Stop/Run external control input
AFC capacitor
Mixer output
Mixer AGC capacitor
Freescale Semiconductor, Inc...
2
MC33592 Technical Data
MOTOROLA
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Voltage Allowed on Each Pin
ESD HBM Voltage Capability on Each Pin (note 1)
ESD MM Voltage Capability on Each Pin (note 2)
Solder Heat Resistance Test (10 s)
Storage Temperature
Ts
Tj
Symbol
V
CC
V
CCLNA
Value
V
GND
- 0.3 to 5.5
V
GND
- 0.3
to V
CC
+ 0.3
±2000
±200
260
-65 to +150
150
Unit
V
V
V
V
°C
°C
°C
Freescale Semiconductor, Inc...
Junction Temperature
Notes:
1 Human Body model, AEC-Q100-002 Rev. C.
2 Machine Model, AEC-Q100-003 Rev. E.
MOTOROLA
MC33592 Technical Data
3
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
RECEIVER FUNCTIONAL DESCRIPTION
RECEIVER FUNCTIONAL DESCRIPTION
The basic functionality of the ROMEO2 receiver may be seen by reference to the accompanying block
diagram (see figure 1). It is fully compatible with the TANGO3 transmitter.
The RF section comprises a mixer with image cancelling, followed by an IF band-pass filter at 660kHz, an
AGC controlled gain stage and an OOKdemodulator. The data output from the circuit may either be the data
comparator output, or, if Data Manager is enabled, the SPI port.
The local oscillator is controlled with a PLL referenced to the crystal oscillator. The received channel is defined
by the choice of the crystal frequency.
An SPI bus permits programming the data rate, UHF frequency, ID word etc., though to accomodate
applications where no bus interface is available the circuit defaults at power-on to a standard operating mode.
Depending upon the configuration, the circuit can be either externally strobed by the STROBE input or
internally wait-and-sleep cycled to reduce the power consumption. At any time, a high level on STROBE
overrides the internal timer output and wakes up ROMEO2. When the circuit is switched into sleep mode its
current consumption is approximately 100µA. The circuit configuration which has previously been programmed is
retained.
Freescale Semiconductor, Inc...
THE LOCAL OSCILLATOR PLL
The PLL is tuned by comparing the local oscillator frequency, after suitable division, with that of the crystal
oscillator reference. The loop filter has been integrated in the IC. Practical limits upon the values of components
which may be integrated mean that the local oscillator performance may be slightly improved by using an
external PFD filter, shown in Figure 2. In this way the user may choose to have optimum performance with the
addition of external filter components. The PLL gain may be programmed by bit PG: it is recommended that this
bit be set to 1, corresponding to low loop gain.
Figure 2 : External loop filter
C1=4.7nF, C2=390pF, R=1kW
4
MC33592 Technical Data
MOTOROLA
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
COMMUNICATION PROTOCOL
COMMUNICATION PROTOCOL
MANCHESTER CODING DESCRIPTION
Manchester coding is defined as follows: data is sent during the first half-bit, complementary data is sent
during the second half-bit.
Figure 3 : Manchester coding example
0
1
0
0
1
1
0
Original data
Manchester coded
Freescale Semiconductor, Inc...
The signal average value is constant. This allows clock recovery from the data stream itself. In order to
achieve a correct clock recovery, Manchester coded data must have a duty cycle between 48% and 52%.
PREAMBLE, ID, HEADER WORDS AND MESSAGE DESCRIPTION
The following description applies if the Data Manager is enabled (DME=1).
The ID word is a Manchester coded byte whose content has been previously loaded in the Configuration
Register 2. The complement of the ID word is recognized as an ID word. ID word is sent at the same data rate as
data.
A preamble is required:
- before ID,
- before Header if HE=1,
- before data if HE=0.
It enables AGC to settle, and clock recovery. Figure 4 defines the Preamble word. Preamble content must be
carefully defined in order not to be decoded as an ID or Header word.
Figure 4 : Preamble definition
AGC settling time
Clock recovery
ID
‘1’ NRZ > 200µs
i.e.:
2 ‘1’ NRZ at 9.6kBd,
1 ‘1’ NRZ at 4.8kBd
‘0’ Manchester
at data rate
The Header word is a 4 bit Manchester coded message ‘0110’ or its complement sent at the selected data
rate.
This bit sequence and its complement must not be found in the sequence preamble and ID word.
Data must follow the Header without any delay.
Data are completed by a End-of-Message (EOM) word, consisting of 2 NRZ consecutive ones or zeroes. If the
complement of the Header word is received, output data are complemented too.
The following example shows a complete message with Preamble, ID, Header words followed by 2 data bits,
and an EOM. The preamble is placed at the beginning of both ID and Header words.
MOTOROLA
MC33592 Technical Data
5
For More Information On This Product,
Go to: www.freescale.com
查看更多>
热门器件
热门资源推荐
器件捷径:
00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W
需要登录后才可以下载。
登录取消