MC9S12HZ256
Data Sheet
Covers
MC9S12HZ128, MC9S12HZ64, MC9S12HN64
MC3S12HZ256, MC3S12HZ128, MC3S12HZ64,
MC3S12HN64, MC3S12HZ32 & MC3S12HN32
HCS12
Microcontrollers
MC9S12HZ256V2
Rev. 2.05
04/2008
freescale.com
MC9S12HZ256 Data Sheet
MC9S12HZ256V2
Rev. 2.05
04/2008
This document contains information for all constituent modules, with the exception of the S12 CPU. For
S12 CPU information please refer to the CPU S12 Reference Manual.
To provide the most up-to-date information, the revision of our documents on the World Wide Web will be
the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision History
Date
October 10, 2005
Revision
Level
02.01
New Data Sheet
Corrected Table 4-1 Port U and Port V descriptions
Added 80QFP to PCB layout guidelines
Added derivative differences to appendix D
Updated ordering information on appendix E
Added ROM to memory options
Updated memory map figures and added tables for RAM mapping options
Added ROM derivatives to appendix D
Added ROM description to appendices (appendix E)
Added MC3S12HZ64 mask set
Updated Table A-5 Thermal Package Characteristics
Updated Table A-17 PLL Characteristics
Added MC3S12HZ64 Pinout. Figure 1-7
Corrected register map typo.
Description
April 20, 2006
02.02
October 5, 2006
02.03
October 31, 2006
02.04
April 25, 2008
02.05
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
This product incorporates SuperFlash® technology licensed from SST.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
MC9S12HZ256 Data Sheet, Rev. 2.05
4
Freescale Semiconductor
Chapter 1
Chapter 2
Chapter 3
Chapter 4
Chapter 5
Chapter 6
Chapter 7
Chapter 8
Chapter 9
Chapter 10
Chapter 11
Chapter 12
Chapter 13
Chapter 14
Chapter 15
Chapter 16
Chapter 17
Chapter 18
Chapter 19
Chapter 20
Chapter 21
Chapter 22
MC9S12HZ256 Device Overview . . . . . . . . . . . . . . . . . . . . . . . . 21
256 Kbyte Flash Module (FTS256K2V1) . . . . . . . . . . . . . . . . . . 57
2 Kbyte EEPROM Module (EETS2KV1). . . . . . . . . . . . . . . . . . . 95
Port Integration Module (PIM9HZ256V2) . . . . . . . . . . . . . . . . 115
Clocks and Reset Generator (CRGV4) . . . . . . . . . . . . . . . . . . 167
Oscillator (OSCV2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
Analog-to-Digital Converter (ATD10B16CV4) . . . . . . . . . . . . 207
Liquid Crystal Display (LCD32F4BV1) . . . . . . . . . . . . . . . . . . 241
Motor Controller (MC10B8CV1). . . . . . . . . . . . . . . . . . . . . . . . 259
Stepper Stall Detector (SSDV1). . . . . . . . . . . . . . . . . . . . . . . . 291
Inter-Integrated Circuit (IICV2) . . . . . . . . . . . . . . . . . . . . . . . . 309
Freescale’s Scalable Controller Area Network (MSCANV2) . 333
Serial Communication Interface (SCIV4) . . . . . . . . . . . . . . . . 387
Serial Peripheral Interface (SPIV3) . . . . . . . . . . . . . . . . . . . . . 419
Pulse-Width Modulator (PWM8B6CV1). . . . . . . . . . . . . . . . . . 441
Timer Module (TIM16B8CV1) . . . . . . . . . . . . . . . . . . . . . . . . . . 475
Dual Output Voltage Regulator (VREG3V3V2). . . . . . . . . . . . 501
Background Debug Module (BDMV4). . . . . . . . . . . . . . . . . . . 509
Debug Module (DBGV1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 535
Interrupt (INTV1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567
Multiplexed External Bus Interface (MEBIV3) . . . . . . . . . . . . 575
Module Mapping Control (MMCV4) . . . . . . . . . . . . . . . . . . . . . 603
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
5
