Order this document by MC44011/D
Advance Information
Bus Controlled Multistandard
Video Processor
The Motorola MC44011, a member of the MC44000 Chroma 4 family, is
designed to provide RGB or YUV outputs from a variety of inputs. The inputs
can be composite video (two inputs), S–VHS, RGB, and color difference
(R–Y, B–Y). The composite video can be PAL and/or NTSC as the MC44011
is capable of decoding both systems. Additionally, R–Y and B–Y outputs and
inputs are provided for use with a delay line where needed. Sync separators
are provided at all video inputs.
In addition, the MC44011 provides a sampling clock output for use by a
subsequent triple A/D converter system which digitizes the RGB/YUV
outputs. The sampling clock (6.0 to 40 MHz) is phase–locked to the
horizontal frequency.
Additional outputs include composite sync, vertical sync, field
identification, luma, burst gate, and horizontal frequency.
Control of the MC44011, and reading of status flags, is via an I2C bus.
•
Accepts NTSC and PAL Composite Video, S–VHS, RGB, and R–Y, B–Y
MC44011
BUS CONTROLLED
MULTISTANDARD
VIDEO PROCESSOR
SEMICONDUCTOR
TECHNICAL DATA
44
1
FN SUFFIX
PLASTIC PACKAGE
CASE 777
(PLCC)
•
•
•
•
•
•
•
•
•
Includes Luma and Chroma Filters, Luma Delay Lines, and Sound Traps
Digitally Controlled via I2C Bus
R–Y, B–Y Inputs for Alternate Signal Source
Line–Locked Sampling Clock for A/D Converters
Burst Gate, Composite Sync, Vertical Sync and Field Identification Outputs
RGB/YUV Outputs can Provide 3.0 Vpp for A/D Inputs
Overlay Capability
Single Power Supply: 5.0 V,
±5%,
550 mW (Typical)
44 Pin PLCC and QFP Packages
Representative Block Diagram
Outputs
VCC1
Comp
Video 1
Comp
Video 2
Gnd1
Y1
R–Y B–Y
4
Input
Select
Sound Trap/Luma Filter/Luma Delay/
Chroma Filter/PAL and NTSC
Decoder/Hue and Saturation Control
FB SUFFIX
PLASTIC PACKAGE
CASE 824E
(QFP)
44
1
ORDERING INFORMATION
Device
MC44011FN
MC44011FB
Operating
Temperature Range
TA = 0° to +70°C
Package
PLCC–44
QFP
Inputs
R–Y
B–Y
Y2
R G B
Fast
Comm
Color Difference
Stage
Contrast, Brightness,
Saturation Control DACs
Data Bus
R/V
G/Y
B/U
VCC2
Gnd2
Outputs
Sync
Separator
Vertical
Output
Field ID
17.7 MHz
Oscillator
14.3 MHz
Filter
PLL
Burst
Gate
Vertical
Decoder
Select
4
Sync
Separator
MC44011
I2C Data
Interface/
Registers
PLL #2
Pixel Clock
PLL/VCO
SDL
SCL
To
µP
PLL #1 Horizontal
PLL/VCO
VCC3
Gnd3
16Fh/
CSync
Filter
Switch
H
Filter
Quiet
Gnd
Fh
Ref
15 k
Ret
PLL
Filter
Frequency
Divider
Clock
To A/D Converters
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
©
Motorola, Inc. 1996
Rev 1
MOTOROLA ANALOG IC DEVICE DATA
1
Figure 1. Representative Block Diagram
Outputs
Inputs
System
Select
Y1
Clamp
32
To Sync
Sep
Clamp
Burst
Gate
Clamp
B–Y
R–Y
Signal Selection
Y
Blank
20
5.0
Color Matrix and
Controls
21
5.0
22
B/U
G/Y
Outputs
R/V
B–Y R–Y
B
G
R
5.0
Clamp
Clamp
23
C
PAL/NTSC
Decoder
Ident
B–Y
R–Y
Saturation/
Hue DACs
VCC2
(5.0 V)
Clamp
Clamp
24
Gnd2
Y1
33
B–Y
41
R–Y
42
R–Y
31
B–Y
30
Y2
29
B
26
G
27
R
28
FC
25
34
Ident
Filter
43
2
Luma
Delay
C
Adj. Luma
Delay
X1, X2, X8
Fs Notch
Adaptive Sync
Separator &
Selector
Sync Separator
& Selector
DACs
Sync Separator
Vertical Decoder
2Fh
Comp Sync
Bus Control & Flag Status Read
16Fh
Select
4.4/4.8/5.2
5.5/6.0/6.5 MHz
Comp Video 1 1
Comp Video 2 3
Sound Trap
C
Chroma Trap &
Luma Peaking
ACC Filter
Chroma Filter
C
2
ACC
Chroma PLL Filter
44
PAL/NTSC/S–VHS Decoder
PLL
17.7 MHz Xtal 1
38
C
Oscillator
MC44011
36
14.3 MHz Xtal 2
From
RGB & Y2
Inputs
Field ID 7
5.0 V
Vert. Sync
Separator
Field ID
Line Counter
& Decoder
Saturation
Contrast
∆
Blue Gain
∆
Red Gain
Brightness
∆
Red DC
∆
Blue DC
Color Difference Stage
4
525, 625
Vertical Sync
NC
37
PLL #1
16Fh Blank
÷
64
Phase
Det
2Fh
PLL #2
Coincidence
Counter
5.0
I ref
C
9
Calibration
Circuit
Voltage
Monitor
2Fo
Fo
Charge
Pump
12–40 MHz
VCO
÷
2
VCC1
40
(5.0 V)
VCO
U
Phase & Frequency
D
Comparator
I 2C Data
Interface/
Registers
5
6
SCL
SDL
To
µP
Figure 1.
13
16Fh/ S/C
CSync
Burst
Gate
Fh
Ref
35
8
14
Gnd3
Gnd1
39
17
19
VCC3
(5.0 V)
15
15 k
Ret
16
PLL #2
Filter
Frequency
Divider
18
Clock
To A/D Converters
12
11
10
MOTOROLA ANALOG IC DEVICE DATA
H Filt
Switch
H Fil
Quiet
GND
MC44011
ELECTRICAL CHARACTERISTICS
(The tested electrical characteristics are based on the conditions shown in Table 1 and 2.
Composite Video input signal = 1.0 Vpp, composed of: 0.7 Vpp Black–to–White; 0.3 Vpp Sync–to–Black; 0.3 Vpp Color Burst. VCC1 = VCC2
= VCC3 = 5.0 V, Iref = 32
µA
(Pin 9), unless otherwise noted.)
Table 1. Control Bit Test Settings
Control Bit
$77–7
$77–6
$77–5
$77–4
$77–3
$77–2
$77–1, 0
$78–7
$78–6
$79–7, 6
$7A–7
$7A–6
$7B–7, 6
$7C–7
$7C–6, $7D–6
$7D–7, $7E–7, 6
$7F–7, 6, $80–6
$80–7
$81–7
$81–6
$82–7
$82–6
$83–7
$83–6
$84–7
$84–6
$85–7
$85–6
$86–7
$86–6
$87–7
$88–7
$88–6
Name
S–VHS–Y
S–VHS–C
FSI
L2 GATE
BLCP
L1 GATE
CB1, CA1
36/68
µs
CalKill
HI, VI
Xtal
SSD
T1, T2
SSC
SSA, SSB
P1, P3, P2
D3, D1, D2
RGB EN
Y2 EN
Y1 EN
YUV EN
YX EN
L2 Gain
L1 Gain
H Switch
525/625
Fosc
÷
2
CSync
Vin Sync
H EN
Y2 Sync
V2/V1
RGB Sync
Value
0
0
0
0
0
0
1,1
0
0
1,1
–
0
1,1
0
–
1, 1, 1
0, 0, 0
0
0
1
0
0
0
1
0
–
0
0
1
0
0
1
0
Composite Video input selected.
Composite Video input selected.
50 Hz Field Rate selected.
PLL #2 Gating enabled.
Clamp Pulse Gating enabled.
Vertical Gating enabled.
Vertical section Auto–Countdown mode
Time from beginning of Line 4 to Vertical Sync is 36
µs.
Horizontal Calibration Loop enabled.
Normal
0 = 17.7 MHz crystal selected, 1 = 14.3 MHz crystal selected.
Normal
Sound Trap Notch filter set to 5.5 MHz (with 17.7 MHz crystal).
Permits PAL and NTSC selection.
0, 1 = PAL decoding, 1,0 = NTSC decoding
Sets Luma Peaking at 0 dB.
Set Luma Delay to minimum
Fast Commutate input can enable RGB inputs.
Y2 input (Pin 29) deselected
Y1 luma path from PAL/NTSC decoder selected.
RGB output mode selected
Disable luma matrix from RGB inputs.
Set PLL #2 Phase/Frequency detector gain high.
Set PLL #1 Phase Detector gain high.
Set Horizontal Phase Detector filter switch open.
0 = 625 lines (PAL), 1 = 525 lines (NTSC)
Select direct VCO output from PLL #2.
16 Fh output selected at Pin 13.
Composite Video inputs (Pin 1 or 3) Sync Source selected.
Enabled Horizontal Timebase.
Y2 sync source not selected.
Select Video 1 input (Pin 1).
RGB inputs Sync Source not selected.
Function
Table 2. DAC Test Settings
DAC
$78
$79
$7D
$7E
$7F
$80
$81
NOTE:
Value
32
32
00
00
63
32
32
Function
R–Y/B–Y Gain
Sub Carrier Phase
Blue Output DC Bias
Red Output DC Bias
Pixel Clock VCO Gain
Blue Contrast Trim
Main Contrast
DAC
$82
$83
$84
$85
$86
$87
$88
Value
32
32
32
32
32
16
32
Function
Red Contrast Trim
Blue Brightness Trim
Main Brightness
Red Brightness Trim
Saturation (Color Diff.)
Saturation (Decoder)
Hue
Currents out of a pin are designated –, and those into a pin are designated +.
MOTOROLA ANALOG IC DEVICE DATA
3
MC44011
MAXIMUM RATINGS
Rating
Power Supply Voltage
Symbol
VCC1
VCC2
VCC3
–
Vin
Value
–0.5 to +6.0
–0.5 to +6.0
–0.5 to +6.0
±0.5
–0.5, VCC1 +0.5
–0.5, VCC3 +0.5
–0.5, VCC2 +0.5
–65 to +150
Unit
Vdc
Power Supply Difference
(Between any two VCC pins)
Input Voltage: Video 1, 2, SCL, SDL
Input Voltage:
15 kHz Return
Input Voltage:
R–Y, B–Y, Y2, RGB, FC
Junction Temperature (Storage and Operating)
Vdc
Vdc
TJ
°C
NOTES:
1. Devices should not be operated at these limits. The “Recommended Operating Conditions”
table provides for actual device operation.
2. ESD data available upon request.
RECOMMENDED OPERATING CONDITIONS
Characteristics
Power Supply Voltage
Power Supply Difference (Between any two VCC pins)
Input Voltage: Video 1, 2 (Sync–White)
Input Voltage:
Chroma (S–VHS Mode)
Input Voltage:
Y2
Input Voltage:
RGB
Input Voltage:
R–Y, B–Y (Pins 30, 31)
Input Voltage:
15 kHz Return
Input Voltage:
SCL, SDL
Input Voltage:
FC
Input Voltage:
Burst Signal
Input Voltage:
Sync Amplitude
Output Load Impedance to Ground: RGB (Pull–Up = 390
Ω)
Output Load Impedance to Ground:
B–Y, R–Y
Output Load Impedance to Ground:
Y1
Pull–Up Resistance at Vertical Sync (Pin 4)
Source Impedance: Video 1, 2
Source Impedance:
Pins 26 to 31
Pixel Clock Frequency (Pin 18, see PLL #2 Electrical Characteristic)
15 kHz Return Pulse Width (Low Time)
I2C Clock Frequency
Reference Current (Pin 9)
Operating Ambient Temperature
NOTE:
All limits are not necessarily functional concurrently.
Symbol
VCC1, 2, 3
∆V
CC
Vin
Min
4.75
–0.5
0.7
–
0.7
0.5
0
0
0
0
30
60
1.0
10
1.0
1.0
0
0
–
0.2
–
–
0
Typ
5.0
0
1.0
–
1.0
0.7
–
–
–
–
280
300
–
–
–
10
–
–
2.0 to 45
–
–
32
–
Max
5.25
0.5
1.4
1.2
1.4
1.0
1.8
VCC3
VCC1
VCC2
560
VCC1
Unit
Vdc
Vdc
Vpp
Vdc
mVpp
mVpp
kΩ
RLRGB
RLCD
RLY1
RVS
–
fpx
PW15k
fI2C
Iref
TA
∞
∞
∞
–
1.0
1.0
–
45
100
–
70
kΩ
kΩ
MHz
µs
kHz
µA
°C
ELECTRICAL CHARACTERISTICS
(TA = 25°C, VCC1 = VCC2 = VCC3 = 5.0 V, unless otherwise noted.)
Characteristics
POWER SUPPLIES
Power Supply Current (VCC = 5.0 V) Pin 40
Pin 23
Pin 19
Total
75
6.0
3.5
85
95
9.0
6.0
110
115
12
8.0
135
mA
Min
Typ
Max
Unit
4
MOTOROLA ANALOG IC DEVICE DATA
MC44011
ELECTRICAL CHARACTERISTICS
(continued)
(TA = 25°C, VCC1 = VCC2 = VCC3 = 5.0 V, unless otherwise noted.)
Characteristics
PAL/NTSC/S–VHS DECODER
Video 1, 2 Inputs
Crosstalk Rejection, f = 1.0 MHz
(Measured at Y1 output, Luma Peaking = 0 dB, $77–7 = 1)
DC Level: @ Selected Input
DC Level:
@ Unselected Input
Clamp Current
Sound Trap Rejection (See Figures 14 to 23)
With 17.7 MHz Crystal: @ 6.5 MHz (T1, T2 = 00)
With 17.7 MHz Crystal:
@ 6.0 MHz (T1, T2 = 10)
With 17.7 MHz Crystal:
@ 5.5 MHz (T1, T2 = 11)
With 17.7 MHz Crystal:
@ 5.74 MHz (T1, T2 = 01)
With 14.3 MHz Crystal: @ 4.44 MHz (T1, T2 = 11)
R–Y, B–Y Outputs (Pins 41, 42)
Output Amplitude (with 100% Saturated Color Bars)
Saturation (DAC 87) = 00
Saturation (DAC 87) = 16
Saturation (DAC 87) = 63
DC Level During Blanking
Hue Control – Minimum Phase (DAC 88 = 00)
Hue Control
– Maximum Phase (DAC 88 = 63)
Nominal Saturation (with respect to Y1 Output, Note 1)
R–Y/B–Y Ratio: Balance (DAC 78) = 63
B–Y/R–Y Ratio:
Balance (DAC 78) = 32
B–Y/R–Y Ratio:
Balance (DAC 78) = 00
Output Amplitude Variation as Burst is varied from 80 mVpp to 600 mVpp
Color Kill Attenuation ($7C–7, 6 and $7D–6 = 011)
Crosstalk with respect to Y1 Output (@ 1.0 MHz)
Chroma Subcarrier Residual
(Measured at Y1 Output, with 17.7 MHz Crystal)
f = Subcarrier
2nd Harmonic Residual
4th Harmonic Residual
(Measured at R–Y, B–Y Outputs, with 17.7 or 14.3 MHz Crystal)
f = Subcarrier
2nd Harmonic Residual
4th Harmonic Residual
Y1 Luma Output (Pin 33)
Clamp Level
Output Impedance
Composite Video Mode ($77–6, 7 = 00)
Output Level versus Input Level
Delay = 000, Peaking = 111, f = 100 kHz
Delay = Min–to–Max, Peaking = Min–to–Max
–3.0 dB Bandwidth (17.7 MHz Crystal, PAL Decoding selected,
Sound trap at 6.5 MHz, Peaking off)
Peaking Range ($7D–7, $7E–6/7 = 000 to 111, @ 3.0 MHz, with 17.7 MHz Crystal,
Sound trap at 6.5 MHz)
Overshoot with Minimum Peaking
Differential Non–linearity (Measured with Staircase)
Delay (Pin 1 or 3 to 33)
With 14.3 MHz Crystal: Minimum
Maximum
With 17.7 MHz Crystal: Minimum
Maximum
20
–
–
–30
15
15
10
15
–
40
2.8
0.7
–20
30
30
43
26
35
–
–
–
–10
–
–
–
–
–
dB
Vdc
µA
dB
Min
Typ
Max
Unit
–
–
1.8
–
–
–
–
1.35
0.98
0.60
–
–
–27
<1.0
1.6
3.0
2.4
–30
30
100
1.69
1.27
0.77
3.0
40
–20
–
–
–
–
–
–
–
2.06
1.58
0.96
–
–
–
mVpp
Vpp
Vdc
Deg
%
V/V
dB
dB
–
–
–
–
–
–
0.4
–
25
4.0
12
5.0
5.0
15
1.1
300
60
12
30
20
20
50
1.8
–
mVpp
Vdc
Ω
1.0
–
–
5.0
–
–
–
–
–
–
1.1
1.1
2.8
8.0
0
2.0
690
1040
594
876
1.2
–
–
10
–
–
–
–
–
–
V/V
MHz
dB
%
%
ns
NOTE:
1. This spec indicates a correct output amplitude at Pins 41 and 42, with respect to Y1 output. For standard color bar inputs, the output amplitude is
NOTE:
1.
between 1.5 and 1.7 Vpp, with the settings in Tables 1 and 2.
MOTOROLA ANALOG IC DEVICE DATA
5
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