Freescale Semiconductor, Inc.
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MC68HC05P18A/D
Freescale Semiconductor, Inc...
MC68HC05P18A
HCMOS Microcontroller Unit
TECHNICAL DATA
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N O N - D I S C L O S U R E
A G R E E M E N T
HC 5
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Freescale Semiconductor, Inc.
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A G R E E M E N T
N O N - D I S C L O S U R E
Motorola reserves the right to make changes without further notice to
any products herein to improve reliability, function or design. Motorola
does not assume any liability arising out of the application or use of any
product or circuit described herein; neither does it convey any license
under its patent rights nor the rights of others. Motorola products are not
designed, intended, or authorized for use as components in systems
intended for surgical implant into the body, or other applications intended
to support or sustain life, or for any other application in which the failure
of the Motorola product could create a situation where personal injury or
death may occur. Should Buyer purchase or use Motorola products for
any such unintended or unauthorized application, Buyer shall indemnify
and hold Motorola and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such
unintended or unauthorized use, even if such claim alleges that Motorola
was negligent regarding the design or manufacture of the part.
Technical Data
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MC68HC05P18A
Freescale Semiconductor, Inc.
Technical Data — MC68HC05P18A
List of Sections
Section 1. General Description . . . . . . . . . . . . . . . . . . . . 15
Section 2. Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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Section 3. Central Processor Unit (CPU) . . . . . . . . . . . . 33
Section 4. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Section 5. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Section 6. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . 49
Section 7. Input/Output (I/O) Ports . . . . . . . . . . . . . . . . . 55
Section 8. 16-Bit Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Section 9. Serial Input/Output Ports (SIOP) . . . . . . . . . . 77
Section 10. EEPROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Section 11. Analog-to-Digital (A/D) Converter . . . . . . . . 91
Section 12. Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . 97
Section 13. Electrical Specifications . . . . . . . . . . . . . . . 115
Section 14. Mechanical Specifications . . . . . . . . . . . . . 125
Section 15. Ordering Information . . . . . . . . . . . . . . . . . 127
MC68HC05P18A
List of Sections
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A G R E E M E N T
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Freescale Semiconductor, Inc.
List of Sections
R E Q U I R E D
N O N - D I S C L O S U R E
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List of Sections
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MC68HC05P18A
Freescale Semiconductor, Inc.
Technical Data — MC68HC05P18A
Table of Contents
Section 1. General Description
1.1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Mask Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
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1.3
1.4
Section 2. Memory Map
2.1
2.2
2.3
2.4
2.5
2.6
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
User Mode Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
I/O and Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
MC68HC05P18A
Table of Contents
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N O N - D I S C L O S U R E
1.5
Functional Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
1.5.1
Power Supply (V
DD
and V
SS
) . . . . . . . . . . . . . . . . . . . . . . . .20
1.5.2
Oscillator Pins (OSC1 and OSC2) . . . . . . . . . . . . . . . . . . . .20
1.5.2.1
Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
1.5.2.2
Ceramic Resonator . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
1.5.2.3
External Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
1.5.3
Reset
(RESET).
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
1.5.4
Port A (PA0–PA7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
1.5.5
Port B (PB5/SDO, PB6/SDI, and PB7/SCK) . . . . . . . . . . . .23
1.5.6
Port C (PC0–PC2, PC3/AD3, PC4/AD2, PC5/AD1,
PC6/AD0, and PC7/V
REFH
) . . . . . . . . . . . . . . . . . . . . . . .23
1.5.7
Port D (PD5/CKOUT and PD7/TCAP) . . . . . . . . . . . . . . . . .23
1.5.8
Timer Output Compare (TCMP) . . . . . . . . . . . . . . . . . . . . . .23
1.5.9
Maskable Interrupt Request (IRQ) . . . . . . . . . . . . . . . . . . . .24
1.5.10 CPU Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
A G R E E M E N T
1.2
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