HC05PL4GRS/H
REV 2.0
68HC05PL4
68HC05PL4B
68HC705PL4
68HC705PL4B
SPECIFICATION
(General Release)
April 30, 1998
Consumer Systems Group
Semiconductor Products Sector
Motorola reserves the right to make changes without further notice to any products herein
to improve reliability, function or design. Motorola does not assume any liability arising out
of the application or use of any product or circuit described herein; neither does it convey
any license under its patent rights nor the rights of others. Motorola products are not
designed, intended, or authorized for use as components in systems intended for surgical
implant into the body, or other applications intended to support or sustain life, or for any
other application in which the failure of the Motorola product could create a situation
where personal injury or death may occur. Should Buyer purchase or use Motorola
products for any such unintended or unauthorized application, Buyer shall indemnify and
hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that Motorola was
negligent regarding the design or manufacture of the part.
©
Motorola, Inc., 1998
April 30, 1998
GENERAL RELEASE SPECIFICATION
TABLE OF CONTENTS
Section
SECTION 1
GENERAL DESCRIPTION
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
FEATURES ...................................................................................................... 1-1
MCU BLOCK DIAGRAM .................................................................................. 1-2
PIN ASSIGNMENTS ........................................................................................ 1-3
PIN DESCRIPTIONS ....................................................................................... 1-4
VDD, VSS .................................................................................................... 1-4
OSC1, OSC2 ............................................................................................... 1-4
RESET......................................................................................................... 1-4
LED/IRQ ...................................................................................................... 1-4
PA0, PA1/DTMF, PA2/TCAP, PA3/TCMP, PA4-PA6 .................................. 1-5
PB0/KBI0-PB3/KBI3, PB4-PB7.................................................................... 1-5
PC0-PC7...................................................................................................... 1-6
SECTION 2
MEMORY
2.1
2.2
2.3
2.4
2.5
MEMORY MAP ................................................................................................ 2-1
I/O REGISTERS .............................................................................................. 2-2
RAM ................................................................................................................. 2-2
ROM................................................................................................................. 2-2
COP WATCHDOG REGISTER (COPR).......................................................... 2-2
SECTION 3
CENTRAL PROCESSING UNIT
3.1
3.2
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
REGISTERS .................................................................................................... 3-1
ACCUMULATOR (A) ....................................................................................... 3-2
INDEX REGISTER (X) ..................................................................................... 3-2
STACK POINTER (SP) .................................................................................... 3-2
PROGRAM COUNTER (PC) ........................................................................... 3-2
CONDITION CODE REGISTER (CCR) ........................................................... 3-3
Half Carry Bit (H-Bit) .................................................................................... 3-3
Interrupt Mask (I-Bit) .................................................................................... 3-3
Negative Bit (N-Bit) ...................................................................................... 3-3
Zero Bit (Z-Bit) ............................................................................................. 3-3
Carry/Borrow Bit (C-Bit) ............................................................................... 3-4
SECTION 4
INTERRUPTS
4.1
4.2
4.3
4.4
4.4.1
INTERRUPT VECTORS .................................................................................. 4-1
INTERRUPT PROCESSING ........................................................................... 4-2
SOFTWARE INTERRUPT ............................................................................... 4-4
EXTERNAL INTERRUPT ................................................................................ 4-4
LED/IRQ Pin ................................................................................................ 4-4
MOTOROLA
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MC68HC05PL4
REV 2.0
GENERAL RELEASE SPECIFICATION
April 30, 1998
TABLE OF CONTENTS
Section
Page
4.4.2
Miscellaneous Control and Status Register................................................. 4-5
4.5
16-BIT TIMER INTERRUPTS .......................................................................... 4-6
4.5.1
Input Capture Interrupt................................................................................. 4-6
4.5.2
Output Compare Interrupt............................................................................ 4-6
4.5.3
Timer Overflow Interrupt .............................................................................. 4-6
4.6
8-BIT TIMER INTERRUPT .............................................................................. 4-6
4.7
KEYBOARD INTERRUPT ............................................................................... 4-7
SECTION 5
RESETS
5.1
5.2
5.3
5.3.1
5.3.2
5.3.3
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
5.5
POWER-ON RESET ........................................................................................ 5-1
EXTERNAL RESET ......................................................................................... 5-2
INTERNAL RESETS ........................................................................................ 5-2
Power-On Reset (POR) ............................................................................... 5-3
Computer Operating Properly (COP) Reset ................................................ 5-3
Illegal Address Reset................................................................................... 5-4
RESET STATES OF SUBSYSTEM IN MCU ................................................... 5-5
CPU ............................................................................................................. 5-5
I/O Registers................................................................................................ 5-5
8-Bit Timer ................................................................................................... 5-5
16-Bit Programmable Timer......................................................................... 5-5
Keyboard Interrupt Interface ........................................................................ 5-6
6-bit DAC Subsystem .................................................................................. 5-6
System Clock Option Subsystem ................................................................ 5-6
Miscellaneous Subsystem ........................................................................... 5-6
RESET CHARACTERISTICS .......................................................................... 5-7
SECTION 6
OPERATING MODES
6.1
OPERATING MODES...................................................................................... 6-1
6.1.1
Single-chip (Normal) Mode .......................................................................... 6-1
6.1.2
Self-check Mode .......................................................................................... 6-1
6.2
LOW POWER MODES .................................................................................... 6-2
6.2.1
STOP Mode ................................................................................................. 6-2
6.2.2
WAIT Mode.................................................................................................. 6-2
SECTION 7
INPUT/OUTPUT PORTS
7.1
PARALLEL PORTS ......................................................................................... 7-1
7.1.1
Port Data Registers ..................................................................................... 7-2
7.1.2
Port Data Direction Registers ...................................................................... 7-2
7.2
PORT A............................................................................................................ 7-2
7.3
PORT B............................................................................................................ 7-3
MOTOROLA
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MC68HC05PL4
REV 2.0
April 30, 1998
GENERAL RELEASE SPECIFICATION
TABLE OF CONTENTS
Section
7.4
7.5
Page
PORT C ........................................................................................................... 7-3
SUMMARY OF PORT A AND PORT B SHARED PINS .................................. 7-3
SECTION 8
SYSTEM CLOCKS
8.1
SYSTEM CLOCK SOURCE AND FREQUENCY OPTION.............................. 8-1
SECTION 9
16-BIT PROGRAMMABLE TIMER
9.1
9.2
9.3
9.4
9.5
9.5.1
9.6
9.7
9.8
TIMER REGISTERS (TMRH, TMRL)............................................................... 9-2
ALTERNATE COUNTER REGISTERS (ACRH, ACRL) .................................. 9-4
INPUT CAPTURE REGISTERS ...................................................................... 9-5
OUTPUT COMPARE REGISTERS ................................................................. 9-6
TIMER CONTROL REGISTER (TCR) ............................................................. 9-8
Miscellaneous Control and Status Register for Timer16 ............................. 9-9
TIMER STATUS REGISTER (TSR)............................................................... 9-10
16-BIT TIMER OPERATION DURING WAIT MODE ..................................... 9-11
16-BIT TIMER OPERATION DURING STOP MODE .................................... 9-11
SECTION 10
8-BIT TIMER
10.1
10.2
10.3
10.4
10.5
10.6
OVERVIEW.................................................................................................... 10-1
TIMER8 CONTROL AND STATUS REGISTER (T8CSR) ............................. 10-2
TIMER8 COUNTER REGISTER (T8CNTR) .................................................. 10-3
COMPUTER OPERATING PROPERLY (COP) WATCHDOG ...................... 10-3
8-BIT TIMER OPERATION DURING WAIT MODE ....................................... 10-4
8-BIT TIMER OPERATION DURING STOP MODE ...................................... 10-4
SECTION 11
DIGITAL TO ANALOG CONVERTER
11.1
11.2
11.3
11.4
DAC CONTROL AND DATA REGISTER ...................................................... 11-1
DAC OPERATION DURING WAIT MODE .................................................... 11-1
DAC OPERATION DURING STOP MODE.................................................... 11-1
DAC CHARACTERISTICS ............................................................................ 11-2
SECTION 12
INSTRUCTION SET
12.1 ADDRESSING MODES ................................................................................. 12-1
12.1.1 Inherent...................................................................................................... 12-1
12.1.2 Immediate .................................................................................................. 12-1
12.1.3 Direct ......................................................................................................... 12-2
12.1.4 Extended.................................................................................................... 12-2
12.1.5 Indexed, No Offset..................................................................................... 12-2
12.1.6 Indexed, 8-Bit Offset .................................................................................. 12-2
MC68HC05PL4
REV 2.0
MOTOROLA
iii
DSP 与 ARM 处理器
