D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
MC74AC273, MC74ACT273
Octal D Flip−Flop
The MC74AC273/74ACT273 has eight edge-triggered D−type
flip−flops with individual D inputs and Q outputs. The common
buffered Clock (CP) and Master Reset (MR) inputs load and reset
(clear) all flip−flops simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the LOW−to−HIGH clock transition, is transferred
to the corresponding flip−flop’s Q output.
All outputs will be forced LOW independently of Clock or Data
inputs by a LOW voltage level on the MR input. The device is useful
for applications where the true output only is required and the Clock
and Master Reset are common to all storage elements.
Features
http://onsemi.com
20
1
PDIP−20
SUFFIX N
CASE 738
•
•
•
•
•
•
•
•
•
•
Ideal Buffer for MOS Microprocessor or Memory
Eight Edge-Triggered D Flip−Flops
Buffered Common Clock
Buffered, Asynchronous Master Reset
See MC74AC377 for Clock Enable Version
See MC74AC373 for Transparent Latch Version
See MC74AC374 for 3-State Version
Outputs Source/Sink 24 mA
′ACT273
Has TTL Compatible Inputs
Pb−Free Packages are Available*
V
CC
20
Q
7
19
D
7
18
D
6
17
Q
6
16
Q
5
15
D
5
14
D
4
13
Q
4
12
CP
11
20
SOIC−20WB
SUFFIX DW
CASE 751D
1
TSSOP−20
SUFFIX DT
CASE 948E
1
SOEIAJ−20
SUFFIX M
CASE 967
1
20
20
PIN ASSIGNMENT
PIN
D
0
−D
7
1
MR
2
Q
0
3
D
0
4
D
1
5
6
7
D
2
8
D
3
9
Q
3
10
GND
MR
CP
Q
0
−Q
7
Q
1
Q
2
(Top View)
FUNCTION
Data Inputs
Master Reset
Clock Pulse Input
Data Outputs
Pinout: 20−Lead Packages Conductors
MODE SELECT-FUNCTION TABLE
Operating Mode
Reset (Clear)
Load
′1′
Load
′0′
Inputs
MR
L
H
H
CP
X
D
n
X
H
L
Outputs
Q
n
L
H
L
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP
MR
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
1
December, 2005 − Rev. 6
Publication Order Number:
MC74AC273/D
MC74AC273, MC74ACT273
D
0
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
Q
CP
R
D
D
Q
CP
R
D
D
Q
CP
R
D
D
Q
CP
R
D
D
Q
CP
R
D
D
Q
CP
R
D
D
R
D
Q
CP
D
R
D
Q
CP
MR
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
NOTE: That this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Figure 1. Logic Diagram
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
T
stg
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC V
CC
or GND Current per Output Pin
Storage Temperature
Value
− 0.5 to + 7.0
− 0.5 to V
CC
+ 0.5
− 0.5 to V
CC
+ 0.5
±
20
±
50
±
50
− 65 to + 150
Unit
V
V
V
mA
mA
mA
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
in
, V
out
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
@ 3.0 V
t
r
, t
f
Input Rise and Fall Time (Note 1)
′AC
Devices except Schmitt Inputs
Input Rise and Fall Time (Note 2)
′ACT
Devices except Schmitt Inputs
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
Output Current − Low
V
CC
@ 4.5 V
V
CC
@ 5.5 V
t
r
, t
f
T
J
T
A
I
OH
I
OL
V
CC
@ 4.5 V
V
CC
@ 5.5 V
Parameter
′AC
′ACT
Min
2.0
4.5
0
−
−
−
−
−
−
−40
−
−
Typ
5.0
5.0
−
150
40
25
10
8.0
−
25
−
−
Max
6.0
5.5
V
CC
−
−
−
−
−
140
85
−24
24
ns/V
°C
°C
mA
mA
ns/V
V
V
Unit
1. V
IN
from 30% to 70% V
CC
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
IN
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
http://onsemi.com
2
MC74AC273, MC74ACT273
DC CHARACTERISTICS
74AC
Symbol
Parameter
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum Low Level Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
I
OLD
I
OHD
Maximum Input Leakage Current
†Minimum Dynamic Output Current
5.5
5.5
5.5
T
A
= +25°C
Typ
V
IH
Minimum High Level Input Voltage
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
−
−
−
0.002
0.001
0.001
−
−
−
−
−
−
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
−
−
74AC
T
A
= −40°C to +85°C
Guaranteed Limits
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
75
−75
V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
I
OUT
= −50
mA
Unit
Conditions
V
IL
Maximum Low Level Input Voltage
V
V
OH
Minimum High Level Output Voltage
V
V
V
*V
IN
= V
IL
or V
IH
−12 mA
I
OH
−24 mA
−24 mA
I
OUT
= 50
mA
V
mA
mA
*V
IN
= V
IL
or V
IH
12 mA
I
OL
24 mA
24 mA
V
I
= V
CC
, GND
V
OLD
= 1.65 V Max
V
OHD
= 3.85 V Min
V
IN
= V
CC
or GND
I
CC
Maximum Quiescent Supply Current
5.5
−
8.0
80
mA
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: Note: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
.
AC CHARACTERISTICS
(For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
Symbol
Parameter
V
CC
*
(V)
3.3
5.0
3.3
5.0
3.3
5.0
T
A
= +25°C C
L
= 50 pF
Min
f
max
t
PLH
t
PHL
t
PHL
Maximum Clock
Frequency
Propagation Delay
Clock to Output
Propagation Delay
Clock to Output
90
140
4.0
3.0
4.0
3.0
Typ
125
175
7.0
5.5
7.0
5.0
Max
−
−
12.5
9.0
13.0
10.0
13.0
10.0
74AC
T
A
= −40°C to +85°C C
L
= 50 pF
Min
75
125
3.0
2.5
3.5
2.5
3.5
2.5
Max
−
−
14.0
10.0
14.5
11.0
14.0
10.5
Mhz
ns
ns
ns
3−3
3−6
3−6
3−6
Unit
Figure
No.
Propagation Delay
3.3
4.0
7.0
MR to Output
5.0
3.0
5.0
*Voltage Range 3.3 V is 3.3 V
±0.3
V. Voltage Range 5.0 V is 5.0 V
±0.5
V.
AC OPERATING REQUIREMENTS
74AC
Symbol
Parameter
V
CC
*
(V)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
T
A
= +25°C C
L
= 50 pF
Typ
t
s
t
h
t
w
t
w
t
rec
Setup Time, HIGH or LOW
Data to CP
Hold Time, HIGH or LOW
Data to CP
Clock Pulse Width
HIGH or LOW
MR Pulse Width
HIGH or LOW
3.5
2.5
−2.0
−1.0
3.5
2.5
2.0
1.5
5.5
4.0
0
1.0
5.5
4.0
5.5
4.0
74AC
T
A
= −40°C to +85°C C
L
= 50 pF
Guaranteed Minimum
6.0
4.5
0
1.0
6.0
4.5
6.0
4.5
4.5
3.0
ns
ns
ns
ns
ns
3−9
3−9
3−6
3−6
3−9
Unit
Figure
No.
Recovery Time
3.3
1.5
3.5
MR to CP
5.0
1.0
2.0
*Voltage Range 3.3 V is 3.3 V
±0.3
V. Voltage Range 5.0 V is 5.0 V
±0.5
V.
http://onsemi.com
3
MC74AC273, MC74ACT273
DC CHARACTERISTICS
74ACT
Symbol
Parameter
V
CC
(V)
T
A
= +25°C
Typ
V
IH
V
IL
V
OH
Minimum High Level Input Voltage
Maximum Low Level Input Voltage
Minimum High Level Output Voltage
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Maximum Low Level Output Voltage
4.5
5.5
4.5
5.5
I
IN
DI
CCT
I
OLD
I
OHD
Maximum Input Leakage Current
Additional Max. I
CC
/Input
†Minimum Dynamic Output Current
5.5
5.5
5.5
5.5
1.5
1.5
1.5
1.5
4.49
5.49
−
−
0.001
0.001
−
−
−
0.6
−
−
74ACT
T
A
=
−40°C to +85°C
Unit
Conditions
Guaranteed Limits
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36
±0.1
−
−
−
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±1.0
1.5
75
−75
80
V
V
V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
I
OUT
= −50
mA
*V
IN
= V
IL
or V
IH
I
OH
−24 mA
−24 mA
I
OUT
= 50
mA
*V
IN
= V
IL
or V
IH
24 mA
I
OL
24 mA
V
I
= V
CC
, GND
V
I
= V
CC
− 2.1 V
V
OLD
= 1.65 V Max
V
OHD
= 3.85 V Min
V
IN
= V
CC
or GND
V
V
V
mA
mA
mA
mA
I
CC
Maximum Quiescent Supply Current
5.5
−
8.0
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS
(For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
Symbol
Parameter
V
CC
*
(V)
T
A
= +25°C C
L
= 50 pF
Min
f
max
t
PHL
t
PLH
t
PHL
Maximum Clock Frequency
Propagation Delay Clock to Output
Propagation Delay Clock to Output
Propagation Delay MR to Output
5.0
5.0
5.0
5.0
125
3.0
3.0
3.0
Typ
200
6.0
6.5
7.0
Max
−
10
11
11
74ACT
T
A
= −40°C to +85°C
C
L
= 50 pF
Min
125
2.5
2.5
2.5
Max
−
11.0
12.0
11.5
MHz
ns
ns
ns
3−3
3−6
3−6
3−6
Unit
Figure
No.
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
AC OPERATING REQUIREMENTS
74ACT
Symbol
Parameter
V
CC
*
(V)
T
A
= +25°C C
L
= 50 pF
Typ
t
s
t
h
t
w
t
w
t
rec
Setup Time, HIGH or LOW − Data to CP
Hold Time, HIGH or LOW − Data to CP
Clock Pulse Width − HIGH or LOW
MR Pulse Width − HIGH or LOW
Recovery Time − MR to CP
5.0
5.0
5.0
5.0
5.0
3.0
−2.5
2.5
2.5
−1.0
74ACT
T
A
= −40°C to +85°C
C
L
= 50 pF
5.0
2.0
4.5
4.5
3.0
Unit
Figure
No.
Guaranteed Minimum
4.5
2.0
4.0
4.0
2.0
ns
ns
ns
ns
ns
3−9
3−9
3−6
3−6
3−6
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
CAPACITANCE
Symbol
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance
Parameter
Value Typ
4.5
50
Unit
pF
pF
Test Conditions
V
CC
= 5.0 V
V
CC
= 5.0 V
http://onsemi.com
4
Linux与安卓
