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MC74AC574, MC74ACT574
Octal D Flip-Flop with
3-State Outputs
The MC74AC574/74ACT574 is a high–speed, low power octal
flip–flop with a buffered common Clock (CP) and a buffered common
Output Enable (OE). The information presented to the D inputs is
stored in the flip–flops on the LOW–to–HIGH
Clock (CP) transition.
The MC74AC574/74ACT574 is functionally identical to the
MC74AC374/74ACT374 except for the pinouts.
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PDIP–20
N SUFFIX
CASE 738
20
1
•
Inputs and Outputs on Opposite Sides of Package
•
•
•
•
•
Allowing Easy Interface with Microprocessors
Useful as Input or Output Port for Microprocessors
Functionally Identical to MC74AC374/74ACT374
3-State Outputs for Bus-Oriented Applications
Outputs Source/Sink 24 mA
′ACT574
Has TTL Compatible Inputs
VCC
20
O0
19
O1
18
O2
17
O3
16
O4
15
O5
14
O6
13
O7
12
CP
11
20
1
SO–20
DW SUFFIX
CASE 751
20
1
TSSOP–20
DT SUFFIX
CASE 948E
EIAJ–20
M SUFFIX
CASE 967
20
1
ORDERING INFORMATION
Device
1
OE
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
GND
MC74AC574N
MC74ACT574N
MC74AC574DW
MC74AC574DWR2
Package
PDIP–20
PDIP–20
SOIC–20
SOIC–20
SOIC–20
SOIC–20
TSSOP–20
Shipping
18 Units/Rail
18 Units/Rail
38 Units/Rail
1000 Tape & Reel
38 Units/Rail
1000 Tape & Reel
75 Units/Rail
Figure 1. Pinout: 20–Lead Packages Conductors
(Top View)
PIN ASSIGNMENT
PIN
D0–D7
CP
OE
O0–O7
FUNCTION
Data Inputs
Clock Pulse Input
3–State Output Enable Input
3–State Outputs
MC74ACT574DW
MC74ACT574DWR2
MC74AC574DT
MC74AC574DTR2
MC74ACT574DT
MC74ACT574DTR2
MC74AC574M
MC74AC574MEL
MC74ACT574M
MC74ACT574MEL
TSSOP–20 2500 Tape & Reel
TSSOP–20
75 Units/Rail
TSSOP–20 2500 Tape & Reel
EIAJ–20
EIAJ–20
EIAJ–20
EIAJ–20
40 Units/Rail
2000 Tape & Reel
40 Units/Rail
2000 Tape & Reel
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 278 of this data sheet.
Semiconductor Components Industries, LLC, 2001
271
May, 2001 – Rev. 6
Publication Order Number:
MC74AC574/D
MC74AC574, MC74ACT574
FUNCTION TABLE
D0 D1 D2 D3 D4 D5 D6 D7
CP
OE
O0 O1 O2 O3 O4 O5 O6 O7
Inputs
OE
H
H
H
H
L
L
L
L
CP
H
H
D
L
H
L
H
L
H
L
H
Internal
Q
NC
NC
L
H
L
H
NC
NC
Outputs
Function
F nction
On
Z
Z
Z
Z
L
H
NC
NC
Hold
Hold
Load
Load
Data Available
Data Available
No Change in Data
No Change in Data
Figure 2. Logic Symbol
FUNCTIONAL DESCRIPTION
The MC74AC574/74ACT574 consists of eight edge-
triggered flip–flops with individual D–type inputs and
3–state true outputs. The buffered clock and buffered Output
Enable are common to all flip–flops. The eight flip–flops
will store the state of their individual D inputs that meet the
setup and hold time requirements on the LOW–to–HIGH
Clock (CP) transition. With the Output Enable (OE) LOW,
the contents of the eight flip–flops are available at the
outputs. When OE is HIGH, the outputs go to the high
impedance state. Operation of the OE input does not affect
the state of the flip–flops.
D0
CP
C
Q
D
C
Q
D
C
Q
D
C
Q
D
D1
D2
D3
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Clock Transition
NC = No Change
D4
D5
D6
D7
C
Q
D
C
Q
D
C
Q
D
C
Q
D
OE
O0
O1
NOTE:
O2
O3
O4
O5
O6
O7
This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
MAXIMUM RATINGS*
Symbol
VCC
VIN
VOUT
IIN
IOUT
ICC
Tstg
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC VCC or GND Current per Output Pin
Storage Temperature
Value
–0.5 to +7.0
–0.5 to VCC +0.5
–0.5 to VCC +0.5
±20
±50
±50
–65 to +150
Unit
V
V
V
mA
mA
mA
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
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272
MC74AC574, MC74ACT574
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VIN, VOUT
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND)
VCC @ 3.0 V
tr, tf
Input Rise and Fall Time (Note 1)
′AC
Devices except Schmitt Inputs
VCC @ 4.5 V
VCC @ 5.5 V
tr, tf
TJ
TA
IOH
IOL
In ut
Input Rise and Fall Time (Note 2)
′ACT
Devices except Schmitt Inputs
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current – High
Output Current – Low
VCC @ 4.5 V
VCC @ 5.5 V
Parameter
′AC
′ACT
Min
2.0
4.5
0
–
–
–
–
–
–
–40
–
–
Typ
5.0
5.0
–
150
40
25
10
8.0
–
25
–
–
Max
6.0
V
5.5
VCC
–
–
–
–
ns/V
–
140
85
–24
24
°C
°C
mA
mA
ns/V
V
Unit
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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273
MC74AC574, MC74ACT574
DC CHARACTERISTICS
74AC
Symbol
Parameter
VCC
(V)
TA = +25°C
Typ
VIH
Minimum High Level
g
Input V l
I
Voltage
3.0
4.5
5.5
VIL
Maximum Low Level
Input V l
I
Voltage
3.0
4.5
5.5
VOH
Minimum High Level
g
Output V l
O
Voltage
3.0
4.5
5.5
3.0
4.5
5.5
VOL
Maximum Low Level
O
Output V l
Voltage
3.0
4.5
5.5
3.0
4.5
5.5
IIN
IOLD
IOHD
ICC
Maximum Input
Leakage Current
†Minimum Dynamic
†
y
Output Current
Maximum Q
Quiescent
Supply Current
5.5
55
5.5
5.5
5.5
55
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
–
–
–
0.002
0.001
0.001
–
–
–
–
–
–
–
74AC
TA =
–40°C to
+85°C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
±1
0
75
–75
80
µA
mA
mA
µA
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
VI = VCC, GND
VOLD = 1.65 V Max
VOHD = 3.85 V Min
VIN = VCC or GND
V
*VIN = VIL or VIH
–12 mA
IOH
–24 mA
–24 mA
IOUT = 50
µA
V
IOUT = –50
µA
V
VOUT = 0.1 V
or VCC – 0.1 V
V
Unit
Conditions
Guaranteed Limits
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
±0
1
–
–
8.0
80
VOUT = 0.1 V
or VCC – 0.1 V
V
V
* All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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