MCH55
Ceramic capacitors
Multi-layer ceramic chip capacitors
MCH55
(5750 (2220) size, chip capacitor)
Features
1) High capacitance
2) Achieved high capacitance by thin and multi layer technology
3) Lead-free plating terminal
4) No polarity
Quick Reference
The design and specifications are subject to change without prior notice. Please check the most recent technical
specifications prior to placing orders or using the product. For more detail information regarding packaging style code,
please check product designation.
High dielectric constant
Part No.
Size code
Temperature characteristics
code
Operating temp. range
(°C)
Rated voltage
(V)
50
Capacitance (pF)
Capacitance
tolerance
Thickness
(mm)
±
10%
(B)
−25
to
+85
25
16
50
CN
MCH55
5750
(2220)
±
15%
(R) (X7R)
−55
to
+125
25
16
±
15%
(X5R)
+30%
,
−80%
(F)
−55
to
+85
16
6.3
50
25
16
50
25
16
−25
to
+85
FN
+22%
,
−82%
(Y5V)
−30
to
+85
4,700,000 (E6 Series)
6,800,000 (E6 Series)
10,000,000 (E6 Series)
15,000,000 (E6 Series)
22,000,000 (E6 Series)
4,700,000 (E6 Series)
6,800,000 (E6 Series)
10,000,000 (E6 Series)
15,000,000 (E6 Series)
22,000,000 (E6 Series)
33,000,000 (E6 Series)
47,000,000 (E6 Series)
68,000,000 (E6 Series)
22,000,000 (E3 Series)
47,000,000 (E3 Series)
100,000,000 (E3 Series)
22,000,000 (E3 Series)
47,000,000 (E3 Series)
100,000,000 (E3 Series)
K(±10%)
2.0
±
0.2
2.5
±
0.3
2.0
±
0.2
2.3
±
0.2
2.5
±
0.3
2.0
±
0.2
2.5
±
0.3
2.0
±
0.2
2.3
±
0.2
2.5
±
0.3
2.0
±
0.2
2.3
±
0.2
2.0
±
0.2
M(±20%)
Z(+80%
,
−20%
)
2.5
±
0.3
2.0
±
0.3
2.5
±
0.3
External dimensions
(Unit : mm)
Product thickness(mm)
0.2Min.
T
2.0
±
0.2
2.3
±
0.2
2.5
±
0.3
T
5.7
±
0.4
5.0
±
0.4
1/9
MCH55
Ceramic capacitors
Product designation
Code Product thickness
P
P
P
2.0mm
2.3mm
2.5mm
Packing specification
Plustic tape (width 8mm, pitch 4mm)
Plustic tape (width 8mm, pitch 4mm)
Plustic tape (width 8mm, pitch 4mm)
Reel
φ180mm
(7in.)
φ180mm
(7in.)
φ180mm
(7in.)
Basic ordering unit (pcs.)
500
500
500
Reel (
φ180mm
) : compatible with EIAJ ET-7200A
Part No.
Packing Style
M C H
Rated voltage
Code Voltage
8
4
3
2
5
6.3V
10V
16V
25V
50V
5 5
3
F
N
1 0 7
Z
P
Nominal
capacitance
3-digit
designation
according
to IEC
Capacitance tolerance
Code
Tolerance
Temperature characteristic code
: Refer to quick reference table.
K
M
Z
±
10%
±
20%
+80%, −20%
Performance and test method
No.
1
Items
Appearance and
dimensions
Performance
Test Method
(As per JIS C 5101-1, JIS C 5101-10)
No marked defects shall be allowed As per 4.4 of JIS C 5101-1.
As per 4.5 of JIS C 5101-10
for appearance.
Dimensions shall be as specified the Using a Magnifier.
clause 4.
No dielectrical breakdown or other
damage shall be allowed.
2
Withstanding voltage
As per 4.6 of JIS C 5101-1.
As per 4.6.4 of JIS C 5101-10
Voltage shall be applied as per Table1.
Table 1
Charac-
Voltage
teristic
CN
250% Rated voltage
FN
Voltage shall be applied for 1 to 5s with
50mA charging and discharging current.
3
Insulation resistance
Not less than 10000MΩ or
100MΩ
µF,
whichever is less.
As per 4.5 of JIS C 5101-1.
As per 4.6.3 of JIS C 5101-10
Measurements shall be made after
60+/−5s period of the rated voltage
applied.
As per 4.7 of JIS C 5101-1.
As per 4.6.1 of JIS C 5101-10
Measurements shall be made under the
conditions specified in Table 2.
Table 2
Frequency Voltage
Charac-
teristic
CN
FN
< 10µF
−
> 10µF
4
Capacitance
Capacitance shall be
within specified tolerance range.
1+/−0.1kHz
120+/−24Hz
1+/−0.2Vrms. 0.5+/−0.2Vrms.
5 Dielectric loss tangent
CN
FN
tan
δ
< 7.5%
−
Rated voltage=16V
tan
δ
< 10.0%
−
As per 4.8 of
JIS C 5101-1.
As per 4.6.2 of
JIS C 5101-10
Measurements shall be made under the
conditions specified in Table 2.
2/9
MCH55
Ceramic capacitors
No.
Items
Performance
+/−10%
(−25°C to
+85°C)
+/−15%
(−55°C to
+85°C)
Test Method
(As per JIS C 5101-1, JIS C 5101-10)
As per 4.24 of JIS C 5101-1.
As per 4.7 of JIS C 5101-10
If required, measurements shall be made
at a given temperature.
6 Temperature
characteristic
CN
B
X5R
FN
+30%, −80%
(−25°C to
+85°C)
+22%, −82%
(−30°C to
+85°C)
As per 4.15.2 of JIS C 5101-1.
As per 4.11 of JIS C 5101-10
The solder specified in JIS Z 3282 H63A
shall be used. Ans the flux containing 25%
rosin and ethanol solution shall be used.
The specimens shall be immersed into the
solder at 235+/−5°C
for 2+/−0.5s
So that both end terminations are
completely under solder.
As per 4.14 of
JIS C 5101-1.
As per 4.10 of
JIS C 5101-10
The solder specified in JIS Z 3282. H63A
shall be used.
The specimens shall be immersed into the
solder at 260+/−5
°C
for
5+/−0.5s so that
both end terminations are completely
under the solder.
Pre-heating at 150+/−10
°C
for 1 to 2min
Initial measurements prior to test shall be
performed after the thermal
Pre-conditioning specified in Remarks (1).
Final measurements shall be made after the
specimens have been left at room
temperature as per Table3.
Table3
Charac-
teristic
CN, FN
Time
48+/−4 h
7 Solderability
More than 3/4 of each end
termination shall be covered with
new solder.
8 Resistance
Appearance
to soldering
heat
Without mechanical damage.
Change
rate from
initial value
CN
Within
+/−7.5%
FN
Within
+/−20%
Dielectric
loss
tangent
Insulation
resistance
Within specified initial value.
Within specified initial value.
Withstanding No defects shall be allowed.
voltage
9 End termination
adherence
Without peeling or sign of
peeling shall be allowed
on the end terminations.
As per 4.13 of JIS C 5101-1.
As per 4.8 ofJIS C 5101-10
A 5N weight for
10+/−1s shall be applied
to the soldered specimens as shown by the
arrow mark in the below sketch.
Applied pressure
Substrate
Capacitor
3/9
MCH55
Ceramic capacitors
No.
10
Bending
strength
Items
Performance
Test Method
(As per JIS C 5101-1, JIS C 5101-10)
As per 4.35 of JIS C 5101-1.
As per 4.9 of JIS C 5101-10
Glass epoxy board with soldered
specimens shall be bent till 1mm by
1.0mm/s.
As per 4.17 of
JIS C 5101-1.
The specimens shall be soldered on the
specified test jig.
Initial measurements shall be made after
the thermal pre-conditioning specified in
Remarks(1).
Final measurements shall be made after the
specimens have been left at room
temperature as per Table3.
[Condition]
Directions : 2h each X, Y and Z directions
Total : 6h
Frequency range : 10 to 55 to 10Hz(1min)
Applitude : 1.5mm
(shall not exceed acceleration196m/s
2
)
Table3
Charac-
teristic
CN, FN
Time
48+/−4 h
Appearance
Without mechanical damage.
11 Vibration
Appearance
Change
rate from
initial value
Without mechanical damage.
CN
Within
+/−7.5%
FN
Within
+/−20%
Dielectric
loss
tangent
Within specified initial value.
12 Temperature
Appearance
cycling
Change
rate from
initial value
Without mechanical damage.
CN
Within
+/−7.5%
FN
Within
+/−20%
Dielectric
loss
tangent
Insulation
resistance
Within specified initial value.
Within specified initial value.
As per 4.16 of JIS C 5101-1
As per 4.12 of JIS C 5101-10
The specimens shall be soldered on the test
jig shown in Remarks.
Temperature cycle : 100cycles Initial
measurements prior to test shall be
performed after the thermal
per-conditioning specified in Remarks (1).
Final measurements shall be made after the
specimens have been left at room
temperature as per Table3.
Test condition
Step
1
2
3
4
Temp. (°C)
Min operating temp.
Room temp.
Max operating temp.
Room temp.
Table3
Charac-
teristic
CN, FN
Time
48+/−4 h
Time (min)
30+/−3
<
3
−
30+/−3
<
3
−
Withstanding No defects shall be allowed.
voltage
4/9
MCH55
Ceramic capacitors
No.
13
Humidity
(Steady)
Items
Performance
Test Method
(As per JIS C 5101-1, JIS C 5101-10)
Appearance Without mechanical damage.
Change
rate from
initial value
CN
FN
Dielectric
tangent
CN
FN
As per 4.22 of
JIS C 5101-1
As per JIS C 5101-10
Test temperature : 60+/−2°C
Within
+/−12.5%
Relative humidity : 90 to 95%
Test time
: 500
+24/−0
h
Initial measurements prior to test shall
Within
+/−30%
be made after the voltage
pre-conditioning specified in
Less than 200% of
Remarks (2).
initial spec.
Final measurements have been left at
room temperature as per Table3.
Less than 150% of
initial spec.
Table3
Charac-
teristic
CN, FN
Time
Insulation
resistance
Not less than 1000MΩ or
10MΩ
µF,
whichever is less.
48+/−4 h
14 Humidity
life test
Appearance Without mechanical damage.
Change
rate from
initial value
Dielectric
loss
tangent
Insulation
resistance
As per 4.22 of JIS C 5101-1
As per 4.14 of JIS C 5101-10
CN
Within
+/−12.5%
Test temperature : 60+/−2°C
Relative humidity : 90 to 95%
Voltage : Rated voltage
FN
Within
+/−30%
Test time : 500
+24/−0
h
Less than 200% of
Initial measurements prior to test shall
CN
be made after the voltage
initial spec.
pre-conditioning specified in
Less than 150% of
Remarks (2).
FN
initial spec.
Final measurements shall be made after
the specimens have been left at room
Not less than 500MΩ or
temperature as per Table3.
5MΩ
µF,
whichever is less.
Table3
Charac-
teristic
CN, FN
Time
48+/−4 h
5/9
