Obsolete Device
Replacement Device:
MCP3905A/MCP3906A
MCP3905/06
Energy-Metering ICs with Active (Real) Power Pulse Output
Features
• Supplies active (real) power measurement for
single-phase, residential energy-metering
• Supports the IEC 62053 International Energy
Metering Specification and legacy IEC 1036/
61036/687 Specifications
• Two multi-bit, Digital-to-Analog Converters
(DACs), second-order, 16-bit, Delta-Sigma
Analog-to-Digital Converters (ADCs)
• 0.1% typical measurement error over
500:1
dynamic range
(MCP3905)
• 0.1% typical measurement error over
1000:1
dynamic range
(MCP3906)
• Programmable Gain Amplifier (PGA) for small-
signal inputs supports low-value shunt current
sensor
-
16:1
PGA -
MCP3905
-
32:1
PGA -
MCP3906
• Ultra-low drift on-chip reference: 15 ppm/°C
(typical)
• Direct drive for electromagnetic mechanical
counter and two-phase stepper motors
• Low I
DD
of 4 mA (typical)
• Tamper output pin for negative power indication
• Industrial Temperature Range: -40°C to +85°C
• Supplies instantaneous active (real) power on
HF
OUT
for meter calibration
Description
The MCP3905/06 devices are energy-metering ICs
designed to support the IEC 62053 International
Metering Standard Specification. They supply a
frequency output proportional to the average active
(real) power, as well as a higher-frequency output
proportional to the instantaneous power for meter
calibration. They include two 16-bit, delta-sigma ADCs
for a wide range of I
B
and I
MAX
currents and/or small
shunt (< 200 µOhms) meter designs. It includes an
ultra-low drift voltage reference with < 15 ppm/°C
through a specially designed band gap temperature
curve for the minimum gradient across the industrial
temperature range. A fixed-function DSP block is
on-chip for active (real) power calculation. Strong
output drive for mechanical counters are on-chip to
reduce field failures and mechanical counter sticking. A
no-load threshold block prevents any current creep
measurements. A Power-On Reset (POR) block
restricts meter performance during low-voltage
situations. These accurate energy-metering ICs with
high field reliability are available in the industry-
standard pinout.
Package Type
24-Pin SSOP
DV
DD
HPF
AV
DD
NC
CH0+
CH0-
CH1-
CH1+
MCLR
REFIN/OUT
A
GND
F2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
F
OUT0
F
OUT1
HF
OUT
D
GND
NEG
NC
OSC2
OSC1
G0
G1
F0
F1
US Patents Pending
Functional Block Diagram
G0 G1
HPF
OSC1 OSC2
HF
OUT
CH0+
CH0-
+
PGA
–
16-bit
Multi-level
ΔΣ
ADC
HPF1
F2
F1
F0
F
OUT0
F
OUT1
NEG
REFIN/
OUT
2.4V
Reference
X
16-bit
Multi-level
ΔΣ
ADC
HPF1
LPF1
E-to-F
conversion
CH1+
CH1-
+
–
POR
MCLR
©
2009 Microchip Technology Inc.
DS21948E-page 1
MCP3905/06
NOTES:
DS21948E-page 2
©
2009 Microchip Technology Inc.
MCP3905/06
1.0
ELECTRICAL
CHARACTERISTICS
† Notice:
Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings †
V
DD
...................................................................................7.0V
Digital inputs and outputs w.r.t. A
GND
........ -0.6V to V
DD
+0.6V
Analog input w.r.t. A
GND
..................................... ....-6V to +6V
V
REF
input w.r.t. A
GND
.............................. -0.6V to V
DD
+0.6V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300°C
ESD on the analog inputs (HBM,MM) .................5.0 kV, 500V
ESD on all other pins (HBM,MM) ........................5.0 kV, 500V
ELECTRICAL CHARACTERISTICS
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AV
DD
= DV
DD
= 4.5V – 5.5V,
Internal V
REF
, HPF turned on (AC mode), A
GND
, D
GND
= 0V, MCLK = 3.58 MHz; T
A
= -40°C to +85°C.
Parameter
Sym
Min
—
—
Typ.
0.1
Max
—
Units
Comment
Overall Measurement Accuracy
Energy Measurement Error
E
No-Load Threshold/
NLT
—
Minimum Load
Phase Delay Between
—
Channels
AC Power Supply
AC PSRR
—
Rejection Ratio
(Output Frequency Variation)
DC Power Supply
DC PSRR
—
0.01
—
% F
OUT
HPF = 1, Gain = 1 (Note
3)
Rejection Ratio
(Output Frequency Variation)
System Gain Error
—
3
10
% F
OUT
Note 2, Note 5
ADC/PGA Specifications
—
2
5
mV
Referred to Input
Offset Error
V
OS
Gain Error Match
—
0.5
—
% F
OUT
Note 8
Internal Voltage Reference
Voltage
—
2.4
—
V
Tolerance
—
±2
—
%
Tempco
—
15
—
ppm/°C
Note 1:
Measurement error = (Energy Measured By Device - True Energy)/True Energy * 100%. Accuracy is
measured with signal (±660 mV) on Channel 1. F
OUT0
, F
OUT1
pulse outputs. Valid from 45 Hz to 65 Hz.
See
Section 2.0 “Typical Performance Curves”
for higher frequencies and increased dynamic range.
2:
Does not include internal V
REF
. Gain = 1, CH0 = 470 mVDC, CH1 = 660 mVDC, difference between
measured output frequency and expected transfer function.
3:
Percent of HF
OUT
output frequency variation; Includes external V
REF
= 2.5V, CH1 = 100 mVRMS @
50 Hz, CH2 = 100 mVRMS @ 50 Hz, AV
DD
= 5V + 1V
pp
@ 100 Hz. DC PSRR: 5V ±500 mV.
4:
Error applies down to 60° lead (PF = 0.5 capacitive) and 60° lag (PF = 0.5 inductive).
5:
Refer to
Section 4.0 “Device Overview”
for complete description.
6:
Specified by characterization, not production tested.
7:
1 MCLK period at 3.58 MHz is equivalent to less than <0.005 degrees at 50 or 60 Hz.
8:
Gain error match is measured from CH0 G = 1 to any other gain setting.
% F
OUT
Channel 0 swings 1:500 range,
MCP3905 only (Note
1, Note 4)
0.1
—
% F
OUT
Channel 0 swings 1:1000 range,
MCP3906 only (Note
1, Note 4)
0.0015
—
% F
OUT
Disabled when F2, F1, F0 = 0, 1, 1
Max.
(Note
5, Note 6)
—
1/MCLK
s
HPF = 0 and 1, < 1 MCLK
(Note
4, Note 6, Note 7)
0.01
—
% F
OUT
F2, F1, F0 = 0, 1, 1 (Note
3)
©
2009 Microchip Technology Inc.
DS21948E-page 3
MCP3905/06
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AV
DD
= DV
DD
= 4.5V – 5.5V,
Internal V
REF
, HPF turned on (AC mode), A
GND
, D
GND
= 0V, MCLK = 3.58 MHz; T
A
= -40°C to +85°C.
Parameter
Sym
Min
Typ.
Max
Units
Comment
Reference Input
Input Range
2.2
—
2.6
V
Input Impedance
3.2
—
—
kΩ
Input Capacitance
—
—
10
pF
Analog Inputs
Maximum Signal Level
—
—
±1
V
CH0+,CH0-,CH1+,CH1- to A
GND
Differential Input Voltage
—
—
±470/G
mV
G = PGA Gain on Channel 0
Range Channel 0
Differential Input Voltage
—
—
±660
mV
Range Channel 1
Input Impedance
390
—
—
kΩ
Proportional to 1/MCLK frequency
Bandwidth
—
14
—
kHz
Proportional to MCLK frequency,
(Notch Frequency)
MCLK/256
Oscillator Input
Frequency Range
MCLK
1
—
4
MHz
Power Specifications
Operating Voltage
4.5
—
5.5
V
AV
DD,
DV
DD
I
DD,A
I
DD,A
—
2.7
3.0
mA
AV
DD
pin only
I
DD,D
—
1.2
2.0
mA
DV
DD
pin only
I
DD,D
Note 1:
Measurement error = (Energy Measured By Device - True Energy)/True Energy * 100%. Accuracy is
measured with signal (±660 mV) on Channel 1. F
OUT0
, F
OUT1
pulse outputs. Valid from 45 Hz to 65 Hz.
See
Section 2.0 “Typical Performance Curves”
for higher frequencies and increased dynamic range.
2:
Does not include internal V
REF
. Gain = 1, CH0 = 470 mVDC, CH1 = 660 mVDC, difference between
measured output frequency and expected transfer function.
3:
Percent of HF
OUT
output frequency variation; Includes external V
REF
= 2.5V, CH1 = 100 mVRMS @
50 Hz, CH2 = 100 mVRMS @ 50 Hz, AV
DD
= 5V + 1V
pp
@ 100 Hz. DC PSRR: 5V ±500 mV.
4:
Error applies down to 60° lead (PF = 0.5 capacitive) and 60° lag (PF = 0.5 inductive).
5:
Refer to
Section 4.0 “Device Overview”
for complete description.
6:
Specified by characterization, not production tested.
7:
1 MCLK period at 3.58 MHz is equivalent to less than <0.005 degrees at 50 or 60 Hz.
8:
Gain error match is measured from CH0 G = 1 to any other gain setting.
TEMPERATURE CHARACTERISTICS
Electrical Specifications:
Unless otherwise indicated, V
DD
= 4.5V – 5.5V, A
GND
, D
GND
= 0V.
Parameters
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 24L-SSOP
Note:
θ
JA
—
73
—
°C/W
The MCP3905/06 operate over this extended temperature range, but with reduced performance. In any
case, the Junction Temperature (T
J
) must not exceed the Absolute Maximum specification of +150°C.
T
A
T
A
T
A
-40
-40
-65
—
—
—
+85
+125
+150
°C
°C
°C
Note
Sym
Min
Typ
Max
Units
Conditions
DS21948E-page 4
©
2009 Microchip Technology Inc.
MCP3905/06
TIMING CHARACTERISTICS
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AV
DD
= DV
DD
= 4.5V – 5.5V,
A
GND
, D
GND
= 0V, MCLK = 3.58 MHz; T
A
= -40°C to +85°C.
Parameter
Frequency Output
F
OUT0
and F
OUT1
Pulse Width
(Logic-Low)
HF
OUT
Pulse Width
F
OUT0
and F
OUT1
Pulse Period
HF
OUT
Pulse Period
F
OUT0
to F
OUT1
Falling-Edge Time
F
OUT0
to F
OUT1
Min Separation
F
OUT0
and F
OUT1
Output High Voltage
F
OUT0
and F
OUT1
Output Low Voltage
HF
OUT
Output High Voltage
HF
OUT
Output Low Voltage
High-Level Input Voltage
(All Digital Input Pins)
Low-Level Input Voltage
(All Digital Input Pins)
Input Leakage Current
Pin Capacitance
Note 1:
2:
3:
t
FW
t
HW
t
FP
t
HP
t
FS2
t
FS
V
OH
V
OL
V
OH
V
OL
V
IH
V
IL
—
Sym
Min
Typ
275
90
Max
—
—
Units
ms
ms
s
s
Comment
984376 MCLK periods
(Note 1)
322160 MCLK periods
(Note 2)
—
Refer to
Equation 4-1
Refer to
Equation 4-2
—
—
0.5 t
FP
4/MCLK
—
—
—
—
—
—
—
—
—
—
—
4.5
—
V
V
V
V
V
V
µA
pF
I
OH
= 10 mA, DV
DD
= 5.0V
I
OL
= 10 mA, DV
DD
= 5.0V
I
OH
= 5 mA, DV
DD
= 5.0V
I
OL
= 5 mA, DV
DD
= 5.0V
DV
DD
= 5.0V
DV
DD
= 5.0V
V
IN
= 0, V
IN
= DV
DD
Note 3
0.5
—
4.0
—
0.5
—
2.4
—
—
—
0.85
±3
10
If output pulse period (t
FP
) falls below 984376*2 MCLK periods, then t
FW
= 1/2 t
FP
.
If output pulse period (t
HP
) falls below 322160*2 MCLK periods, then t
HW
= 1/2 t
HP
.
Specified by characterization, not production tested.
t
FP
t
FW
F
OUT0
t
FS
t
FS2
F
OUT1
t
HW
HF
OUT
t
HP
NEG
FIGURE 1-1:
Output Timings for Pulse Outputs and Negative Power Pin.
©
2009 Microchip Technology Inc.
DS21948E-page 5
