型号
  • 型号
  • 关键词
首页 > 器件类别 > 半导体 > 模拟混合信号IC

MCZ33904D3EKR2

SYSTEM BASIS CHIP 2X 3.3 V/400M

器件类别：半导体    模拟混合信号IC   

厂商名称：NXP(恩智浦)

厂商官网：https://www.nxp.com

下载文档
参数 预览
MCZ33904D3EKR2 在线购买

供应商：

器件：MCZ33904D3EKR2

价格：-

最低购买：-

库存：点击查看

点击购买

器件参数
参数名称
属性值
应用
系统基础芯片
接口
CAN
电压 - 电源
5.5 V ~ 28 V
文档预览
NXP Semiconductors
Data Sheet: Advance Information
Document Number: MC33903_4_5
Rev. 14.0, 2/2018
SBC Gen2 with CAN high speed and
LIN interface
The 33903/4/5 is the second generation family of the System Basis Chip (SBC).
It combines several features and enhances present module designs. The device
works as an advanced power management unit for the MCU with additional
integrated circuits such as sensors and CAN transceivers. It has a built-in
enhanced high-speed CAN interface (ISO11898-2 and -5) with local and bus
failure diagnostics, protection, and fail-safe operation modes. The SBC may
include zero, one or two LIN 2.1 interfaces with LIN output pin switches. It
includes up to four wake-up input pins that can also be configured as output
drivers for flexibility. This device is powered by SMARTMOS technology.
This device implements multiple Low-power (LP) modes, with very low-current
consumption. In addition, the device is part of a family concept where pin
compatibility adds versatility to module design.
The 33903/4/5 also implements an innovative and advanced fail-safe state
machine and concept solution.
33903/
33903/4/5
SYSTEM BASIS CHIP
EK Suffix (Pb-free)
98ASA10556D
32-PIN SOIC
EK Suffix (Pb-free)
98ASA10506D
54-PIN SOIC
Features
• Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with
possibility of usage external PNP to extend current capability and share power
dissipation
• Voltage, current, and temperature protection
• Extremely low quiescent current in LP modes
• Fully-protected embedded 5.0 V regulator for the CAN driver
• Multiple undervoltage detections to address various MCU specifications and
system operation modes (i.e. cranking)
• Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs, with
overcurrent detection and undervoltage protection
• MUX output pin for device internal analog signal monitoring and power supply
monitoring
• Advanced SPI, MCU, ECU power supply, and critical pins diagnostics and
monitoring.
• Multiple wake-up sources in LP modes: CAN or LIN bus, I/O transition,
automatic timer, SPI message, and V
DD
overcurrent detection.
• ISO11898-5 high-speed CAN interface compatibility for baud rates of 40 kb/s
to 1.0 Mb/s
• Scalable product family of devices ranging from 0 to 2 LINs which are
compatible to J2602-2 and LIN 2.1
Applications
•
•
•
•
•
•
•
Air
craft and marine systems
Automotive and robotic systems
Farm equipment
Industrial actuator controls
Lamp and inductive load controls
DC motor control applications requiring diagnostics
Applications where high-side switch control is
require
d
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© NXP B.V. 2018.
Table of Contents
1. Simplified application diagrams ..................................................................................................................................................... 3
2. Orderable part ................................................................................................................................................................................ 7
3. Internal block diagrams .................................................................................................................................................................. 9
4. Pin Connections ........................................................................................................................................................................... 11
4.1. Pinout diagram ....................................................................................................................................................................... 11
5. Electrical characteristics .............................................................................................................................................................. 16
5.1. Maximum ratings .................................................................................................................................................................... 16
5.2. Static electrical characteristics ............................................................................................................................................... 18
5.3. Dynamic electrical characteristics .......................................................................................................................................... 26
5.4. Timing diagrams .................................................................................................................................................................... 29
6. Functional description .................................................................................................................................................................. 32
6.1. Introduction ............................................................................................................................................................................ 32
6.2. Functional pin description ...................................................................................................................................................... 32
7. Functional device operation ......................................................................................................................................................... 36
7.1. Mode and state description .................................................................................................................................................... 36
7.2. LP modes ............................................................................................................................................................................... 37
7.3. State diagram ......................................................................................................................................................................... 39
7.4. Mode change ......................................................................................................................................................................... 40
7.5. Watchdog operation ............................................................................................................................................................... 40
7.6. Functional block operation versus mode ............................................................................................................................... 43
7.7. Illustration of device mode transitions .................................................................................................................................... 44
7.8. Cyclic sense operation during LP modes ............................................................................................................................... 45
7.9. Cyclic INT operation during LP VDD on mode ....................................................................................................................... 47
7.10. Behavior at power up and power down ................................................................................................................................ 48
7.11. Fail-safe operation ............................................................................................................................................................... 51
8. CAN interface .............................................................................................................................................................................. 55
8.1. CAN interface description ...................................................................................................................................................... 55
8.2. CAN bus fault diagnostic ........................................................................................................................................................ 58
9. LIN block ...................................................................................................................................................................................... 62
9.1. LIN interface description ........................................................................................................................................................ 62
9.2. LIN operational modes ........................................................................................................................................................... 63
10. Serial peripheral interface .......................................................................................................................................................... 64
10.1. High level overview .............................................................................................................................................................. 64
10.2. Detail operation .................................................................................................................................................................... 64
10.3. Detail of control bits and register mapping ........................................................................................................................... 68
10.4. Flags and device status ....................................................................................................................................................... 84
11. Typical applications ................................................................................................................................................................... 92
12. Packaging ................................................................................................................................................................................ 100
12.1. SOIC 32 package dimensions ........................................................................................................................................... 100
12.2. SOIC 54 package dimensions ........................................................................................................................................... 103
13. Revision history ....................................................................................................................................................................... 106
33903/4/5
2
NXP Semiconductors
SIMPLIFIED APPLICATION DIAGRAMS
1
Simplified application diagrams
V
BAT
D1
33905D
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
TXD-L2
RXD-L2
V
DD
SPI
A/D
MCU
I/O-1
CANH
SPLIT
CAN Bus
LIN Bus
LIN Bus
CANL
LIN-TERM 1
LIN-1
LIN-TERM 2
LIN-2
Figure 1. 33905D simplified application diagram
V
BAT
D1
33905S
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L
RXD-L
V
DD
SPI
A/D
MCU
I/O-1
CANH
SPLIT
CAN Bus
V
BAT
CANL
LIN-T
LIN
I/O-3
LIN Bus
Figure 2. 33905S simplified application diagram
33903/4/5
NXP Semiconductors
3
SIMPLIFIED APPLICATION DIAGRAMS
V
BAT
D1
33904
Q2
(5.0 V/3.3 V)
* = Optional
Q1*
VBAUX VCAUX VSUP1 VAUX VE VB VDD
VSUP2
SAFE
DBG
GND
VSENSE
I/O-0
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
V
DD
SPI
A/D
MCU
I/O-1
CANH
V
BAT
SPLIT
CAN Bus
CANL
I/O-2
I/O-3
Figure 3. 33904 simplified application diagram
V
BAT
D1
33903
VSUP1
DBG
SAFE
GND
VSUP2
VDD
RST
V
DD
INT
MOSI
SCLK
MISO
CS
SPI
I/O-0
MCU
CANH
CAN Bus
5V-CAN
TXD
RXD
SPLIT
CANL
Figure 4. 33903 simplified application diagram
33903/4/5
4
NXP Semiconductors
SIMPLIFIED APPLICATION DIAGRAMS
V
BAT
D1
33903D
Q1*
* = Optional
V
DD
VSUP
SAFE
DBG
GND
VSENSE
IO-0
VE VB VDD
RST
INT
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
TXD-L2
RXD-L2
SPI
A/D
MCU
CANH
SPLIT
CAN Bus
LIN Bus
LIN Bus
CANL
LIN-T1/I/O-2
LIN-1
LIN-T2/IO-3
LIN-2
Figure 5. 33903D simplified application diagram
V
BAT
D1
33903S
Q1*
* = Optional
VSUP
SAFE
DBG
GND
VSENSE
IO-0
VE VB
VDD
RST
INT
V
DD
MOSI
SCLK
MISO
CS
MUX-OUT
5V-CAN
TXD
RXD
TXD-L1
RXD-L1
SPI
A/D
MCU
CANH
SPLIT
V
BAT
CAN Bus
LIN Bus
CANL
LIN-T1/I/O-2
LIN-1
I/O-3
Figure 6. 33903S simplified application diagram
33903/4/5
NXP Semiconductors
5
查看更多>
热门器件
热门资源推荐
PIC单片机控制的遥控防盗报警器电路 红外线探测报警器 使用ESP8266从NTP服务器获取时间并在OLED显示器上显示 开关电源的基本组成及工作原理 用NE555制作定时器 RS-485基础知识:处理空闲总线条件的两种常见方法 如何构建一个触摸传感器电路 如何调制IC555振荡器 基于ICL296的大电流开关稳压器电源电路 基于TDA2003的简单低功耗汽车立体声放大器电路
器件捷径:
L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ
需要登录后才可以下载。
登录取消