OKI Semiconductor
MD56V82160
4-Bank
4,194,304-Word
16-Bit SYNCHRONOUS DYNAMIC RAM
FEDD56V82160-01
Issue Date:Feb.14, 2008
DESCRIPTION
The MD56V82160 is a 4-Bank
4,194,304-word
16-bit Synchronous dynamic RAM.
The device operates at 3.3 V. The inputs and outputs are LVTTL compatible.
FEATURES
•
Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
•
4-Bank
4,194,304-word
16-bit configuration
•
Single 3.3 V power supply,
0.3
V tolerance
•
Input : LVTTL compatible
•
Output : LVTTL compatible
•
Refresh : 8192 cycles/64 ms
•
Programmable data transfer mode
-
CAS
Latency (2, 3)
- Burst Length (1, 2, 4, 8, Full Page)
- Data scramble (sequential, interleave)
•
A
uto-refresh, Self-refresh capability
•
Lead-Free Package:
54-pin 400 mil plastic TSOP (TypeII)
(
TSOP(2)54-P-400-0.80-K
)
(Product: MD56V82160-xxTAZ03)
xx indicates speed rank.
PRODUCT FAMILY
Family
CL-tRP-tRCD
3-3-3
2-3-3
Max.
Frequency
166 MHz
133 MHz
Access Time (Max.)
t
AC2
−
5.4 ns
t
AC3
5.4 ns
−
MD56V82160-6
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FEDD56V82160-01
OKI Semiconductor
MD56V82160
PIN CONFIGURATION (TOP VIEW)
V
CC
1
DQ1 2
V
CC
Q 3
DQ2 4
DQ3 5
V
SS
Q 6
DQ4 7
DQ5 8
V
CC
Q 9
DQ6 10
DQ7 11
V
SS
Q 12
DQ8 13
V
CC
14
LDQM 15
WE
16
CAS
17
RAS
18
CS
19
BA0 20
BA1 21
A10(AP) 22
A0 23
A1 24
A2 25
A3 26
V
CC
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
V
SS
DQ16
V
SS
Q
DQ15
DQ14
V
CC
Q
DQ13
DQ12
V
SS
Q
DQ11
DQ10
V
CC
Q
DQ9
V
SS
NC
UDQM
CLK
CKE
A12
A11
34 A9
33 A8
32 A7
31 A6
30 A5
29 A4
28 V
SS
54-Pin Plastic TSOP(II)
(K Type)
Pin Name
CLK
CS
CKE
A0–A12
BA0,1
RAS
CAS
WE
Function
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Pin Name
UDQM, LDQM
DQi
V
CC
V
SS
V
CC
Q
V
SS
Q
NC
Function
Data Input/ Output Mask
Data Input/ Output
Power Supply (3.3 V)
Ground (0 V)
Data Output Power Supply (3.3 V)
Data Output Ground (0 V)
No Connection
Note : The same power supply voltage must be provided to every V
CC
pin and V
CC
Q pin.
The same GND voltage level must be provided to every V
SS
pin and V
SS
Q pin.
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FEDD56V82160-01
OKI Semiconductor
MD56V82160
PIN DESCRIPTION
CLK
CS
Fetches all inputs at the
“H”
edge.
Disables or enables device operation by asserting or deactivating all inputs except CLK, CKE,
UDQM and LDQM.
Masks system clock to deactivate the subsequent CLK operation.
If CKE is deactivated, system clock will be masked so that the subsequent CLK operation is
deactivated. CKE should be asserted at least one cycle prior to a new command.
Row & column multiplexed.
Row address
: RA0
–
RA12
Column Address
: CA0
–
CA8
Slects bank to be activated during row address latch time and selects bank for precharge and
read/write during column address latch time.
CKE
Address
BA0, BA1
RAS
CAS
WE
UDQM,
LDQM
DQi
Masks the read data of two clocks later when UDQM and LDQM are set
“H”
at the
“H”
edge of the
clock signal. Masks the write data of the same clock when UDQM and LDQM are set
“H”
at the
“H”
edge of the clock signal. UDQM controls upper byte and LDQM controls lower byte.
Data inputs/outputs are multiplexed on the same pin.
Functionality depends on the combination. For details, see the function truth table.
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FEDD56V82160-01
OKI Semiconductor
MD56V82160
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage on Any Pin Relative to V
SS
V
CC
Supply Voltage
Storage Temperature
Power Dissipation
Short Circuit Output Current
Operating Temperature
Symbol
V
IN
, V
OUT
V
CC
, V
CC
Q
T
stg
P
D*
I
OS
T
opr
Value
–0.5
to 4.6
–0.5
to 4.6
–65
to 150
1000
50
0 to 70
Unit
V
V
°C
mW
mA
°C
*: Ta = 25C
Recommended Operating Conditions
(Voltages referenced to V
SS
= V
SS
Q = 0 V)
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
, V
CC
Q
V
IH
V
IL
Min.
3.0
2.0
0.3
Typ.
3.3
0
Max.
3.6
V
CC
+ 0.3
0.8
Unit
V
V
V
V
IH
(MAX)=4.6V AC for pulse width
10ns acceptable.
V
IL
(MIN)=−1.5V AC for pulse width
10ns acceptable.
Pin Capacitance
(V
bias
= 1.4 V, Ta = 25°C, f = 1 MHz)
Parameter
Input Capacitance (CLK)
Input Capacitance
(RAS,
CAS, WE, CS,
CKE, UDQM, LDQM,)
Symbol
C
CLK
Min.
2
Max.
3
Unit
pF
C
IN
1.5
4.5
pF
Input Capacitance
(Address)
Input/Output Capacitance (DQ1
–
DQ16)
C
ADD
1.5
3
C
OUT
2
4.5
pF
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FEDD56V82160-01
OKI Semiconductor
MD56V82160
DC Characteristics
Parameter
Output High
Voltage
Output Low
Voltage
Input Leakage
Current
Output Leakage
Current
Operating Current
Symbol
Bank
VOH
VOL
ILI
ILO
One Bank
Active
Condition
CKE
MD56V82160-6
Others
IOH =1.0mA
IOL =1.0mA
Min.
2.4
5
5
Max.
0.4
5
5
Unit Note
V
V
A
A
Any input 0V
VIN
V
CC
+ 0.3V,
all other pins are not under test = 0V
ICC1
ICC2P
ICC2PS
tRC = Min.
BL=2
IO=0mA
150
15
mA
Precharge
Standby Current
(Power-Down)
CKE = VIL(max) tCC = 10ns
CKE
＆
CLK =
tCC =
∞
VIL(max)
CS = VIH(min)
mA
5
ICC2N
Precharge
Standby Current
(Non Power Down)
tCC = 10ns
ALL
Banks CKE = V
IH(min) Input
Signals
Precharge
changed one
during20ns.
CLK = VIL(max)
are
time
40
mA
Banks CKE = V
t
=
∞
ICC2NS ALL
IH(min) CC
Precharge
Input
Signals
stable.
Active Standby
Current
(Power-Down)
ICC3P
ICC3PS
One Bank
Active
CKE= VIL(max)
tCC = 10ns
are
30
35
mA
20
CKE
＆
CLK =
tCC =
∞
VIL(max)
CS = VIH(min)
ICC3N
Active Standby
Current
(Non Power Down)
ICC3NS
One Bank
Active
CKE = VIH(min)
tCC = 10ns
Input
Signals
changed one
during20ns.
CLK = VIL(max)
are
time
65
mA
Operating
Current(Burst)
Refresh Current
Self-Refresh
Current
ICC4
ICC5
ICC6
4Banks
Activated
CKE = VIH(min) tCC =
∞
Input
Signals
stable.
IO=0mA
CKE=0.2V
Page Burst
tCCD=2CLKs
are
45
165
200
6
mA
mA
mA
1
2
tARFC = tARFC(min.)
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted,input swing level is VIH/VIL=VCCQ/VSSQ.
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