MDT10P05
MDT10P05
1. General Description
T h i s E P R O M -B a s e d 8-bit micro -controller
uses a fully static CMOS design technology
combines higher speeds and smaller size
with the low power and high noise immunity.
On chip memory system includes 0.5 K
word s o f R O M , a nd 3 2 b y t e s o f s t a t i c R A M .
u
4 types of oscillator can be selected by
p r o g r a m m ing option (Internal Capacitor
about
10p ):
R C
－
L o w c o s t R C o s c i l l a t o r
L F X T
－
Low frequency crystal oscillator
X T A L
－
Standard crystal oscillator
H F X T
－
High frequency crystal oscillator
u
4 oscillator start-u p t i m e c a n b e
selected by programming option:
150
2. Features
The followings are some of the features on
the hardware and software :
µ
s , 2 0 m s , 4 0 m s , 8 0 m s
u
O n-c h i p R C o s c i l l a t o r b a s e d W a t c h d o g
Timer(WDT) can be operated freely
u
12 I/O pins with their own independent
direction control
u
Fully CMOS static design
u
8 -bit data bus
u
On chip ROM size : 512 words
u
Internal RAM size : 32 bytes
(25 general purpose registers, 7 special
r e g i s ters)
The application areas of this MDT10P05
range from appliance motor control and
high speed automotive to low power remote
transmitters/receivers,
pointing
devices,
3. Applications
u
36 single word instructions
u
1 4 -bit instructions
u
2 -level stacks
u
Operating voltage : 2.3V ~ 5.5 V
u
Operating frequency : 0 ~ 20 MHz
u
The most fast execution time is 200 ns
under
20
MHz
in
all
single
the
cycle
branch
and telecommunications processors, such
as Remote controller, small instruments,
chargers,
toy,
automobile
and
PC
peripheral … etc.
instructions
instructions
except
u
A d d r e ssing modes include direct,
indirect and relative addressing modes
u
P o w e r-o n R e s e t
u
P o w e r e d g e -d e t e c t o r R e s e t
u
Sleep Mode for power saving
u
8 -bit real time clock/counter(RTCC) with
8 -b i t p r o g r a m m a b l e p r e s c a l e r
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P. 1
2004/1
VER1.2
MDT10P05
4. Pin Assignment
PA2
PA3
RTCC
/MCLR
1
2
3
4
18
17
16
15
14
13
12
11
10
PA1
PA0
OSC1
OSC2
V
dd
PB7
PB6
PB5
PB4
V
ss
5
PB0
PB1
PB2
PB3
6
7
8
9
5. Pin Function Description
Pin Name
PA0~PA3
PB0~PB7
RTCC
/MCLR
OSC1
OSC2
V
dd
V
ss
I/O
I/O
I/O
I
I
I
O
Function Description
Port A, TTL input level
Port B, TTL input level
Real Time Clock/Counter, Schmitt Trigger input levels
Master Clear, Schmitt Trigger input levels
Oscillator Input
Oscillator Output
Power supply
Ground
6. Memory Map
(A) Register Map
Address
00
01
02
03
Description
Indire c t A d d r e s s i n g R e g i s t e r
RTCC
PC
STATUS
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P. 2
2004/1
VER1.2
MDT10P05
Address
04
05
06
07~1F
MSR
Port A
Port B
Internal RAM, General Purpose Register
Description
(1) IAR ( Indirect Address Register) : R0
(2) RTCC (Real Time Counter/Counter Register) : R1
( 3 ) P C ( P r o g r a m Counter) : R2
Write PC, CALL --- always 0
LJUMP, JUMP, LCALL --- from instruction word
RTIW, RET --- from STACK
A9
A8
A7~A0
Write PC, JUMP, CALL --- always 0 (ROM 0.5K)
LJUMP, LCALL --- from instruction word
RTIW, RET --- from STACK
Write PC --- from ALU
LJUMP, JUMP, LCALL, CALL --- from instruction word
RTIW, RET --- from STACK
(4) STATUS (Status register) : R3
Bit
0
1
2
3
4
5 -7
Symbol
C
HC
Z
PF
TF
Carry bit
Half Carry bit
Zero bit
P o w e r loss Flag bit
Time overflow Flag bit
General purpose bit
Function
——
(5) MSR (Memory Select Register) : R4
This specification are subject to be changed without notice. Any latest information
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P. 2
2004/1
VER1.2
MDT10P05
(6) PORT A : R5
PA3~PA0, I/O Register
(7) PORT B : R6
PB7~PB0, I/O Register
(8) TMR (Time Mode Register)
Bit
Symbol
Prescaler Value
0
0
0
0
2
—
0
P S 2
—
0
1
1
1
1
3
PSC
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Function
R T C C rate
1:2
1:4
1:8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
WDT rate
1:1
1:2
1:4
1:8
1 : 16
1 : 32
1 : 64
1 : 128
Prescaler assignment bit :
0
—
RTCC
1
—
W atchdog Timer
4
TCE
RTCC signal Edge :
0
—
Increment on low-to -high transition on RTCC pin
1
—
Increment on high-to -low transition on RTCC pin
5
TCS
RTCC signal set :
0
—
Internal instruction cycle clock
1
—
Transition on RTCC pin
( 9 ) C P I O A , C P IO B (Control Port I/O Mode Register)
The CPIO register is “write -only”
＝
“0”, I/O pin in output mode;
＝
“1”, I/O pin in input mode.
(10) EPROM Option by writer programming :
Oscillator Type
RC
Oscillator
Oscillator Start-u p T i m e
150
µ
s , 2 0 m s , 4 0 m s , 8 0 m s
HFXT Oscillator
XTAL Oscillator
LFXT Oscillator
20 ms,40ms,80ms
20ms,40 ms,80ms
40 ms,80 ms
This specification are subject to be changed without notice. Any latest information
please preview
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P. 3
2004/1
VER1.2
MDT10P05
Watchdog Timer control
Watchdog timer disable all the time
Watchdog timer enable all the time
Power Edge Detect
PED
PED
Disable
Enable
Security bit
Security D isable
Security Enable
The default EPROM security is disable. Once the IC was set to enable, it c a n n o t set to
disable again.
(B) Program Memory
Address
0 0 0 -1 F F
1FF
Description
Program memory for MDT10P05
The starting address of the power on, external reset
o r W D T t i m e -out reset f o r M D T 1 0 P 0 5
7. Reset Condition for all Registers
Register
CPIO A
CPIO B
TMR
IAR
RTCC
PC
STATUS
MSR
PORT A
PORT B
Address
P o w e r-O n R e s e t
1111 1111
1111 1111
- - 11 1111
xxxx xxxx
xxxx xxxx
1111 1111
0001 1xxx
111x xxxx
- - - - xxxx
xxxx xxxx
/MCLR or WDT Reset
1111 1111
1111 1111
- - 11 1111
uuuu uuuu
uuuu uuuu
1111 1111
000# #uuu
111u uuuu
- - - - uuuu
uuuu uuuu
－－
－－
－－
00h
01h
02h
03h
04h
05h
06h
Note : u
＝
u n c h a n g e d ,
x
＝
unknown,
-
＝
u n i m p l e m e n t e d , r e a d a s “ 0 ”
#
＝
value depends on the condition of the following table
This specification are subject to be changed without notice. Any latest information
please preview
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P. 4
2004/1
VER1.2
