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MEC1416-I/SZ-TR

Microprocessor Circuit

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:Microchip(微芯科技)

厂商官网:https://www.microchip.com

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器件参数
参数名称
属性值
厂商名称
Microchip(微芯科技)
包装说明
WFBGA-144
Reach Compliance Code
compli
JESD-30 代码
S-PBGA-B144
长度
9 mm
端子数量
144
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
VFBGA
封装形状
SQUARE
封装形式
GRID ARRAY, VERY THIN PROFILE, FINE PITCH
座面最大高度
0.8 mm
最大供电电压
3.6 V
最小供电电压
2 V
标称供电电压
3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子形式
BALL
端子节距
0.65 mm
端子位置
BOTTOM
宽度
9 mm
uPs/uCs/外围集成电路类型
MICROPROCESSOR CIRCUIT
文档预览
MEC140x/1x
Keyboard and Embedded Controller Products for
Notebook PC
Common Features
3.3V Operation
ACPI 3.0 Compliant
PC2001 compliant
VTR (standby) and VBAT Power Planes
- Low Standby Current in Sleep Mode
Connected Standby Support
32kHz Clock Source
- Internal 32kHz Oscillator
- External 32kHz Clock Source
- 32kHz Crystal (XTAL) Supported
- Single-Ended 32kHz Clock Source
LPC Host Interface
- LPC Specification 1.1 Compatible
- LPC I/O and Memory Cycles Decoded
- Supports optional signals: CLKRUN#, LPCPD#,
SERIRQ, SMI#, EC_SCI# (ACPI PME Event)
- Supports 19.2 MHz to 33 MHz nominal bus clock
speeds
Configuration Register Set
- Compatible with ISA Plug-and-Play Standard
- EC-Programmable Base Address
8042 Emulated Keyboard Controller
- 8042 Style Host Interface
- Port 92 Legacy A20M Support
- Fast GATEA20 & Fast CPU_RESET
System to EC Message Interface
- One Embedded Memory Interface
- Host Serial or Parallel IRQ Source
- Provides Two Windows to On-Chip SRAM for
Host Access
- Two Register Mailbox Command Interface
- Mailbox Registers Interface
- Thirty-two 8-Bit Scratch Registers
- Two Register Mailbox Command Interface
- Two Register SMI Source Interface
- Five ACPI Embedded Controller Interfaces
- Four EC Interfaces
- One Power Management Interface
MIPS32
M14K™ Microcontroller Core
- microMIPS-Compatible Instruction Set
- High-performance Multiply/Divide Unit
- Programmable clock frequencies: 48MHz,
12MHz, 3MHz, and 1MHz
- Sleep mode
- 2-wire Debug Interface (ICSP)
- 6 Breakpoints (4-instruction; 2-data)
- Enhanced to Support Debug in Heavy and
Deep Sleep States
Trace FIFO Debug Port (TFDP)
Internal DMA Controller
- Hardware or Firmware Flow Control
- Firmware Initiated Memory-to-Memory transfers
- 7-Hardware DMA Channels support three
SMBus Master/Slave Controllers and one SPI
Controller
- Hardware CRC-32 Generator on Channel 0
Secure Boot ROM Loader
- 4 Code Images in Shared Flash Supported
- Crisis Recovery over Keyboard matrix Scan Pins
- Supports CRC-32 and AES-128 Encryption
Vectored Interrupt Controller
- Maskable Interrupt controller
- Maskable Hardware Wake-Up Events
- Supports legacy aggregated mode
- Supports Vector Generation per Status Bit
Programmable 16-bit Counter/Timer Interface
- Four 16-bit Auto-reloading Counter/Timer
Instances
- Two Operating Modes per Instance: Timer and
One-shot.
32-bit RTOS Timer
- Runs Off 32kHz Clock Source
- Continues Counting in all the Chip Sleep States
Regardless of Processor Sleep State
- Counter is Halted when Embedded Controller is
Halted (e.g., JTAG debugger active, break
points)
- Generates wake-capable interrupt event
Watch Dog Timer (WDT)
Hibernation Timer Interface
- One 32.768 KHz Driven Timer
- Programmable Wake-up from 0.5ms to 128 Min-
utes
Week Timer
- System Power Present Input Pin
2015 - 2016 Microchip Technology Inc.
DS00001956E-page 1
MEC140x/1x
- Week Alarm Event only generated when Sys-
tem Power is Available
- Power-up Event
- Week Alarm Interrupt with 1 Second to 8.5 Year
Time-out
- Sub-Week Alarm Interrupt with 0.50 Seconds -
72.67 hours time-out
- 1 Second and Sub-second Interrupts
• Battery-Powered General Purpose Output (BGPO)
• VBAT-Powered Control Interface (VCI)
- 2 Active-low VCI Inputs
- 1 Active-high VCI Input
- 1 Active-high VCI Output Pin
- Optional filter and latching
• Power-Fail Status Register
• Port 80 BIOS Debug Port
- Two Ports, Assignable to Any LPC IO Address
- 24-bit Timestamp with Adjustable Timebase
- 16-Entry FIFO
• PECI Interface 3.0
• Two Programmable Comparators
- 8 Bit Resolution
- Independent Outputs per Comparator
- Option to Use Pin or Programmable Voltage Ref-
erence Input
- Can be used for Thermistor Voltage Sensing
• Integrated Standby Power Reset Generator
• XNOR Test Mode
Product Dependent Features
• Enhanced Serial Peripheral Interface (eSPI)
- Intel eSPI Specification compliant
- Supports four channels/interfaces:
- Peripheral channel Interface
- Virtual Wire Interface
- Out of Band Channel Interface
- Flash Channel Interface
- Supports EC Bus Master to Host Memory
• Internal Memory
- Boot ROM
- 32 kB Data Optimized SRAM
- Code Optimized SRAM Options from 96 kB to
160 kB
- 64 Bytes Battery Powered SRAM
• Keyboard Matrix Scan Controller
- Supports 18x8 Matrix
- Pre-Drive Mode Supported
• Up To Three EC-based SMBus 2.0 Host Controllers
- Allows Master or Dual Slave Operation
- Controllers are Fully Operational on Standby
Power
- I
2
C Datalink Compatibility Mode
- Multi-Master Capable
- Supports Clock Stretching
- Programmable Bus Speeds
- 1 MHz Capable
- SMBus Time-outs Interface
- Up to 6 Port Flexible Multiplexing
- Up to 5 ports with 1.8V or 3.3V Configurable
Input Threshold
- 1 port with VTT level signaling (i.e., AMD SB-
TSI Port)
- Supports DMA Network Layer
• Up To Two PS/2 Controllers
Independent Hardware Driven PS/2 Ports
Fully functional on Main and/or Suspend Power
PS/2 Edge Wake Capable
3.6V Tolerant I/O Suitable for Internal Board
Routing
• General Purpose I/O Pins
- Inputs
- Asynchronous rising and falling edge wakeup
detection Interrupt High or Low Level
- Outputs:
- Push Pull or Open Drain output
- Programmable power well emulation
- Pull up or pull down resistor control
- Automatically disabling pull-up resistors when
output driven low
- Automatically disabling pull-down resistors
when output driven high
- Group- or individual control of GPIO data.
• Up To Three LEDs
- Programmable Blink Rates
- Piecewise Linear Breathing LED Output Control-
ler
- Provides for programmable rise and fall
waveforms
- Operational in EC Sleep States
• One Serial Peripheral Interface (SPI) Controller
- Master Only SPI Controller
- Mappable to three ports (only 1 port active at a
time)
- 1 shared SPI Interface.
- 1 General Purpose SPI Interface (package
dependent)
- 1 Crisis recovery SPI Interface (located on
Keyboard Matrix Scan connector)
- Dual and Quad I/O Support
-
-
-
-
DS00001956E-page 2
2015 - 2016 Microchip Technology Inc.
MEC140x/1x
- Flexible Clock Rates
- SPI Burst Capable
- SPI Controller Operates with Internal DMA Con-
troller with CRC Generation
Up To Two BC-Link Interconnection Bus
ADC Interface
- Up to 8 Channels
- 10-bit Conversion in 10s
- Integral Non-Linearity of ±0.5 LSB; Differential
Non-Linearity of ±0.5 LSB
- External Analog Voltage Reference
DAC Interface
- Up to 2 Channels
- 8 Bit Resolution
- External Analog Voltage Reference
FAN Support
- Up to 8 Programmable Pulse-Width Modulator
(PWM) Outputs, for Fan or General Use
- Multiple Clock Rates
- 16-Bit ON & 16-Bit OFF Counters
- Up to Two Fan Tachometer Inputs,
- 16 Bit Resolution
• Universal Asynchronous Receiver Transmitter
(UART)
- Full function Serial Port or 2-Pin Debug Port
(product dependent)
- High Speed NS16C550A Compatible UART with
Send/Receive 16-Byte FIFOs
- Accessible from Host and EC
- Full Duplex Operation
- Programmable Input/output Pin Polarity Inver-
sion
- Programmable Main Power or Standby Power
Functionality
- Standard Baud Rates to 115.2 Kbps, Custom
Baud Rates to 1.5 Mbps
• Package
- 128 VTQFP RoHS Compliant Package
- 144 WFBGA RoHS Compliant Package
Products
Note:
This table shows the total number of instances available per product. However, not all features may be
used simultaneously since they are multiplexed on the same pins. See the Pin Description chapter to deter-
mine specific chip configuration options.
Keyboard Matrix Scan
Controller
BC-Link Interfaces
SMBus 2.0 Ports
PS/2 Controllers
Catalog Part
Number
Package
SRAM
Host
Memory
Interfaces (Code +
Data)
SPI Interfaces
TACHs
2
2
2
2
2
2
GPIOs
PWMs
MEC1404-NU
MEC1404-SZ
MEC1406-NU
MEC1406-SZ
MEC1408-NU
MEC1408-SZ
MEC1414-NU
MEC1414-SZ
MEC1416-NU
MEC1416-SZ
MEC1418-NU
MEC1418-SZ
• LPC
144-WFBGA • I2C
• LPC
144-WFBGA • I2C
• LPC
144-WFBGA • I2C
• LPC
144-WFBGA • I2C
• eSPI
• LPC
144-WFBGA • I2C
• eSPI
• LPC
144-WFBGA • I2C
• eSPI
128-VTQFP
128-VTQFP
128-VTQFP
128-VTQFP
128-VTQFP
128-VTQFP
128 kB
160 kB
192 kB
128 kB
Yes
Yes
Yes
Yes
6
6
6
6
2
2
2
2
106
106
106
106
3
3
3
3
2
2
2
2
8
8
8
8
2
2
2
2
8
8
8
8
full
full
full
full
160 kB
Yes
6
2
106
3
2
8
2
8
full
192 kB
Yes
6
2
106
3
2
8
2
8
full
2015 - 2016 Microchip Technology Inc.
DS00001956E-page 3
UART
ADCs
DAC
MEC140x/1x
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of
your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our pub-
lications will be refined and enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications
Department via E-mail at
docerrors@microchip.com.
We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner
of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of
document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may
exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The
errata will specify the revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site;
http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature
number) you are using.
Customer Notification System
Register on our web site at
www.microchip.com
to receive the most current information on all of our products.
DS00001956E-page 4
2015 - 2016 Microchip Technology Inc.
MEC140x/1x
Table Of Contents
1.0 General Description ........................................................................................................................................................................ 6
2.0 Pin Configuration .......................................................................................................................................................................... 12
3.0 Power, Clocks, and Resets ........................................................................................................................................................... 64
4.0 LPC Interface ................................................................................................................................................................................ 94
5.0 Enhanced Serial Peripheral Interface (eSPI) .............................................................................................................................. 127
6.0 Quad SPI Master Controller ........................................................................................................................................................ 128
7.0 Chip Configuration ...................................................................................................................................................................... 147
8.0 MIPS32 M14K Embedded Controller .......................................................................................................................................... 152
9.0 Memory Organization .................................................................................................................................................................. 158
10.0 Jump Table Vectored Interrupt Controller (JTVIC) ................................................................................................................... 159
11.0 Watchdog Timer (WDT) ............................................................................................................................................................ 189
12.0 Embedded Memory Interface (EMI) .......................................................................................................................................... 194
13.0 Mailbox Interface ....................................................................................................................................................................... 211
14.0 ACPI Embedded Controller Interface (ACPI-ECI) ..................................................................................................................... 220
15.0 ACPI PM1 Block Interface ........................................................................................................................................................ 239
16.0 8042 Emulated Keyboard Controller ......................................................................................................................................... 249
17.0 UART ........................................................................................................................................................................................ 267
18.0 Basic Timer ............................................................................................................................................................................... 286
19.0 RTOS Timer .............................................................................................................................................................................. 292
20.0 Hibernation Timer ..................................................................................................................................................................... 299
21.0 RTC/Week Timer ...................................................................................................................................................................... 303
22.0 GPIO Interface .......................................................................................................................................................................... 313
23.0 SMBus Interface ....................................................................................................................................................................... 338
24.0 Internal DMA Controller ............................................................................................................................................................ 342
25.0 PECI Interface ........................................................................................................................................................................... 358
26.0 Tachometer ............................................................................................................................................................................... 361
27.0 PWM ......................................................................................................................................................................................... 369
28.0 Blinking/Breathing PWM ........................................................................................................................................................... 375
29.0 PS/2 Interface ........................................................................................................................................................................... 394
30.0 Keyboard Matrix Scan Interface ................................................................................................................................................ 404
31.0 BC-Link Master ......................................................................................................................................................................... 412
32.0 Trace FIFO Debug Port (TFDP) ................................................................................................................................................ 420
33.0 Port 80 BIOS Debug Port .......................................................................................................................................................... 425
34.0 EC Subsystem Registers .......................................................................................................................................................... 433
35.0 VBAT Register Bank ................................................................................................................................................................. 438
36.0 VBAT-Powered RAM ................................................................................................................................................................ 443
37.0 VBAT-Powered Control Interface .............................................................................................................................................. 446
38.0 Analog to Digital Converter ....................................................................................................................................................... 457
39.0 Digital to Analog Converter ....................................................................................................................................................... 466
40.0 Analog Comparator ................................................................................................................................................................... 472
41.0 Test Mechanisms ...................................................................................................................................................................... 475
42.0 Electrical Specifications ............................................................................................................................................................ 489
43.0 Timing Diagrams ....................................................................................................................................................................... 501
44.0 Register Memory Map ............................................................................................................................................................... 532
The Microchip Web Site .................................................................................................................................................................... 568
Customer Change Notification Service ............................................................................................................................................. 568
Customer Support ............................................................................................................................................................................. 568
Product Identification System ........................................................................................................................................................... 569
2015 - 2016 Microchip Technology Inc.
DS00001956E-page 5
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