512K x 8 FLASH
MFM8516 - 70/90/12/15
11403 West Bernado Court, Suite 100, San Diego, CA 92127.
Tel No: (619) 674 2233, Fax No: (619) 674 2230
Issue 4.7 : November 1998
Description
The MFM8516 is a 4M Bit CMOS 5V only Flash
monolithic device organised : 512K x 8. The device
offers fast access times of 70/90/120 and 150ns and
5V program/erase.
The device has a 64 KByte sector size. The Program
and Erase procedure is simplified via automatic
program and erase algorithms.
The MFM8516 has a 10K cycle write erase cycle
endurance (100K cycle E-Part) and a 10 year data
retention time.
524,288 bit FLASH EEPROM
Features
•
4 Megabit FLASH memory.
•
Fast Access Times of 70/90/120/150 ns.
•
Operating Power 247.50 mW (max),
Low Power Standby (CMOS) 632.50µW (max).
•
Automatic Write/Erase by Embedded Algorithm - end of
Write/Erase indicated by DATA Polling and Toggle Bit.
•
Flexible Sector Erase Architecture - 64K byte sector
size, with hardware protection of any number of sectors.
•
Byte Program of 16µs (Typ), Sector Program of 2s (Typ)
•
Erase/Write Cycle Endurance, Standard 10,000 (min)
Extended 100,000 (min)
• 10 year data retention.
•
May be screened in accordance with MIL-STD-883.
Block Diagram
DQ0-DQ7
Vcc
Vss
Erase Voltage
Generator
Input/Output
Buffers
Pin Definitions
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
WE
A17
A14
A13
A8
A9
A11
OE
A10
CS
D7
D6
D5
D4
D3
WE
State
Control
Command
Register
PGM Voltage
Generator
S,V
PACKAGE
TOP VIEW
CE
OE
Chip Enable
Output Enable
Logic
Data
Latch
STB
Vcc Detector
Timer
A
d
d
r
L
a
t
c
h
Y-Decoder
Y-Gating
X-Decoder
Cell Matrix
A7
A6
A5
A4
A3
A2
A1
A0
D0
5
6
7
8
9
10
11
12
13
20
19
18
17
16
15
14
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CS
D7
A0-A18
Package Details
Pin Count
32
32
32
32
Description
Package Type
S
J
W
V
Pin Functions
A0-A18
D0-D7
CS
WE
OE
Vcc
GND
Address Inputs
Data Inputs/Outputs
Chip Enable
Write Enable
Output Enable
Power (+5V)
Ground
Dual In-line
JLCC (J Leaded Chip Carrier)
LCC (Leadless Chip Carrier)
Vertical-in-Line
4
3
2
1
32
31
30
D6
D5
D4
D3
GND
D2
D1
A12
A15
A16
A18
Vcc
WE
A17
ISSUE 4.7 : NOVEMBER 1998
MFM8516 - 70/90/12/15
DC OPERATING CONDITIONS
Absolute Maximum Ratings
(1)
unit
Voltage on any pin w.r.t. Gnd
Supply Voltage
(2)
Voltage on A9 w.r.t. Gnd
(3)
Storage Temperature
Notes : (1)
-2.0 to +7
-2.0 to +7
-2.0 to +14
-65 to +150
V
V
V
°C
(2)
(3)
Stresses above those listed may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at those or any other conditions above those indicated in the operational sections of this
specification is not implied.
Minimum DC voltage on any input or I/O pin is -0.5V. Maximum DC voltage on output and I/O pins is Vcc+0.5V
During transitions voltage may overshoot by +/-2V for up to 20ns
Minimum DC input voltage on A9 is -0.5V during voltage transitions, A9 may overshoot Vss to -2V for periods of up to
20ns, maximum DC input voltage in A9 is 13.5V which may overshoot to 14.0V for periods up to 20ns
Recommended Operating Conditions
Parameter
Supply Voltage
Input High Voltage (TTL)
Input Low Voltage (TTL)
Input High Voltage (CMOS)
Input Low Voltage (CMOS)
Operating Temperature
V
CC
V
IH
V
IL
V
IH
V
IL
T
A
T
AI
T
AM
min
4.5
2.0
-0.5
0.7V
CC
-0.5
0
-40
-55
typ
5.0
-
-
-
-
-
-
-
max
5.5
V
CC
+0.5
0.8
V
CC
+0.3
0.8
70
85
125
unit
V
V
V
V
V
°C
O
C (-I suffix)
O
C (-M\MB suffix)
DC Electrical Characteristic
(T
A
=-55°C to
+
125°C,V
CC
=5V
±
10%)
Parameter
I/P Leakage Current
Address, OE
Other Pins
Output Leakage Current
V
CC
Operating Current
V
CC
Program/Erase Current
Standby Supply Current
TTL
CMOS
Autoselect / Sector Protect Voltage
Output Low Voltage
Output High Voltage
Low V
CC
Lock-Out Voltage
A9 Input Leakage Current
Symbol Test Condition
I
LI1
I
LI2
I
LI3
I
LO
I
CCO
I
CCP
I
SB
I
SB1
V
ID
V
OL
V
OH1
V
LKO
V
CC
= V
CC
max, V
IN
= 0V or V
CC
V
CC
= V
CC
max, A9 = 12.5V
V
CC
= V
CC
max, V
IN
= 0V or V
CC
V
CC
= V
CC
max, V
OUT
= 0V or V
CC
CS = V
IL
, OS = V
IH
, I
OUT
= 0mA,
f
= 6MHz
Programming in Progress
V
CC
= V
CC
max, CS = V
IH
OE = V
IH
V
CC
= V
CC
max, CS =
V
CC
+0.5,
OE = V
IL
V
CC
= 5.0V
I
OL
= 10mA. V
CC
= V
CC
min.
I
OH
= -2.5mA. V
CC
= V
CC
min.
min
-
-
-
-
-
-
-
-
11.5
-
2.4
3.2
typ max
-
-
-
-
-
-
-
-
-
-
-
-
±1
50
±1
±1
45
65
1.5
115
12.5
0.45
-
4.2
Unit
µA
µA
µA
µA
mA
mA
mA
µA
V
V
V
V
2
MFM8516 - 70/90/12/15
ISSUE 4.7 : NOVEMBER 1998
Capacitance
(T
A
=25°C,f=1MHz)
Parameter
Input Capacitance
Control Pin Capacitance
Output Capacitance
Symbol
C
IN1
C
IN2
C
OUT
Test Condition
V
IN
= 0V
V
PP
= 0V
V
OUT
= 0V
typ
-
-
-
max
10
12
12
Unit
pF
pF
pF
Note: These parameters are calculated, not measured.
AC Test Conditions
* Input pulse levels : 0.0V to 3.0V
* Input rise and fall times : 5 ns
* Input and output timing reference levels : 1.5V
* VCC = 5V +/- 10%
I/O Pin
166
Ω
1.76V
30pF
3
ISSUE 4.7 : NOVEMBER 1998
MFM8516 - 70/90/12/15
AC OPERATING CONDITIONS
Read Cycle
Parameter
Read Cycle Time
Address to output delay
Chip enable to output
Output enable to output
Output enable to output High
Output hold time from address
Symbol
t
RC
t
ACC
t
CE
t
OE
Zt
DF
t
OH
min
70
-
-
-
-
0
70
typ
-
-
-
-
-
-
max
-
70
70
30
20
-
min
90
-
-
-
-
0
90
typ
-
-
-
-
-
-
max
-
90
90
35
20
-
Unit
ns
ns
ns
ns
ns
ns
CS or OE whichever occurs first
Parameter
Read Cycle Time
Address to output delay
Chip enable to output
Output enable to output
Output enable to output High
Output hold time from address
Symbol
t
RC
t
ACC
t
CE
t
OE
Zt
DF
t
OH
min
120
-
-
-
-
0
120
typ
-
-
-
-
-
-
max
-
120
120
50
30
-
min
150
-
-
-
-
0
150
typ
-
-
-
-
-
-
max
-
150
150
55
35
-
Unit
ns
ns
ns
ns
ns
ns
CS or OE whichever occurs first
4
MFM8516 - 70/90/12/15
ISSUE 4.7 : NOVEMBER 1998
Write/Erase/Program
Parameter
Symbol
min
70
typ
-
-
-
-
-
-
-
-
-
-
-
16
2
14
-
max
-
-
-
-
-
-
-
-
-
-
-
-
30
120
-
min
90
0
45
45
0
0
0
0
0
45
20
-
-
-
50
90
typ
-
-
-
-
-
-
-
-
-
-
-
16
2
14
-
max
-
-
-
-
-
-
-
-
-
-
-
-
30
120
-
unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
sec
µs
Write Cycle time
(2)
Address Setup time
Address Hold time
Data Setup Time
Data hold Time
Output Enable Setup Time
Read Recover before Write
CS setup time
CS hold time
WE Pulse Width
WE Pulse Width High
Byte Programming operation
Sector Erase operation
(1)
Chip Erase operation
(1)
Vcc setup time
(2)
t
WC
t
AS
t
AH
t
DS
t
DH
t
OES
t
GHWL
t
CE
t
CH
t
WP
t
WPH
t
WHWH1
t
WHWH2
t
WHWH3
t
VCS
70
0
45
30
0
0
0
0
0
35
20
-
-
-
50
Parameter
Symbol
min
120
typ
-
-
-
-
-
-
-
-
-
-
-
16
2
14
-
max
-
-
-
-
-
-
-
-
-
-
-
-
30
120
-
min
150
0
50
50
0
0
0
0
0
50
20
-
-
-
50
150
typ
-
-
-
-
-
-
-
-
-
-
-
16
2
14
-
max
-
-
-
-
-
-
-
-
-
-
-
-
30
120
-
unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
sec
µs
Write Cycle time
(2)
Address Setup time
Address Hold time
Data Setup Time
Data hold Time
Output Enable Setup Time
Read Recover before Write
CS setup time
CS hold time
WE Pulse Width
WE Pulse Width High
Byte Programming operation
Sector Erase operation
(1)
Chip Erase operation
(1)
Vcc setup time
(2)
t
WC
t
AS
t
AH
t
DS
t
DH
t
OES
t
GHWL
t
CE
t
CH
t
WP
t
WPH
t
WHWH1
t
WHWH2
t
WHWH3
t
VCS
120
0
50
50
0
0
0
0
0
50
20
-
-
-
50
Notes: (1) This does not include the preprogramming time.
(2) Not 100% tested.
5
