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MK3732-22R

Clock Generator, CMOS, PDSO20, 0.010 INCH, SSOP-20

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:IDT (Integrated Device Technology)

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
IDT (Integrated Device Technology)
零件包装代码
SSOP
包装说明
SSOP, SSOP20,.25
针数
20
Reach Compliance Code
not_compliant
ECCN代码
EAR99
JESD-30 代码
R-PDSO-G20
JESD-609代码
e0
长度
8.65 mm
湿度敏感等级
1
端子数量
20
最高工作温度
70 °C
最低工作温度
封装主体材料
PLASTIC/EPOXY
封装代码
SSOP
封装等效代码
SSOP20,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度)
225
电源
3.3 V
主时钟/晶体标称频率
13.5 MHz
认证状态
Not Qualified
座面最大高度
1.75 mm
最大供电电压
3.45 V
最小供电电压
3.15 V
标称供电电压
3.3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn85Pb15)
端子形式
GULL WING
端子节距
0.635 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
3.9 mm
uPs/uCs/外围集成电路类型
CLOCK GENERATOR, OTHER
文档预览
DATASHEET
BLU-RAY DISC VCXO
Description
The MK3732-22 is a low-cost, low-jitter, 3.3 Volt VCXO
designed to replace expensive VCXOs. Using an advanced
clock synthesizer with on-chip Phase-Locked Loops (PLLs),
MK3732-22 generates six high-quality clock outputs from a
low cost, 13.5 MHz crystal. It can replace multiple voltage
controlled crystal oscillators, saving board space and cost.
The patented on-chip Voltage Controlled Crystal Oscillator
accepts a 0 to 3.3 V input voltage to cause the output clocks
to vary by ±100 ppm. The higher intrinsic VCXO gain of the
MK3732-22 helps compensate for the reduced pullability of
a low quality crystal and is ideal for PWM applications.
MK3732-22
Features
Packaged in 20-pin SSOP
Available in Pb (lead) free package
Input frequency of 13.5 MHz
Multiple output frequencies
200 ohms start-up margin at all levels of VIN
OE pin tri-states the outputs for board testing
Operating voltage of 3.3 V
Advanced, low-power CMOS process
Block Diagram
VDD
5
2
S1:0
SC
ACLK
CCLK
VIN
13.5 MHz
Pullable
Crystal
X1
Voltage
Controlled
Crystal
Oscillator
2
GND
OE (all output)
PLL/Clock
Synthesis
Circuitry
13.5 M
27 M
32.11 M
33 M
X2
Optional crystal
capacitors.
IDT™ / ICS™
BLU-RAY DISC VCXO
1
MK3732-22
REV D 020906
MK3732-22
BLU-RAY DISC VCXO
VCXO AND SYNTHESIZER
Pin Assignment
X1
S0
VDD
VIN
VDD
GND
13.5 M
27 M
33 M
32.11 M
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
X2
VDD
OE
S1
VDD
GND
VDD
ACLK
CCLK
SC
AUDIO CLK Output Table
S1
0
0
1
1
S0
0
1
0
1
ACLK (MHz)
8.192
11.2896
12.288
18.4323
COMM CLK Output Table
SC
0
1
CCLK (MHz)
26.8
24.576
20 pin (150 mil) SSOP (QSOP)
Note 1:
S1, S0, SC have an internal pull-up resistor.
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Pin
Name
X1
S0
VDD
VIN
VDD
GND
13.5 M
27 M
33 M
32.11 M
SC
CCLK
ACLK
VDD
GND
VDD
S1
Pin
Type
Input
Input
Power
Input
Power
Power
Output
Output
Output
Output
Input
Output
Output
Power
Power
Power
Input
Pin Description
Crystal connection. Connect to 13.5 MHz fundamental mode pullable
crystal.
Select ACLK per table above. Internal pull-up.
Connect to +3.3 V.
VCXO voltage input. Zero to 3.3 V analog voltage for VCXO.
Connect to +3.3 V.
Connect to ground.
13.5 MHz clock output. Output tri-stated when OE is low.
27 MHz clock output. Output tri-stated when OE is low.
33 MHz reference clock output. Output tri-stated when OE is low.
32.11 MHz clock output. Output tri-stated when OE is low.
Select CCLK per table above. Internal pull-up.
Communication clock output. Determined by table above.
Audio clock output. Determined by table above.
Connect to +3.3 V.
Connect to ground.
Connect to +3.3 V.
Select ACLK per table above. Internal pull-up.
IDT™ / ICS™
BLU-RAY DISC VCXO
2
MK3732-22
REV D 020906
MK3732-22
BLU-RAY DISC VCXO
VCXO AND SYNTHESIZER
Pin
Number
18
19
20
Pin
Name
OE
VDD
X2
Pin
Type
Input
Power
Output
Connect to +3.3 V.
Pin Description
Output enable. Tri-states all output when low. Internal pull-up
Crystal connection. Connect to 13.5 MHz fundamental mode pullable
crystal.
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
MK3732-22 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between each VDD and the PCB ground plane.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors on the
PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
To determine the need for and value of the crystal
adjustment capacitors, you will need a PC board of your final
layout, a frequency counter capable of about 1 ppm
resolution and accuracy, two power supplies, and some
samples of the crystals which you plan to use in production,
along with measured initial accuracy for each crystal at the
specified crystal load capacitance, CL.
To determine the value of the crystal capacitors:
1. Connect VDD of the MK3732-22 to 3.3 V. Connect pin 4
of the MK3732-22 to the second power supply. Adjust the
voltage on pin 4 to 0V. Measure and record the frequency of
the 13.5 M output.
2. Adjust the voltage on pin 4 to 3.3 V. Measure and record
the frequency of the same output.
To calculate the centering error:
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50Ω trace (a commonly
used trace impedance), place a 33Ω resistor in series with
the clock line, as close to the clock output pin as possible.
The nominal impedance of the clock output is 20Ω.
Quartz Crystal
The MK3732-22 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To assure
the best system performance (frequency pull range) and
reliability, the layout guidelines discussed in the following
section must be followed.
The frequency of oscillation of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
MK3732-22 incorporates on-chip variable load capacitors
that “pull” (change) the frequency of the crystal. The crystal
specified for use with the MK3732-22 is designed to have
zero frequency error when the total of on-chip + stray
capacitance is 12 pF.
The external crystal must be connected as close to the chip
as possible and should be on the same side of the PCB as
the MK3732-22. There should be no vias between the
crystal pins and the X1 and X2 device pins. There should be
no signal traces underneath or close to the crystal.
6
(
f
3.3V
f
t arg et
)
+
(
f
0V
f
t arg et
)
Error = 10 x ------------------------------------------------------------------------------
error
xtal
f
t arg et
IDT™ / ICS™
BLU-RAY DISC VCXO
3
MK3732-22
REV D 020906
MK3732-22
BLU-RAY DISC VCXO
VCXO AND SYNTHESIZER
Where:
f
target
= nominal crystal frequency
error
xtal
=actual initial accuracy (in ppm) of the crystal being
measured
If the centering error is less than ±25 ppm, no adjustment is
needed. If the centering error is more than 25 ppm negative,
the PC board has excessive stray capacitance and a new
PCB layout should be considered to reduce stray
capacitance. (Alternately, the crystal may be re-specified to
a higher load capacitance. Contact ICS for details.) If the
centering error is more than 25 ppm positive, add identical
fixed centering capacitors from each crystal pin to ground.
The value for each of these caps (in pF) is given by:
External Capacitor =
2 x (centering error)/(trim sensitivity)
Trim sensitivity is a parameter which can be supplied by your
crystal vendor. If you do not know the value, assume it is 30
ppm/pF. After any changes, repeat the measurement to
verify that the remaining error is acceptably low (typically
less than ±25 ppm).
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) The 0.01µF decoupling capacitors should be mounted on
the component side of the board as close to the VDD pins
as possible. No vias should be used between the
decoupling capacitors and VDD pins. The PCB trace to VDD
pin should be kept as short as possible, as should the PCB
trace to the ground via.
2) The external crystal should be mounted just next to the
device with short traces. The X1 and X2 traces should not
be routed next to each other with minimum spaces, instead
they should be separated and away from other traces.
3) To minimize EMI, the 33Ω series termination resistor (if
needed) should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers. Other signal traces should be routed away from the
MK3732-22. This includes signal traces just underneath the
device, or on layers adjacent to the ground plane layer used
by the device.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK3732-22. These ratings, which are
standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Parameter
Supply Voltage, VDD
Inputs
Clock Outputs
Storage Temperature
Soldering Temperature
Junction Temperature
Condition
Referenced to GND
Referenced to GND
Referenced to GND
Max 10 seconds
Min.
-0.5
-0.5
-65
Typ.
Max.
7
VDD+ 0.5
VDD+ 0.5
150
260
125
Units
V
V
V
°C
°C
°C
IDT™ / ICS™
BLU-RAY DISC VCXO
4
MK3732-22
REV D 020906
MK3732-22
BLU-RAY DISC VCXO
VCXO AND SYNTHESIZER
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Power Supply Ramp Time
Min.
0
+3.15
Typ.
+3.3
Max.
+70
+3.45
4
Units
°C
V
ms
DC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3V ±5%,
Ambient Temperature 0 to +70°C
Parameter
Operating Voltage
Supply Current
Input High Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
Output Low Voltage
Short Circuit Current
Input Capacitance
Nominal Output Impedance
Internal Pull-up Resistor
Symbol
VDD
IDD
IDDPD
V
IH
V
IL
V
OH
V
OH
V
OL
I
OS
C
IN
Z
OUT
R
PU
Conditions
No load, OE = 1
No load, OE = 0
SEL
SEL
I
OH
= -4 mA
I
OH
= -12 mA
I
OL
= 12 mA
Clock outputs
Input selects
Input selects
Min.
3.135
Typ.
3.3
48
38
Max.
3.465
Units
V
mA
mA
V
2
0.8
VDD-0.4
2.4
0.4
±70
5
20
360
V
V
V
V
mA
pF
kΩ
AC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3V ±5%,
Ambient Temperature 0 to +70° C
Parameter
Input Frequency, crystal input
Output Rise Time
Output Fall Time
Crystal Pullability
VCXO Gain
Cycle Jitter (short term)
Duty Cycle
Output Frequency Synthesis
Error
Symbol
f
IN
t
OR
t
OF
f
p
k
O
Conditions
Note 1
20% to 80%, Note 2
80% to 20%, Note 2
0V< VIN < 3.3 V, Note 1
VIN=VDD/2 ±1 V,
Note1
peak-to-peak, Note 2
Note 2
All outputs except
32.11 MHz, and
18.4323 MHz clocks
Min.
Typ.
13.5
1.2
1.0
±100
120
±250
Max. Units
MHz
ns
ns
ppm
ppm/V
ps
60
%
ppm
40
50
0
IDT™ / ICS™
BLU-RAY DISC VCXO
5
MK3732-22
REV D 020906
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参数对比
与MK3732-22R相近的元器件有:MK3732-22RTR。描述及对比如下:
型号 MK3732-22R MK3732-22RTR
描述 Clock Generator, CMOS, PDSO20, 0.010 INCH, SSOP-20 Clock Generator, CMOS, PDSO20, 0.010 INCH, SSOP-20
是否无铅 含铅 含铅
是否Rohs认证 不符合 不符合
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology)
零件包装代码 SSOP SSOP
包装说明 SSOP, SSOP20,.25 0.010 INCH, SSOP-20
针数 20 20
Reach Compliance Code not_compliant not_compliant
ECCN代码 EAR99 EAR99
JESD-30 代码 R-PDSO-G20 R-PDSO-G20
JESD-609代码 e0 e0
长度 8.65 mm 8.65 mm
湿度敏感等级 1 1
端子数量 20 20
最高工作温度 70 °C 70 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SSOP SSOP
封装等效代码 SSOP20,.25 SSOP20,.25
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度) 225 225
电源 3.3 V 3.3 V
主时钟/晶体标称频率 13.5 MHz 13.5 MHz
认证状态 Not Qualified Not Qualified
座面最大高度 1.75 mm 1.75 mm
最大供电电压 3.45 V 3.45 V
最小供电电压 3.15 V 3.15 V
标称供电电压 3.3 V 3.3 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL
端子面层 Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
端子形式 GULL WING GULL WING
端子节距 0.635 mm 0.635 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 30 30
宽度 3.9 mm 3.9 mm
uPs/uCs/外围集成电路类型 CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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