April 1997
PRELIMINARY
ML4901
High Current Synchronous Buck Controller
GENERAL DESCRIPTION
The ML4901 high current synchronous buck controller has
been designed to provide high efficiency DC/DC
conversion for next generation processors such as the
Pentium
®
Pro from Intel
®
.
The ML4901 controller, when combined with 2 external
MOSFETs, generates output voltages between 2.1V and
3.5V from a 12V supply. The output voltage is selected via
an internal 4-bit DAC. Output currents in excess of 14A
can be attained at efficiencies greater than 90%.
The ML4901 can be enabled/disabled via the
SHDN
pin.
While disabled, the output of the regulator is completely
isolated from the circuit’s input supply. The ML4901
employs fixed-frequency PWM control combined with a
dual mode control loop to provide excellent load transient
response.
FEATURES
s
Designed to meet Pentium
®
Pro power supply
requirements
DC regulation to +1% maximum
Proprietary circuitry provides transient response of +5%
maximum over 300mA to 14A load range
Programmable output voltage (2.1V to 3.5V) is set by an
onboard 4-bit DAC
Synchronous buck topology for maximum power
conversion efficiency
Fixed frequency operation for easier system integration
Integrated antishoot-through logic, short circuit
protection, and UV lockout
Shutdown control provides load isolation
s
s
s
s
s
s
s
BLOCK DIAGRAM
(Pin Configuration Shown for 16-Pin SOIC Version)
15
VDD
+
10.4V
PROTECT
16
–
UVLO
+
–
P DRV
14
4.4V
CONTROL
LOGIC
N DRV
13
35µA
+
–
PWR GND
12
SHDN
5
COMP
200kHz
+
–
11
D0
1
VFB
VDAC
-95mV
ISENSE
9
D1
2
D2
3
+
–
10
D3
4
PWR GOOD
6
4 BIT DAC
VDAC
+
–
VDAC + 10%
VDAC + 3%
VFB
VDAC - 10%
VDAC - 3%
8
+
–
VDAC + 3%
VFB
VDAC - 3%
+
–
+
–
3.5V
REFERENCE
GND
VREF
7
1
ML4901
PIN CONFIGURATION
ML4901
16-Pin Narrow SOIC (S16N)
D0
D1
D2
D3
SHDN
PWR GOOD
VREF
GND
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
PROTECT
VDD
P DRV
N DRV
PWR GND
COMP
ISENSE
VFB
D0
D1
D2
D3
NC
SHDN
NC
PWR GOOD
VREF
GND
ML4901
20-Pin TSSOP (T20)
1
2
3
4
5
6
7
8
9
10
TOP VIEW
20
19
18
17
16
15
14
13
12
11
PROTECT
VDD
NC
P DRV
N DRV
PWR GND
NC
COMP
ISENSE
VFB
PIN DESCRIPTION
(Pin Number in Parentheses is for TSSOP Version)
PIN#
NAME
FUNCTION
PIN#
NAME
FUNCTION
1 (1)
2 (2)
3 (3)
4 (4)
5 (6)
6 (8)
D0
D1
D2
D3
SHDN
PWR GOOD
LSB input to the DAC which sets
the output voltage
Input to the DAC which sets the
output voltage
Input to the DAC which sets the
output voltage
MSB input to the DAC which sets
the output voltage
Grounding this pin shuts down the
regulator
This open drain output goes low
whenever
SHDN
goes low or
when the output is not within
+10% of its nominal value
Bypass connection for the internal
3.5V reference
8 (10)
9 (11)
GND
V
FB
Analog signal ground
Output voltage feedback pin
Current sense input
Connection for the compensation
network
Power ground
Synchronous rectifier driver output
Buck switch driver output
12V power supply input
Connection for the integrating
current limit network and the
UVLO monitor for the 5V supply
10 (12) I
SENSE
11 (13) COMP
12 (15) PWR GND
13 (16) N DRV
14 (17) P DRV
15 (19) V
DD
16 (20) PROTECT
7 (9)
V
REF
2
ML4901
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
V
DD ..........................................................................................
13.5V
Peak Driver Output Current ....................................... ±2A
V
FB
Voltage ....................................... GND - 0.3V to 5.5V
I
SENSE
Voltage ................................... GND - 0.5V to 5.5V
All Other Analog Inputs .......... GND - 0.3V to V
DD
+ 0.3V
SHDN
Input Current .............................................. 100µA
Junction Temperature .............................................. 150ºC
Storage Temperature Range ...................... –65ºC to 150ºC
Lead Temperature (Soldering, 10 sec) ...................... 260ºC
Thermal Resistance (θ
JA
)
16-Pin Narrow SOIC ...................................... 100ºC/W
20-Pin TSSOP ................................................. 143ºC/W
OPERATING CONDITIONS
Temperature Range ........................................ 0ºC to 70ºC
V
DD
Range ............................................... 11.4V to 12.6V
PROTECT (5V Supply) Range .................... 4.75V to 5.25V
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, V
DD
= 12V, PROTECT =
SHDN
= 5V, T
A
= Operating Temperature Range (Note 1)
SYMBOL
REFERENCE
V
REF
Output Voltage
Line Regulation
UV LOCKOUT
V
DD
Start-up Threshold
V
DD
Hysteresis
PROTECT (5V) Start-up Threshold
PROTECT (5V) Hysteresis
SHUTDOWN
Input Low Voltage
Input High Voltage
Delay to Output
POWER GOOD COMPARATOR
Output Voltage in Regulation
Output Voltage out of Regulation
Output Voltage in Shutdown
BUCK REGULATOR
Oscillator Frequency
Duty Cycle Ratio
DAC (D3-D0) Code = 0100,
V
FB
= 0V
DAC (D3-D0) Code = 0100,
V
FB
> 3.193V
DAC (D3-D0) Input Low Voltage
DAC (D3-D0) Input High Voltage
2.0
160
80
200
230
90
0
0.8
kHz
%
%
V
V
5kΩ pull-up to 5V
V
FB
< 90% V
DAC
or >110% V
DAC
SHDN
= 0V, 5kΩ pull-up to 5V
4.8
0.4
0.4
V
V
V
2.0
50
0.8
V
V
ns
10.0
300
4.25
400
10.4
450
4.4
450
10.8
600
4.55
500
V
mV
V
mV
11V < V
DD
< 13V
3.51
3.535
0.5
3.56
V
mV/V
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
3
ML4901
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
BUCK REGULATOR (continued)
V
FB
Threshold Voltage
DAC (D3-D0) Code = 0000
DAC (D3-D0) Code = 0001
DAC (D3-D0) Code = 0010
DAC (D3-D0) Code = 0011
DAC (D3-D0) Code = 0100
DAC (D3-D0) Code = 0101
DAC (D3-D0) Code = 0110
DAC (D3-D0) Code = 0111
DAC (D3-D0) Code = 1000
DAC (D3-D0) Code = 1001
DAC (D3-D0) Code = 1010
DAC (D3-D0) Code = 1011
DAC (D3-D0) Code = 1100
DAC (D3-D0) Code = 1101
DAC (D3-D0) Code = 1110
DAC (D3-D0) Code = 1111
I
SENSE
Threshold Voltage
I
SENSE
Hysteresis
PROTECT Discharge Current
PROTECT Leakage Current
Transition Time, N DRV and P DRV
SUPPLY
V
DD
Current
SHDN
= 0V
DAC (D3-D0) Code = 0000
SHDN
= 5V, V
FB
= 5V
SHDN
= 5V, V
FB
= 0V, C
L
= 5000pF
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
(Continued)
CONDITIONS
MIN
TYP
MAX
UNITS
3.500
3.400
3.300
3.200
3.100
3.000
2.900
2.800
2.700
2.600
2.500
2.400
2.299
2.198
2.097
3.535
3.434
3.333
3.232
3.131
3.03
2.929
2.828
2.727
2.626
2.525
2.424
2.323
2.222
2.121
3.570
3.468
3.366
3.264
3.162
3.060
2.958
2.856
2.754
2.652
2.550
2.448
2.347
2.246
2.145
0.8
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mV
mV
µA
nA
ns
-85
-95
3
-105
V(I
SENSE
) = -120mV
35
+100
C
L
= 5000pF, 10-90%
40
300
1
30
450
2
µA
mA
mA
4
ML4901
FUNCTIONAL DESCRIPTION
The ML4901 PWM controller permits the construction of a
simple yet sophisticated power supply for Intel’s Pentium
®
Pro microprocessor which meets the guidelines of Intel’s
Application Note AP-523. This can be built either as a
Voltage Regulator Module (VRM) or as dedicated
motherboard circuitry. The ML4901 controls a P-channel
and an N-channel MOSFET in a synchronous buck
regulator circuit, to convert a 12V input to the voltage
required by the microprocessor. The output voltage can be
any set to any one of 15 output voltages from 2.1V to 3.5V,
in steps of 100mV, as selected by an onboard DAC. Other
features which facilitate the design of DC-DC converters
for any type of processor include a trimmed 1% reference,
special transient-response optimization in the feedback
paths, a shutdown input, input and output power good
monitors, and overcurrent protection.
4-BIT DAC
The inputs of the internal 4-bit DAC come from open
collector signals provided by the Pentium Pro. These
signals specify what supply voltage the microprocessor
requires. The output voltage of the buck converter is
compared directly with the DAC voltage to maintain
regulation. D3 is the MSB input and D0 is the LSB input of
the DAC. The output voltage set by the DAC is 1% above
the Pentium Pro's nominal operating voltage to counteract
the effects of connector and PC trace resistance, and of the
instantaneous output voltage droop which occurs when a
transient load is applied. The output of the DAC therefore
ranges from 2.121V to 3.535V in 100mV steps. For code
1111, the P DRV output is disabled, and the output voltage
is zero.
VOLTAGE FEEDBACK LOOP
The ML4901 contains two control loops to improve the
load transient response. The output voltage is directly
monitored via the V
FB
pin and compared to the desired
output voltage set by the internal 4-bit DAC. When the
output voltage is within +3% of the DAC voltage, the
proportional control loop (closed by the voltage error
amplifier) keeps the output voltage at the correct value. If
the output falls below the DAC voltage by more than 3%,
one side of the transient loop is activated, forcing the
output of the ML4901 to maximum duty cycle until the
output comes back within the +3% limit. If the output
voltage rises above the DAC voltage by more than 3%, the
other side of the transient loop is activated, and the upper
MOSFET drive is disabled until the output comes back
within the +3% limit. During start-up, the transient loop is
disabled until the output voltage is within -3% of the DAC
voltage.
POWER GOOD (PWR GOOD)
An open drain signal is provided by the ML4901 which
tells the microprocessor when the entire power system is
functioning within the expected limits. PWR GOOD will
be false (low) if either the 5V or 12V supply is not in
regulation, when the
SHDN
pin is pulled low, or when the
output is not within +10% of the nominal output voltage
selected by the internal DAC.
When PWR GOOD is false, the PWR GOOD voltage
window is held to +3%; when PWR GOOD is true (high),
the window is expanded to +10%. Using different
windows for coming into and going out of regulation
makes sure that PWR GOOD does not oscillate during the
start-up of the microprocessor.
INTERNAL REFERENCE
The ML4901 contains a 3.535V, temperature
compensated, precision band-gap reference. The V
REF
pin
is connected to the output of this reference, and should be
bypassed with a 100nF to 220nF ceramic capacitor for
proper operation.
OVERCURRENT PROTECTION
When the output of the buck converter sees an overcurrent
condition (I
OUT
exceeds the current limit set point I
SET
),
the ML4901 will operate in a “hiccup” mode until the
overcurrent condition has been removed.
During an overcurrent condition, a current sink within the
ML4901 draws a small current (35µA) out of the PROTECT
pin for the time during which I
OUT
> I
SET
. If this current
sink is activated over a number of cycles, the voltage on
the PROTECT pin will drop below 4V, signalling a
sustained overcurrent or short circuit at the load. This will
cause the P DRV output to turn off. The converter will
remain in an off state until the capacitor attached to the
PROTECT pin has charged back to 4.4V, at which time the
converter is re-enabled and tries to resume normal
operation. If the fault causing the overcurrent condition
has not been cleared, the overcurrent protection cycle will
repeat.
UNDERVOLTAGE LOCKOUT
The ML4901 has undervoltage lockout protection circuits
for both the 12V (V
DD
) and 5V (PROTECT) supplies. The
hysteresis voltage is typically 450mV for each supply.
During an input undervoltage condition, the internal
reference and voltage monitor circuits remain in
operation, but P DRV and N DRV are disabled and the
PWR GOOD output will be false (low).
COMPENSATION
This pin connects to the output of the transconductance
amplifier which forms the gain block for the ML4901’s
proportional control loop. An RC network from this pin to
GND is used to compensate the amplifier.
5
FPGA/CPLD
